Patent Inventor: Supratik Guha

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Method of placing a semiconducting nanostructure and semiconductor device including the semiconducting nanostructure
Inventor: Afzali-Ardakani, et al. | Patent Number: 8138102

Holey electrode grids for photovoltaic cells with subwavelength and superwavelength feature sizes
Inventor: Guha, et al. | Patent Number: 8120132

Silicon wafer based structure for heterostructure solar cells
Inventor: Guha, et al. | Patent Number: 8119904

Grid-line-free contact for a photovoltaic cell
Inventor: Guha, et al. | Patent Number: 8115097

Holey electrode grids for photovoltaic cells with subwavelength and superwavelength feature sizes
Inventor: Guha, et al. | Patent Number: 8039292

Ultra-sensitive detection techniques
Inventor: Afzali-Ardakani, et al. | Patent Number: 8026560

Solar concentration system
Inventor: Guha, et al. | Patent Number: 8026439

Techniques for use of nanotechnology in photovoltaics
Inventor: Guha, et al. | Patent Number: 7998788

Techniques for use of nanotechnology in photovoltaics
Inventor: Guha, et al. | Patent Number: 7977690

Core-shell nanowire transistor
Inventor: Appenzeller, et al. | Patent Number: 7948050

Selective implementation of barrier layers to achieve threshold voltage control in CMOS device fabrication with high-k dielectrics
Inventor: Bojarczuk, Jr., et al. | Patent Number: 7928514

Semiconductor structure including mixed rare earth oxide formed on silicon
Inventor: Bojarczuk, Jr., et al. | Patent Number: 7923743

Ultra-sensitive detection techniques
Inventor: Afzali-Ardakani, et al. | Patent Number: 7888753

High temperature processing compatible metal gate electrode for pFETS and methods for fabrication
Inventor: Amos, et al. | Patent Number: 7863083

Heater and memory cell, memory device and recording head including the heater
Inventor: Guha, et al. | Patent Number: 7847222

Method and apparatus for flatband voltage tuning of high-k field effect transistors
Inventor: Guha, et al. | Patent Number: 7821081

Metal catalyzed selective deposition of materials including germanium and antimony
Inventor: Guha, et al. | Patent Number: 7820474

Introduction of metal impurity to change workfunction of conductive electrodes
Inventor: Chudzik, et al. | Patent Number: 7750418

Selective implementation of barrier layers to achieve threshold voltage control in CMOS device fabrication with high K dielectrics
Inventor: Bojarczuk, Jr., et al. | Patent Number: 7745278

Damascene gate field effect transistor with an internal spacer structure
Inventor: Guha, et al. | Patent Number: 7723196

Semiconductor structure including mixed rare earth oxide formed on silicon
Inventor: Bojarczuk, Jr., et al. | Patent Number: 7648864

Removal of charged defects from metal oxide-gate stacks
Inventor: Cartier, et al. | Patent Number: 7488656

Aluminum nitride and aluminum oxide/aluminum nitride heterostructure gate dielectric stack based field effect transistors and method for forming same
Inventor: Bojarczuk, Jr., et al. | Patent Number: 7488640

Field effect transistor including damascene gate with an internal spacer structure
Inventor: Guha, et al. | Patent Number: 7479684

Selective implementation of barrier layers to achieve threshold voltage control in CMOS device fabrication with high-k dielectrics
Inventor: Bojarczuk, Jr., et al. | Patent Number: 7479683

Selective implementation of barrier layers to achieve threshold voltage control in CMOS device fabrication with high k dielectrics
Inventor: Bojarczuk, Jr., et al. | Patent Number: 7452767

Stabilization of flatband voltages and threshold voltages in hafnium oxide based silicon transistors for CMOS
Inventor: Bojarczuk, Jr., et al. | Patent Number: 7446380

Thermal interface apparatus
Inventor: Bailey, et al. | Patent Number: 7440281

Dispenser system for atomic beam assisted metal organic chemical vapor deposition (MOCVD)
Inventor: Guha, et al. | Patent Number: 7439180

Semiconductor structure including mixed rare earth oxide formed on silicon
Inventor: Bojarczuk, Jr., et al. | Patent Number: 7432550

Introduction of metal impurity to change workfunction of conductive electrodes
Inventor: Chudzik, et al. | Patent Number: 7425497

Method of forming lattice-matched structure on silicon and structure formed thereby
Inventor: Bojarczuk, Jr., et al. | Patent Number: 7348226

Method and apparatus for fabricating or altering microstructures using local chemical alterations
Inventor: Guha, et al. | Patent Number: 7329361

Nitrogen-containing field effect transistor gate stack containing a threshold voltage control layer formed via deposition of a metal oxide
Inventor: Bojarczuk, Jr., et al. | Patent Number: 7242055

Heterogeneous thermal interface for cooling
Inventor: Gelorme, et al. | Patent Number: 7219713

Complementary metal oxide semiconductor (CMOS) gate stack with high dielectric constant gate dielectric and integrated diffusion barrier
Inventor: Bojarczuk, Jr., et al. | Patent Number: 7169674

Selective implementation of barrier layers to achieve threshold voltage control in CMOS device fabrication with high k dielectrics
Inventor: Bojarczuk, Jr., et al. | Patent Number: 7105889

Rare earth metal oxide memory element based on charge storage and method for manufacturing same
Inventor: Bojarczuk, Jr., et al. | Patent Number: 7078301

Method of forming lattice-matched structure on silicon and structure formed thereby
Inventor: Bojarczuk, Jr., et al. | Patent Number: 6933566

Rare earth metal oxide memory element based on charge storage and method for manufacturing same
Inventor: Bojarczuk, Jr., et al. | Patent Number: 6894338

Complementary metal oxide semiconductor (CMOS) gate stack with high dielectric constant gate dielectric and integrated diffusion barrier
Inventor: Bojarczuk, Jr., et al. | Patent Number: 6891231

Dielectric stack without interfacial layer
Inventor: Bojarczuk, Jr., et al. | Patent Number: 6861728

Method of forming lattice-matched structure on silicon and structure formed thereby
Inventor: Bojarczuk, Jr., et al. | Patent Number: 6852575

Aluminum nitride and aluminum oxide/aluminum nitride heterostructure gate dielectric stack based field effect transistors and method for forming same
Inventor: Bojarczuk, Jr., et al. | Patent Number: 6831339

Engineered high dielectric constant oxide and oxynitride heterostructure gate dielectrics by an atomic beam deposition technique
Inventor: Bojarczuk, Jr., et al. | Patent Number: 6541079

Method for forming dielectric stack without interfacial layer
Inventor: Bojarczuk, Jr., et al. | Patent Number: 6528374

Selective growth of ferromagnetic films
Inventor: Bojarczuk, Jr., et al. | Patent Number: 6333067

Selective growth of ferromagnetic films for magnetic memory, storage-based devices
Inventor: Bojarczuk, Jr., et al. | Patent Number: 6299991

Metal embedded passivation layer structure for microelectronic interconnect formation, customization and repair
Inventor: Bojarczuk, Jr., et al. | Patent Number: 6255671

Product and process for forming a semiconductor structure on a host substrate
Inventor: Bojarczuk, et al. | Patent Number: 6210479

High density magnetic recording medium utilizing selective growth of ferromagnetic material
Inventor: Guha, et al. | Patent Number: 6146755

Monolithic silicon-based nitride display device
Inventor: Bojarczuk, Jr., et al. | Patent Number: 6120909

Hybrid organic-inorganic semiconductor light emitting diodes
Inventor: Bojarczuk, Jr., et al. | Patent Number: 5898185

Hybrid organic-inorganic semiconductor light emitting diodes
Inventor: Bojarczuk, Jr., et al. | Patent Number: 5895932

III-V/II-VI Semiconductor interface fabrication method
Inventor: DePuydt, et al. | Patent Number: 5879962

Column III metal nitride films as phase change media for optical recording
Inventor: Bojarczuk, Jr., et al. | Patent Number: 5874147

Organic light emitting diodes having transparent cathode structures
Inventor: Guha, et al. | Patent Number: 5739545

Hetero-superlattice PN junctions
Inventor: Chang, et al. | Patent Number: 5416337

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