Patent Inventor: Pradeep S. Sindhu
-
Memory organization in a switching device
Inventor: Sindhu, et al. | Patent Number: 7903659
-
In-line packet processing
Inventor: Oskouy, et al. | Patent Number: 7804833
-
In-line packet processing
Inventor: Oskouy, et al. | Patent Number: 7801140
-
Memory organization in a switching device
Inventor: Sindhu, et al. | Patent Number: 7545808
-
Separation of data and control in a switching device
Inventor: Sindhu, et al. | Patent Number: 7489699
-
In-line packet processing
Inventor: Oskouy, et al. | Patent Number: 7209448
-
Memory organization in a switching device
Inventor: Sindhu, et al. | Patent Number: 7116660
-
Switching device
Inventor: Sindhu, et al. | Patent Number: 7102999
-
Separation of data and control in a switching device
Inventor: Sindhu, et al. | Patent Number: 6917620
-
Filtering and route lookup in a switching device
Inventor: Ferguson, et al. | Patent Number: 6798777
-
In-line packet processing
Inventor: Oskouy, et al. | Patent Number: 6791947
-
Memory organization in a switching device
Inventor: Sindhu, et al. | Patent Number: 6493347
-
Adaptive quantization compatible with the JPEG baseline sequential mode
Inventor: Sindhu, et al. | Patent Number: 6175650
-
Consistent packet switched memory bus for shared memory multiprocessors
Inventor: Sindhu, et al. | Patent Number: 5924119
-
High speed variable length best match look-up in a switching device
Inventor: Ferguson, et al. | Patent Number: 5909440
-
High speed switching device
Inventor: Sindhu, et al. | Patent Number: 5905725
-
Arbitration of packet switched busses, including busses for shared memory multiprocessors
Inventor: Sindhu, et al. | Patent Number: 5440698
-
Methods and apparatus for creating a pending write-back controller for a cache controller on a packet switched memory bus employing dual directories
Inventor: Liencres, et al. | Patent Number: 5434993
-
Source synchronized metastable free bus
Inventor: Hoel, et al. | Patent Number: 5392422
-
Consistency protocols for shared memory multiprocessors
Inventor: Sindhu, et al. | Patent Number: 5265235
-
Multiple address space system including address translator for receiving virtual addresses from bus and providing real addresses on the bus
Inventor: Sindhu | Patent Number: 5230045
-
Apparatus and method for a synchronous, high speed, packet-switched bus
Inventor: Sindhu, et al. | Patent Number: 5195089
-
Multiple address space mapping technique for shared memory wherein a processor operates a fault handling routine upon a translator miss
Inventor: Sindhu | Patent Number: 5123101