Patent Inventor: Noriko Kadomaru

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Data processing system, memory access device and method including selecting the number of pipeline stages based on pipeline conditions
Inventor: Kuroiwa, et al. | Patent Number: 5809552

Data processing apparatus for executing a vector operation under control of a master processor
Inventor: Suetake, et al. | Patent Number: 5742842

Processor system including an index buffer circuit and a translation look-aside buffer control circuit for processor-to-processor interfacing
Inventor: Utsunomiya, et al. | Patent Number: 5644748

Synchronizing circuit for dividing a frequency of a clock signal supplied from an external device into a plurality of internal clock signals
Inventor: Kadomaru, et al. | Patent Number: 5596294

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