Patent Inventor: Mario Giuseppe Saggio

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Process for manufacturing a charge-balance power diode and an edge-termination structure for a charge-balance semiconductor power device
Inventor: Saggio, et al. | Patent Number: 8039898

Process for manufacturing a multi-drain electronic power device integrated in semiconductor substrate and corresponding device
Inventor: Saggio, et al. | Patent Number: 8012832

Power field effect transistor and manufacturing method thereof
Inventor: Saggio, et al. | Patent Number: 7892923

Method for manufacturing electronic devices integrated in a semiconductor substrate and corresponding devices
Inventor: Frisina, et al. | Patent Number: 7871880

Process for manufacturing a multi-drain electronic power device integrated in semiconductor substrate and corresponding device
Inventor: Saggio, et al. | Patent Number: 7838927

Process for manufacturing a charge-balance power diode and an edge-termination structure for a charge-balance semiconductor power device
Inventor: Saggio, et al. | Patent Number: 7790520

Method for manufacturing electronic devices integrated in a semiconductor substrate and corresponding devices
Inventor: Frisina, et al. | Patent Number: 7713853

Integrated power device having a start-up structure
Inventor: Saggio, et al. | Patent Number: 7700970

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