Patent Inventor: John K. Zahurak
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Fully-depleted (FD)(SOI) MOSFET access transistor and method of fabrication
Inventor: Wang, et al. | Patent Number: 8148225
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Vertically-oriented semiconductor selection device for cross-point array memory
Inventor: Sandhu, et al. | Patent Number: 8076717
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Methods of forming recessed access devices associated with semiconductor constructions
Inventor: Parekh, et al. | Patent Number: 8067286
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Disposable pillars for contact formation
Inventor: Burgess, et al. | Patent Number: 8049258
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Methods of forming isolated active areas, trenches, and conductive lines in semiconductor structures and semiconductor structures including the same
Inventor: Parekh, et al. | Patent Number: 7989307
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Methods of forming recessed access devices associated with semiconductor constructions
Inventor: Parekh, et al. | Patent Number: 7897460
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Method of forming a field effect transistor
Inventor: Parekh, et al. | Patent Number: 7833892
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Methods of forming integrated circuitry, methods of forming memory circuitry, and methods of forming field effect transistors
Inventor: Parekh, et al. | Patent Number: 7718495
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Localized biasing for silicon on insulator structures
Inventor: Gonzalez, et al. | Patent Number: 7659152
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Localized biasing for silicon on insulator structures
Inventor: Gonzalez, et al. | Patent Number: 7608927
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Fully-depleted (FD) (SOI) MOSFET access transistor and method of fabrication
Inventor: Wang, et al. | Patent Number: 7517743
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Fully-depleted (FD) (SOI) MOSFET access transistor
Inventor: Wang, et al. | Patent Number: 7465999
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Method of forming integrated circuitry
Inventor: Parekh, et al. | Patent Number: 7439138
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Methods of forming openings into dielectric material
Inventor: Graettinger, et al. | Patent Number: 7419913
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Disposable pillars for contact formation
Inventor: Burgess, et al. | Patent Number: 7399671
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Methods of forming recessed access devices associated with semiconductor constructions
Inventor: Parekh, et al. | Patent Number: 7384849
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Semiconductor substrates and field effect transistor constructions
Inventor: Zahurak, et al. | Patent Number: 7329910
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Methods of forming integrated circuitry, methods of forming memory circuitry, and methods of forming field effect transistors
Inventor: Parekh, et al. | Patent Number: 7276433
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Method of forming fully-depleted (FD) SOI MOSFET access transistor
Inventor: Wang, et al. | Patent Number: 7189606
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Fully-depleted (FD) (SOI) MOSFET access transistor
Inventor: Wang, et al. | Patent Number: 7151303
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Capacitor structures, DRAM cell structures, and integrated circuitry, and methods of forming capacitor structures, integrated circuitry and DRAM cell structures
Inventor: Parekh, et al. | Patent Number: 7151291
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Double blanket ion implant method and structure
Inventor: Fischer, et al. | Patent Number: 7119397
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Methods of forming field effect transistor gates
Inventor: Zahurak, et al. | Patent Number: 7081416
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Dual-gate transistor device and method of forming a dual-gate transistor device
Inventor: Zahurak, et al. | Patent Number: 7064036
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High pressure anneals of integrated circuit structures
Inventor: Thakur, et al. | Patent Number: 6974773
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Isolation region forming methods
Inventor: Dickerson, et al. | Patent Number: 6967146
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Methods of forming capacitor structures and DRAM arrays
Inventor: Parekh, et al. | Patent Number: 6864138
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Methods of forming capacitors
Inventor: Parekh, et al. | Patent Number: 6825095
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Silicon on insulator DRAM process utilizing both fully and partially depleted devices
Inventor: Dennison, et al. | Patent Number: 6818496
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Self-aligned dual-gate transistor device and method of forming self-aligned dual-gate transistor device
Inventor: Zahurak, et al. | Patent Number: 6790732
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Semiconductor construction of a trench
Inventor: Dickerson, et al. | Patent Number: 6710420
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Capacitors and DRAM arrays
Inventor: Parekh, et al. | Patent Number: 6710390
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Method of improving static refresh
Inventor: Fischer, et al. | Patent Number: 6693014
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Semiconductor processing methods
Inventor: Lane, et al. | Patent Number: 6653187
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SOI DRAM with buried capacitor under the digit lines utilizing a self aligning penetrating storage node contact formation
Inventor: Dennison, et al. | Patent Number: 6620672
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Integrated circuit devices having contact and container structures
Inventor: Parekh, et al. | Patent Number: 6617635
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SEMICONDUCTOR PROCESSING METHODS OF FORMING INTEGRATED CIRCUITRY MEMORY DEVICES, METHODS OF FORMING CAPACITOR CONTAINERS, METHODS OF MAKING ELECTRICAL CONNECTION TO CIRCUIT NODES AND RELATED INTEGRATED CIRCUITRY
Inventor: Lane, et al. | Patent Number: 6611018
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Isolation region forming methods
Inventor: Dickerson, et al. | Patent Number: 6593206
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Method of forming a dual-gated semiconductor-on-insulator device
Inventor: Zahurak, et al. | Patent Number: 6593192
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SEMICONDUCTOR PROCESSING METHODS OF FORMING INTEGRATED CIRCUITRY MEMORY DEVICES, METHODS OF FORMING CAPACITOR CONTAINERS, METHODS OF MAKING ELECTRICAL CONNECTION TO CIRCUIT NODES AND RELATED INTEGRATED CIRCUITRY
Inventor: Lane, et al. | Patent Number: 6583002
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Semiconductor processing methods of forming a conductive projection and methods of increasing alignment tolerances
Inventor: Fischer, et al. | Patent Number: 6559057
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Silicon on insulator DRAM process utilizing both fully and partially depleted devices
Inventor: Dennison, et al. | Patent Number: 6537891
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Capacitor structures, DRAM cell structures, and integrated circuitry, and methods of forming capacitor structures, integrated circuitry and DRAM cell structures
Inventor: Parekh, et al. | Patent Number: 6500709
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SEMICONDUCTOR PROCESSING METHODS OF FORMING INTEGRATED CIRCUITRY MEMORY DEVICES, METHODS OF FORMING CAPACITOR CONTAINERS, METHODS OF MAKING ELECTRICAL CONNECTION TO CIRCUIT NODES AND RELATED INTEGRATED CIRCUITRY
Inventor: Lane, et al. | Patent Number: 6495410
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Method of improving static refresh
Inventor: Fischer, et al. | Patent Number: 6482707
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Methods of forming capacitor-over-bit line memory cells
Inventor: Zahurak, et al. | Patent Number: 6458649
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SOI DRAM with buried capacitor under the digit lines utilizing a self aligning penetrating storage node contact formation
Inventor: Dennison, et al. | Patent Number: 6429069
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SEMICONDUCTOR PROCESSING METHODS OF FORMING INTEGRATED CIRCUITRY MEMORY DEVICES, METHODS OF FORMING CAPACITOR CONTAINERS, METHODS OF MAKING ELECTRICAL CONNECTION TO CIRCUIT NODES AND RELATED INTEGRATED CIRCUITRY
Inventor: Lane, et al. | Patent Number: 6424043
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Structure for improving static refresh
Inventor: Fischer, et al. | Patent Number: 6410951
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Isolation region forming methods
Inventor: Dickerson, et al. | Patent Number: 6406977
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Integrated circuitry memory devices
Inventor: Zahurak | Patent Number: 6399981
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Methods of forming capacitors, DRAM arrays, and monolithic integrated circuits
Inventor: Parekh, et al. | Patent Number: 6383887
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Methods for forming contact and container structures, and integrated circuit devices therefrom
Inventor: Parekh, et al. | Patent Number: 6383868
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Methods of forming a capacitor and methods of forming a monolithic integrated circuit
Inventor: Parekh, et al. | Patent Number: 6376301
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Isolation region forming methods
Inventor: Dickerson, et al. | Patent Number: 6372601
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DRAM cells and integrated circuitry, and capacitor structures
Inventor: Parekh, et al. | Patent Number: 6359302
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Methods of forming storage capacitors
Inventor: Zahurak | Patent Number: 6358812
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Capacitor structures, DRAM cells and integrated circuitry
Inventor: Parekh, et al. | Patent Number: 6329684
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Capacitor over bit line memory cell and process
Inventor: Parekh, et al. | Patent Number: 6329682
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Isolation region forming methods
Inventor: Dickerson, et al. | Patent Number: 6329267
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Semiconductor processing methods of forming a conductive projection and methods of increasing alignment tolerances
Inventor: Fischer, et al. | Patent Number: 6309973
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Methods of forming capacitors
Inventor: Parekh, et al. | Patent Number: 6309941
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Methods of forming capacitors, DRAM arrays, and monolithic integrated circuits
Inventor: Parekh, et al. | Patent Number: 6306705
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Capacitor structures, DRAM cell structures, and integrated circuitry
Inventor: Parekh, et al. | Patent Number: 6297525
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Semiconductor processing methods of forming integrated circuitry memory devices, methods of forming capacitor containers, methods of making electrical connection to circuit nodes and related integrated circuitry
Inventor: Lane, et al. | Patent Number: 6281070
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Semiconductor processing methods of forming integrated circuitry memory devices, methods of forming capacitor containers, methods of making electrical connection to circuit nodes and related integrated circuitry
Inventor: Lane, et al. | Patent Number: 6261899
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Isolation region forming methods
Inventor: Dickerson, et al. | Patent Number: 6238999
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Capacitor structures, DRAM cell structures, and integrated circuitry, and methods of forming capacitor structures, integrated circuitry and DRAM cell structures
Inventor: Parekh, et al. | Patent Number: 6238971
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Methods of forming capacitors structures and DRAM cells
Inventor: Parekh, et al. | Patent Number: 6228738
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Methods of forming capacitors and DRAM arrays
Inventor: Parekh, et al. | Patent Number: 6228710
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DRAM circuitry
Inventor: Zahurak | Patent Number: 6222215
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Methods of forming capacitors DRAM arrays, and monolithic integrated circuits
Inventor: Parekh, et al. | Patent Number: 6207523
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Semiconductor processing method of forming hemispherical grain polysilicon and a substrate having a hemispherical grain polysilicon layer
Inventor: Thakur, et al. | Patent Number: 6187628
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Methods of forming capacitors, DRAM arrays, and monolithic integrated circuits
Inventor: Parekh, et al. | Patent Number: 6180485
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Semiconductor processing methods of forming integrated circuitry memory devices, methods of forming capacitor containers, methods of making electrical connection to circuit nodes and related integrated circuitry
Inventor: Lane, et al. | Patent Number: 6175146
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High pressure anneals of integrated circuit structures
Inventor: Thakur, et al. | Patent Number: 6174806
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Methods of forming storage capacitors in integrated circuitry memory cells and integrated circuitry
Inventor: Zahurak | Patent Number: 6150211
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Increased interior volume for integrated memory cell
Inventor: Zahurak, et al. | Patent Number: 6090655
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Semiconductor processing methods of forming a conductive projection and methods of increasing alignment tolerances
Inventor: Fischer, et al. | Patent Number: 6083803
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Process for improving roughness of conductive layer
Inventor: Batra, et al. | Patent Number: 6060355
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Process for forming capacitor over bit line memory cell
Inventor: Parekh, et al. | Patent Number: 6060351
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Semiconductor processing method of providing a conductively doped layer of hemispherical grain polysilicon and a hemispherical grain polysilicon layer produced according to the method
Inventor: Zahurak, et al. | Patent Number: 6015743
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Semiconductor processing methods of forming integrated circuitry memory devices, methods of forming capacitor containers, methods of making electrical connection to circuit nodes and related integrated circuitry
Inventor: Lane, et al. | Patent Number: 5998257
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Semiconductor processing method of providing a conductively doped layer of hemispherical grain polysilicon and a hemispherical grain polysilicon layer produced according to the method
Inventor: Zahurak, et al. | Patent Number: 5989973
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Methods of forming capacitors and DRAM arrays
Inventor: Parekh, et al. | Patent Number: 5981333
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Method of fabricating a semiconductor device utilizing polysilicon grains
Inventor: Zahurak, et al. | Patent Number: 5960294
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Process for improving roughness of conductive layer
Inventor: Batra, et al. | Patent Number: 5770500
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Increased interior volume for integrated memory cell
Inventor: Zahurak, et al. | Patent Number: 5760434
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Semiconductor processing method of providing a conductively doped layer of hemispherical grain polysilicon
Inventor: Zahurak, et al. | Patent Number: 5639685