Patent Inventor: Amit A. Merchant
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Multi-threading techniques for a processor utilizing a replay queue
Inventor: Merchant, et al. | Patent Number: 7219349
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Processor with a replay system that includes a replay queue for improved throughput
Inventor: Merchant, et al. | Patent Number: 7200737
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Interface to a memory system for a processor having a replay system
Inventor: Merchant, et al. | Patent Number: 7089409
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Storing of instructions relating to a stalled thread
Inventor: Merchant, et al. | Patent Number: 6792446
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Processor including replay queue to break livelocks
Inventor: Merchant, et al. | Patent Number: 6785803
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Interface to a memory system for a processor having a replay system
Inventor: Merchant, et al. | Patent Number: 6665792
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Multi-threading for a processor utilizing a replay queue
Inventor: Merchant, et al. | Patent Number: 6385715
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Scheduling operations using a dependency matrix
Inventor: Merchant, et al. | Patent Number: 6334182
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Computer processor having a checker
Inventor: Merchant, et al. | Patent Number: 6212626
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Computer processor with a replay system
Inventor: Merchant, et al. | Patent Number: 6163838
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Computer processor with a replay system having a plurality of checkers
Inventor: Merchant, et al. | Patent Number: 6094717
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Method and apparatus for supporting read, write, and invalidation operations to memory which maintain cache consistency
Inventor: Sarangdhar, et al. | Patent Number: 5909699
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Method and apparatus for maintaining cache coherency in a computer system with a highly pipelined bus and multiple conflicting snoop requests
Inventor: Merchant | Patent Number: 5893151
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Method and apparatus for maintaining cache coherency in a computer system with a highly pipelined bus and multiple conflicting snoop requests
Inventor: Merchant | Patent Number: 5890200
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Method and apparatus for maintaining cache coherency in a computer system with a highly pipelined bus and multiple conflicting snoop requests
Inventor: Merchant | Patent Number: 5875467
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Method and apparatus for self-snooping a bus during a boundary transaction
Inventor: Rhodehamel, et al. | Patent Number: 5797026
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Method and apparatus for maintaining cache coherency in a computer system with a highly pipelined bus and multiple conflicting snoop requests
Inventor: Merchant | Patent Number: 5778438
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Method and apparatus for maintaining cache coherency in a computer system with a highly pipelined bus and multiple conflicting snoop requests
Inventor: Merchant | Patent Number: 5737759
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Method and apparatus for maintaining cache coherency in a computer system with a highly pipelined bus and multiple conflicting snoop requests
Inventor: Merchant | Patent Number: 5737758
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Method and apparatus for supporting read, write, and invalidation operations to memory which maintain cache consistency
Inventor: Sarangdhar, et al. | Patent Number: 5572702