Patent Assignee: Pact XPP Technologies AG
-
Method for processing data
Inventor: Vorbach, et al. | Patent Number: 7657877
-
Method and device for processing data
Inventor: Vorbach, et al. | Patent Number: 7657861
-
I/O and memory bus system for DFPS and units with two- or multi-dimensional programmable cell architectures
Inventor: Vorbach, et al. | Patent Number: 7650448
-
Reconfigurable sequencer structure
Inventor: Vorbach | Patent Number: 7602214
-
Logic cell array and bus system
Inventor: Vorbach, et al. | Patent Number: 7595659
-
Method and system for alternating between programs for execution by cells of an integrated circuit
Inventor: Vorbach, et al. | Patent Number: 7584390
-
Methods and devices for treating and/or processing data
Inventor: Vorbach | Patent Number: 7581076
-
Parallel task operation in processor and reconfigurable coprocessor configured based on information in link list including termination information for synchronization
Inventor: Vorbach | Patent Number: 7577822
-
Runtime configurable arithmetic and logic cell
Inventor: Vorbach, et al. | Patent Number: 7565525
-
Method for debugging reconfigurable architectures
Inventor: Vorbach | Patent Number: 7480825
-
Methods and devices for treating and processing data
Inventor: Vorbach, et al. | Patent Number: 7444531
-
Router
Inventor: Vorbach, et al. | Patent Number: 7434191
-
Reconfigurable sequencer structure
Inventor: Vorbach | Patent Number: 7394284
-
I/O and memory bus system for DFPS and units with two- or multi-dimensional programmable cell architectures
Inventor: Vorbach, et al. | Patent Number: 7337249
-
Method for debugging reconfigurable architectures
Inventor: Vorbach, et al. | Patent Number: 7266725
-
I/O and memory bus system for DFPs and units with two-or multi-dimensional programmable cell architectures
Inventor: Vorbach, et al. | Patent Number: 7243175
-
Reconfigurable multidimensional array processor allowing runtime reconfiguration of selected individual array cells
Inventor: Vorbach, et al. | Patent Number: 7237087
-
Method for translating programs for reconfigurable architectures
Inventor: May, et al. | Patent Number: 7210129
-
Run-time reconfiguration method for programmable units
Inventor: Vorbach, et al. | Patent Number: 7174443
-
Method of self-synchronization of configurable elements of a programmable module
Inventor: Vorbach, et al. | Patent Number: 7036036
-
Process for automatic dynamic reloading of data flow processors (DFPS) and units with two- or three- dimensional programmable cell architectures (FPGAS, DPGAS, and the like)
Inventor: Vorbach, et al. | Patent Number: 7028107
-
Internal bus system for DFPS and units with two- or multi-dimensional programmable cell architectures, for managing large volumes of data with a high interconnection complexity
Inventor: Vorbach, et al. | Patent Number: 7010667
-
Pipeline configuration unit protocols and communication
Inventor: Vorbach, et al. | Patent Number: 7003660
-
Method of hierarchical caching of configuration data having dataflow processors and modules having two- or multidimensional programmable cell structure (FPGAs, DPGAs, etc.)
Inventor: Vorbach, et al. | Patent Number: 6990555
-
Method of self-synchronization of configurable elements of a programmable unit
Inventor: Vorbach, et al. | Patent Number: 6968452
-
Data processing system
Inventor: Vorbach | Patent Number: 6859869
-
Runtime configurable arithmetic and logic cell
Inventor: Vorbach, et al. | Patent Number: 6728871
-
I/O and memory bus system for DFPs and units with two- or multi-dimensional programmable cell architectures
Inventor: Vorbach, et al. | Patent Number: 6721830
-
Method of repairing integrated circuits
Inventor: Vorbach, et al. | Patent Number: 6697979
-
Method of hierarchical caching of configuration data having dataflow processors and modules having two-or multidimensional programmable cell structure (FPGAs, DPGAs , etc.)
Inventor: Vorbach, et al. | Patent Number: 6687788
-
Method for deadlock-free configuration of dataflow processors and modules with a two- or multidimensional programmable cell structure (FPGAs, DPGAs, etc.)
Inventor: Vorbach, et al. | Patent Number: 6571381