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    Semiconductor Device And Structure - Patent 8114757

    Semiconductor Device And Structure - Patent 8114757

    pgs. 326
    1. Field of the Invention This invention describes applications of monolithic 3D integration to semiconductor chips performing logic and memory... ... 
     ...  More »
    Tags: Semiconductor device and structure, Or-Bach, et al., Zvi Or-Bach, Deepak C. Sekar, Application number 12 901-902, Semiconductor Device Manufacturing: P..., Active Solid-State Devices (E.G. Tran...
     ...  More »
    Categories:Legal › Patents › Semiconductors › 
    3188436 253 views Language: English
    Method For Fabrication Of A Semiconductor Device And Structure - Patent 8153499

    Method For Fabrication Of A Semiconductor Device And Structure - Patent 8153499

    pgs. 322
    1. Field of the Invention The present invention relates to the general field of Integrated Circuit (IC) devices and fabrication methods, and more... ... 
     ...  More »
    Tags: Method for fabrication of a semicondu..., Or-Bach, et al., Zvi Or-Bach, Deepak C. Sekar, Brian Cronquist, Israel Beinglass, Jan Lodewijk de Jong, Application number 13 246-391, Semiconductor Device Manufacturing: P..., Active Solid-State Devices (E.G. Tran...
     ...  More »
    Categories:Legal › Patents › Semiconductors › 
    3188436 49 views Language: English
    Processes And Structures For IC Fabrication - Patent 8153517

    Processes And Structures For IC Fabrication - Patent 8153517

    pgs. 55
    The present invention relates to co-pendingapplications "Processes and structures for IC fabrication" of the same inventor.BACKGROUND RFID tags are a  ... 
     ...  More »
    Tags: Processes and structures for IC fabri..., Sheats, Jayna Sheats, Application number 12 484-232, Semiconductor Device Manufacturing: P...
     ...  More »
    Categories:Legal › Patents › Semiconductors › 
    3188436 38 views Language: English
    Combinatorial Plasma Enhanced Deposition Techniques - Patent 8153535

    Combinatorial Plasma Enhanced Deposition Techniques - Patent 8153535

    pgs. 26
    The present invention relates generally to semiconductor processing. More specifically, techniques for combinatorial plasma enhanced deposition... ... 
     ...  More »
    Tags: Combinatorial plasma enhanced deposit..., Shanker, et al., Sunil Shanker, Tony P. Chiang, Application number 13 337-759, Semiconductor Device Manufacturing: P..., Active Solid-State Devices (E.G. Tran...
     ...  More »
    Categories:Legal › Patents › Semiconductors › 
    3188436 24 views Language: 
    Direct Oxidation Method For Semiconductor Process - Patent 8153534

    Direct Oxidation Method For Semiconductor Process - Patent 8153534

    pgs. 20
    1. Field of the Invention The present invention relates to an oxidation apparatus and method for a semiconductor process for oxidizing the surface... ... 
     ...  More »
    Tags: Direct oxidation method for semicondu..., Inoue, et al., Hisashi Inoue, Masataka Toiya, Yoshikatsu Mizuno, Application number 13 025-738, Semiconductor Device Manufacturing: P...
     ...  More »
    Categories:Legal › Patents › Semiconductors › 
    3188436 20 views Language: English
    Process For Annealing Semiconductor Wafers With Flat Dopant Depth Profiles - Patent 8153538

    Process For Annealing Semiconductor Wafers With Flat Dopant Depth Profiles - Patent 8153538

    pgs. 5
    FIELD The field of the disclosure relates to semiconductor wafer processing, and more particularly, annealing of semiconductor wafers.BACKGROUND... ... 
     ...  More »
    Tags: Process for annealing semiconductor w..., Shive, et al., Larry Wayne Shive, Brian Lawrence Gilmore, Application number 12 964-143, Semiconductor Device Manufacturing: P..., Active Solid-State Devices (E.G. Tran...
     ...  More »
    Categories:Legal › Patents › Semiconductors › 
    3188436 24 views Language: English
    Transfer Of High Temperature Wafers - Patent 8153536

    Transfer Of High Temperature Wafers - Patent 8153536

    pgs. 14
    The present invention is related to the field of semiconductor processing equipment, and specifically provides apparatus and methods that permit a... ... 
     ...  More »
    Tags: Transfer of high temperature wafers, Tischler, et al., Michael Albert Tischler, Ronald Thomas Bertram Jr., Application number 12 678-466, Semiconductor Device Manufacturing: P..., Coating Apparatus, Active Solid-State Devices (E.G. Tran...
     ...  More »
    Categories:Legal › Patents › Semiconductors › 
    3188436 22 views Language: English
    Method For Fabricating Semiconductor Devices Using Stress Engineering - Patent 8153537

    Method For Fabricating Semiconductor Devices Using Stress Engineering - Patent 8153537

    pgs. 12
    The present invention relates to generally to methods for fabricating semiconductor devices, and more particularly to methods for improving carrier... ... 
     ...  More »
    Tags: Method for fabricating semiconductor ..., Yeong, et al., Sai Hooi Yeong, Tao Wang, Shesh Mani Pandey, Chia Ching Yeo, Ying Keung Leung, Elgin Kiok Boone Quek, Application number 13 236-627, Semiconductor Device Manufacturing: P...
     ...  More »
    Categories:Legal › Patents › Semiconductors › 
    3188436 22 views Language: English
    Semiconductor Device And Method Of Manufacturing The Same - Patent 8153531

    Semiconductor Device And Method Of Manufacturing The Same - Patent 8153531

    pgs. 16
    This application claims priority to and the benefit of Korean Patent Application No. 10-2007-0028164, filed on Mar. 22, 2007, in the Korean... ... 
     ...  More »
    Tags: Semiconductor device and method of ma..., Jung, et al., In-young Jung, Choong-youl Im, Application number 11 856-658, Semiconductor Device Manufacturing: P...
     ...  More »
    Categories:Legal › Patents › Semiconductors › 
    3188436 19 views Language: English
    Method For Reducing Sidewall Etch Residue - Patent 8153527

    Method For Reducing Sidewall Etch Residue - Patent 8153527

    pgs. 18
    The present invention relates in general to semiconductor devices and in particular, to the fabrication of semiconductor devices and methods for... ... 
     ...  More »
    Tags: Method for reducing sidewall etch res..., Loh, et al., Soon Yoong Loh, Carol Goh, Kin Wai Tang, Kim Foong Kong, Application number 12 249-970, Semiconductor Device Manufacturing: P..., Active Solid-State Devices (E.G. Tran...
     ...  More »
    Categories:Legal › Patents › Semiconductors › 
    3188436 37 views Language: English
    Methods And Systems For Preventing Feature Collapse During Microelectronic Topography Fabrication - Patent 8153533

    Methods And Systems For Preventing Feature Collapse During Microelectronic Topography Fabrication - Patent 8153533

    pgs. 17
    1. Field of the Invention This invention generally relates to methods and systems for processing a microelectronic topography and, more... ... 
     ...  More »
    Tags: Methods and systems for preventing fe..., DeYoung, et al., James P. DeYoung, Mark I. Wagner, Application number 12 237-070, Semiconductor Device Manufacturing: P..., Etching A Substrate: Processes
     ...  More »
    Categories:Legal › Patents › Semiconductors › 
    3188436 22 views Language: English
    Method For Low Temperature Bonding And Bonded Structure - Patent 8153505

    Method For Low Temperature Bonding And Bonded Structure - Patent 8153505

    pgs. 27
    1. Field of the Invention The present invention relates to bonding of materials at room temperature and, in particular, to bonding of processed... ... 
     ...  More »
    Tags: Method for low temperature bonding an..., Tong, et al., Qin-Yi Tong, Gaius Gillman Fountain Jr., Paul M. Enquist, Application number 12 954-740, Semiconductor Device Manufacturing: P...
     ...  More »
    Categories:Legal › Patents › Semiconductors › 
    3188436 31 views Language: English
    Method For Selective Deposition And Devices - Patent 8153529

    Method For Selective Deposition And Devices - Patent 8153529

    pgs. 27
    COPENDING AND COMMONLY ASSIGNED APPLICATIONS Reference is made to the following copending and commonly assigned U.S. patent application, filed on... ... 
     ...  More »
    Tags: Method for selective deposition and d..., Levy, David H. Levy, Application number 12 622-506, Semiconductor Device Manufacturing: P..., Active Solid-State Devices (E.G. Tran...
     ...  More »
    Categories:Legal › Patents › Semiconductors › 
    3188436 15 views Language: 
    Method Of Manufacturing A Semiconductor Device - Patent 8153530

    Method Of Manufacturing A Semiconductor Device - Patent 8153530

    pgs. 21
    1. Field of the Invention The present invention relates to a method of manufacturing a semiconductor device that includes an optical grating having... ... 
     ...  More »
    Tags: Method of manufacturing a semiconduct..., Tsuji, Yukihiro Tsuji, Application number 12 314-603, Semiconductor Device Manufacturing: P...
     ...  More »
    Categories:Legal › Patents › Semiconductors › 
    3188436 22 views Language: English
    Polishing Method, Polishing Apparatus, And Method For Manufacturing Semiconductor Device - Patent 8153525

    Polishing Method, Polishing Apparatus, And Method For Manufacturing Semiconductor Device - Patent 8153525

    pgs. 25
    S This application is based upon and claims the benefit of priority from the prior Japanese Patent Application No. 2007-85038, filed on Mar. 28,... ... 
     ...  More »
    Tags: Polishing method, polishing apparatus, and method for manufacturing semicond..., Idani, Naoki Idani, Application number 12 055-753, Semiconductor Device Manufacturing: P..., Etching A Substrate: Processes
     ...  More »
    Categories:Legal › Patents › Semiconductors › 
    3188436 36 views Language: English
    Thinning Tungsten Layer After Through Silicon Via Filling - Patent 8153520

    Thinning Tungsten Layer After Through Silicon Via Filling - Patent 8153520

    pgs. 21
    BACKGROUND Tungsten deposition using chemical vapor deposition (CVD) techniques is an integral part of many semiconductor fabrication processes. ... ... 
     ...  More »
    Tags: Thinning tungsten layer after through..., Chandrashekar, et al., Anand Chandrashekar, Raashina Humayun, Michal Danek, Application number 12 534-566, Semiconductor Device Manufacturing: P...
     ...  More »
    Categories:Legal › Patents › Semiconductors › 
    3188436 26 views Language: English
    Method And System For Continuous Large-area Scanning Implantation Process - Patent 8153513

    Method And System For Continuous Large-area Scanning Implantation Process - Patent 8153513

    pgs. 35
    Embodiments in accordance with the present invention relate generally to techniques including methods and a structure for forming substrates,... ... 
     ...  More »
    Tags: Method and system for continuous larg..., Henley, Francois J. Henley, Application number 11 782-289, Semiconductor Device Manufacturing: P..., Material Or Article Handling
     ...  More »
    Categories:Legal › Patents › Semiconductors › 
    3188436 18 views Language: English
    High Planarizing Method For Use In A Gate Last Process - Patent 8153526

    High Planarizing Method For Use In A Gate Last Process - Patent 8153526

    pgs. 12
    BACKGROUND The present disclosure relates generally to the manufacturing of semiconductor devices, and more particularly to a chemical-mechanical... ... 
     ...  More »
    Tags: High planarizing method for use in a ..., Lee, et al., Shen-Nan Lee, Huan-Just Lin, Shih-Chang Chen, Application number 12 499-439, Semiconductor Device Manufacturing: P..., Etching A Substrate: Processes
     ...  More »
    Categories:Legal › Patents › Semiconductors › 
    3188436 22 views Language: English
    Bilayer Dielectric Interconnection Process - Patent 8153532

    Bilayer Dielectric Interconnection Process - Patent 8153532

    pgs. 10
    BACKGROUND This invention describes a method for exposing contacts on separate HFETS, HBTs, HEMTs prior to the final metallization step of an... ... 
     ...  More »
    Tags: Bilayer dielectric interconnection pr..., Fields, Charles H Fields, Application number 12 328-102, Semiconductor Device Manufacturing: P...
     ...  More »
    Categories:Legal › Patents › Semiconductors › 
    3188436 21 views Language: English
    Surface Characteristics Of Graphite And Graphite Foils - Patent 8153528

    Surface Characteristics Of Graphite And Graphite Foils - Patent 8153528

    pgs. 9
    1. Field of the Invention The invention relates generally to preparation of non-silicon substrates for use in a photovoltaic device. 2. Description  ... 
     ...  More »
    Tags: Surface characteristics of graphite a..., Hendler, et al., Larry Hendler, Sharone Zehavi, Tanya Dulkin, Raanan Y. Zehavi, Application number 12 950-725, Semiconductor Device Manufacturing: P..., Active Solid-State Devices (E.G. Tran...
     ...  More »
    Categories:Legal › Patents › Semiconductors › 
    3188436 19 views Language: English
    Method Of Ball Grid Array Package Construction With Raised Solder Ball Pads - Patent 8153516

    Method Of Ball Grid Array Package Construction With Raised Solder Ball Pads - Patent 8153516

    pgs. 12
    1. Field of the Invention This invention relates generally to the field of integrated circuit packaging. 2. Description of the Related Art In the... ... 
     ...  More »
    Tags: Method of ball grid array package con..., Harvey, Paul Marlan Harvey, Application number 12 857-832, Semiconductor Device Manufacturing: P...
     ...  More »
    Categories:Legal › Patents › Semiconductors › 
    3188436 22 views Language: English
    Wafer-level Stack Package - Patent 8153521

    Wafer-level Stack Package - Patent 8153521

    pgs. 10
    BACKGROUND 1. Field of the Invention Example embodiments relate to a wafer-level stack package and a method of manufacturing a wafer-level stack... ... 
     ...  More »
    Tags: Wafer-level stack package, Kang, et al., Sun-Won Kang, Seung-Duk Baek, Application number 12 962-934, Semiconductor Device Manufacturing: P..., Active Solid-State Devices (E.G. Tran...
     ...  More »
    Categories:Legal › Patents › Semiconductors › 
    3188436 54 views Language: English
    Method For Manufacturing Nonvolatile Storage Device - Patent 8153488

    Method For Manufacturing Nonvolatile Storage Device - Patent 8153488

    pgs. 69
    S This application is based upon and claims the benefit of priority from the prior Japanese Patent Application No. 2009-71974 filed on Mar. 24,... ... 
     ...  More »
    Tags: Method for manufacturing nonvolatile ..., Nishitani, et al., Kazuhito Nishitani, Eiji Ito, Machiko Tsukiji, Hiroyuki Fukumizu, Naoya Hayamizu, Katsuhiro Sato, Application number 12 726-749, Semiconductor Device Manufacturing: P..., Active Solid-State Devices (E.G. Tran...
     ...  More »
    Categories:Legal › Patents › Semiconductors › 
    3188436 20 views Language: English
    1234...13Next »