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					              DARPA/MTO Presentation
                    To BWRC

        DARPA Overview and Mode of Operation
        Microsystems Technology Office Program Directions
        Off Roadmap Technology Opportunity


                                         Lake Tahoe
                                         JUNE 2002



DARPA   Microsystems Technology Office
                                                             Winter DIRO Review 010123
                            DARPA Accomplishments

                        1960
                                                      UCAV                 Global Hawk
       Saturn                          Vela Hotel



                        1970                          TMR
     Ground                                                                  MEMS
Surveillance Radar                     ATACMS                       2000

                                                       JSF
     M-16 Rifle                                                              MALD
                                          JSTARS


                        1980
                                                    Uncooled IR
  Stealth Fighter                         Arpanet                   1990      BAT




DARPA Microsystems Technology Office
  Sea Shadow                                        Taurus Launch            Predator
                                            GPS
                                                       Vehicle                  Winter DIRO Review 010123
   Essential DARPA Interactions

                            Industry            DoD
                            & DoD Military     Service
                                                Labs
                            Support


                                         R&D

DARPA   Microsystems Technology Office
                                                         Winter DIRO Review 010123
                            DARPA Organization
                                                 Director, Tony Tether
                                            Deputy Director, Jane Alexander

 Information Exploitation                  Tactical Technology         Special Projects      Advanced Technology
      Richard Wishner                           Allen Adler              Amy Alving               Tom Meyer
       Steven Welby                             Art Morrish              Joe Guerci             William Jeffrey
                                   Air/Space/Land                  Chem/Bio Def Systems     Assured C3ISR
Sensors                            Platforms                       Counter Underground
                                   Unmanned Systems                Facilities               Maritime
Exploitation Systems               Space Operations                Space                    Early Entry/Special
Command & Control                  Laser Systems                   Sensors/Structures       Forces
                                   Future Combat Systems           Navigation/Sensors/
                                   Planning / Logistics            Signal Processing


 Information Awareness                     Defense Sciences       Information Technology   MicrosystemsTechnology
     John Poindexter                        Michael Goldblatt         Kathy MacDonald           Robert Leheny
      Robert Popp                             Steven Wax               Doug Schmidt              Dave Honey

Asymmetric Threat                      Bio Warfare               Architectures & Designs   Electronics
                                       Defense                   Computer Processing &
                                       Technologies              Storage                   Optoelectronics
Prediction
                                       Biology                   Networks                  MEMS
Behavior Modeling                      Materials &               Human Computing           Combined
                                       Devices                        Interfaces
                                       Mathematics                                          Microsystems
DARPA     Microsystems Technology Office
                                                                                                        Winter DIRO Review 010123
                          Current Focus Areas
                National-Level Problems
                   •    Protection from Biological Attack
                   •    Protection from Information Attack
          •      Operational Dominance
                   •    Affordable, Precision Moving Target Kill
                   •    Offensive and Defensive
                   •    Dynamic Command & Control
                   •    Mobile Networks
                   •    Near-Real-Time Planning, Replanning
                   •    Future Warfare Concepts
                   •    Hard and Deeply Buried Target Classification
                   •    Combined Manned, Unmanned Operations
          •      High-Risk, High-Payoff Technology Exploitation
                   •    Information, Microsystems, Math, Materials
                   •    Intersection of Biology, Information and Microsystems
                   •    Beyond Silicon
DARPA   Microsystems Technology Office
                                                                         Winter DIRO Review 010123
         Potential Future Breakthroughs
   •      Defeat terrorist networks
   • Precision detection, tracking, and destruction
     of elusive targets
   • Characterization of underground structures
   • Combined manned & unmanned attack
     operations
   • Assured use of space
   • Cognitive computer systems
   • Bio-Revolution
DARPA   Microsystems Technology Office
                                              Winter DIRO Review 010123
   DARPA Role in Science and Technology
    Science & Technology $




                                  Service S&T




                                                          Fundamental
                                                           Research

                                   NEAR             MID        FAR
DARPA              Microsystems Technology Office
                                                                        Winter DIRO Review 010123
  DARPA Role in Science and Technology
    Science & Technology $




                                  Service S&T




                                                    DARPA
                                                              Fundamental
                                                               Research


                                   NEAR             MID     FAR
DARPA              Microsystems Technology Office
                                                                        Winter DIRO Review 010123
                                 Internal Technology Flow




                                         DARPA OFFICES



                     Advanced Technology                            Defense Sciences
                     Special Projects    Information Exploitation   Information Technology
                     Tactical Technology Information Awareness      Microsystems Technology

        NEAR                                       MID                               FAR
DARPA   Microsystems Technology Office
                                                                                       Winter DIRO Review 010123
                      DARPA’s Approach
   Strategy
          •      Flexibility, ability to quickly exploit emerging situations is the highest
                 priority
          •      Emphasize high technical risk, high focus investments
          •      Emphasize competition for ideas, reward for quality performance
          •      An investment firm, not R&D lab, no established constituency
          •      Methodically search for and exploit externally generated ideas
   Operations
          •      Flat, small organization, no long-term investments in facilities, themes
          •      Constant rotation of programs, program managers, directors
          •      Continuity provided by industry, other government agencies, customer
          •      Highly flexible contracting, hiring capabilities

               DARPA is DoD’s Enabler for Radical Innovation
               – Broader horizon than commercial analogues
               – More focused than university research
DARPA          – Not bound by military requirements
        Microsystems Technology Office
                                                                                        Winter DIRO Review 010123
        Program Selection
             DARPA’s    primary mission is to effect
              Revolutionary Change
             Applications or extensions of existing
              technology are rarely if ever approved for
              DARPA funding
             There is no set funding level or percentage
              for any focus area
             DARPA programming is bottom-up
             DARPA Management evaluates:
                         Program goals and objectives
                         Program structure and content
                         Whether a program concept represents a
                          Revolutionary versus Evolutionary change
DARPA   Microsystems Technology Office
                                                                     Winter DIRO Review 010123
    Performance
                                                                    Future
                                                  Program
                                                 Deliverables




                                         • What are you trying to accomplish?
                                         • How is it done today,what limits?
                          Today          • What’s really new in your approach,
                                           How much improvement?
                                         • What’s the ultimate impact?
                                         • What are the mid-term, final exams?
                                         • What’s DARPA’s exit strategy?
                                         • How much will it cost?

DARPA   Microsystems Technology Office
                                                           Time
                                                                        Winter DIRO Review 010123
                  DARPA Investment Criteria

   We constantly ask our Technical Directors/Program
   Managers:
          • What are you trying to accomplish?
          • How is it done now, and with what limitations?
          • What is truly new in your approach which will remove
            current limitations and improve performance? By how
            much?
          • If successful, what difference will it make?
          • What are the mid-term, final exams or full scale
            applications required to prove your hypothesis? When
            will they be done?
          • What is the DARPA “exit strategy”?
          • How much will it cost?


DARPA   Microsystems Technology Office
                                                               Winter DIRO Review 010123
                            Program Brief Structure

Concept                                                                      Budget
                                                                 Potential
                  Concept                                       Performers
                  Cartoon                             Program
                                                        Plan
                                         Attributes

    Technical                                            Technical
    Approach
                                                         Approach

                     Technical                Technical
                     Approach                 Approach
DARPA   Microsystems Technology Office
                                                                                      Winter DIRO Review 010123
             MTO Tech Transfer Strategy
             Indirect
        DARPA-to-Industry
           -to-Service
               Path                                                  MTO             34%
                                                                      $$$
                 DARPA
             Establishment                                                          University
              Of Enabling
              Technology
                 Base
                                                       Small        Business               R&D Labs
                                                      Business        Unit              FFRDC/ Defense/
           Defense Community                          $10-100M/yr   $10-100M/yr     Independent/Commercial
            Assimilation of
          DARPA Technology

                                       (DARPA)
                                        System      Defense Community             Commercial Industry
                Services                Offices                                       (COTS)
                System                                Assimilation of
              Development                                                           Assimilation of
                                                       Technology
                                                                                     Technology

                                                Harnessing industry‟s self interest to create new
                Services
               Acquisition
                                             technology and transition to broad use, including use
                                                              in military systems.
                                              Ensure technology develops in a way well-suited for
   Operational System                                        military applications
DARPA Microsystems Technology Office
                                                                                                 Winter DIRO Review 010123
                                         Ok,
                                  that is the how,
                                 where is the what?




DARPA   Microsystems Technology Office
                                                      Winter DIRO Review 010123
Flow of Technology Innovation
                 Applications
                                         Yesterday   Today   Future
                     Systems

                 Subsystems

                      Module

                     Circuits

                      Device

                  Fabrication
                                                MTO
                    Materials

                     Science

                      Investment in Technology Innovation is Investment in
                            Options to be Exercised at Higher Levels
DARPA   Microsystems Technology Office
                                                                        Winter DIRO Review 010123
Real-time Target Identification and
Discrimination
                                                                   Gymnasium
  Compute Power Available to




                                                                   size machine
  AI and Robot Programs




                                                                                                          > 10,000 X‟s




                                                                                                           Chip Scale




                                From Hans Moravec CMU, http://www.transhumanist.com/volume1/moravec.htm



DARPA                          Microsystems Technology Office
                                                                                                                    Winter DIRO Review 010123
Intelligent Microsystems Technology
Intelligent Chip - scale Microsystems
through Heterogeneous
Integration to create              APPLICATIONS

Dynamic Adaptability                 CONTROL
                                                 ALGORITHMS

                                               ARCHITECTURE


                                                Analog/
                                                  RF
                                         Digital               MEMS
                                         Electronics




                                                   Photonics




DARPA   Microsystems Technology Office
                                                                      Winter DIRO Review 010123
Platform Scale Information Systems

                                                  Memory
         RF                                                     Controller
         w
                                         Analog
        MMW                                                                    Human Interface
                                                                              Human Interface
         IR                                  Switching
                                                                             Machine Interface
                                                                             Machine Interface
                   Sensor(s)                                       I/O        Weapon Interface
        UV                                                                   Weapon Interface
                                                                              Network Interface
                                                                             Network Interface
                                                      Digital
    Visible                                                                       Output
                                                                                   Output
                                              A/D
                                              A/D
        Bio
                                                  Processor(s)
            Sense                                                                   Actuate
                                                    Process

            What we’re talking about when we talk
              about Chip-scale Microsystems
DARPA   Microsystems Technology Office
                                                                                              Winter DIRO Review 010123
   Wow,
  Where is
the COTS?!
Heterogeneous Integration
Employ the right junction for the function


                                                                Fabrication of disparate
                                                                 components, materials and
                                                                   devices for:
                                                                   • Increased bandwidth,
                                                                   • Reduced power,
                                                                   • Low noise RF integrated
                                  RF power        III-V
logic NMOS logic PMOS             Generation or   optoelectronic     electronics
                                  LNA             device




              What we’re talking about when we talk
               about a Heterogeneous Integration
DARPA     Microsystems Technology Office
                                                                                    Winter DIRO Review 010123
Microsystems Technologies
      Chip-scale Microsystems through
      Heterogeneous Integration
   Digital-Analog/RF
                                                                        MEMS RF Resonator
     Mixed Signal
                                               Analog/                     MEMS RF Resonators
                                                 RF                        MEMS RF Signal Processing
                                                                           MEMS RF Switch
                                       Digital                   MEMS
           Micro-optics                Electronics
 VLSI-Photonics
   (ROE,DOE, HOE…)




          OE array
  (GaAs/III-V, VCSEL/PD..)
                            VCSELs

              ASIC
                                                     Photonics
  driver
           (Si-CMOS)                                                                Uncooled
            Other Logic
                                                                                    IR Sensor
                                                                              MEMS Opto-Steering
                             PDs
                                                                            MEMS IR Bolometers
                          VLSI-Photonics
                                                                            MEMS Opto Switching
                          RF-Photonics
                                                                            MEMS Biochips
                          Optical Signal Processing
DARPA        Microsystems Technology Office
                                                                                             Winter DIRO Review 010123
   DARPA Si Microelectronics Characteristics
        Driving Force
                Increase performance/functionality of military
                 relevant electronics technology
                Reduce TTM and/or cost of fielding
                 microelectronic systems
        Program Philosophy
                Ahead of the ITRS roadmap
                Off the roadmap



DARPA   Microsystems Technology Office
                                                                  Winter DIRO Review 010123
                     DARPA Si Microelectronics
                      Program Characteristics
          Key Goals
                 Facilitate availability of advanced COTS for DOD applications
                 Explore hyperintegration options based on Si platform
                 Exploit DSM devices to provide high frequency, wide bandwidth RF
                 Develop design environment infrastructure that:
                     –   Achieves short cycle concept to layout
                     –   Intelligently trades power and performance
                     –   Effectively integrates analog and digital functions on a single chip
                     –   Compensates for device variability to deliver required circuit performance
                     –   Allows in sitv adaptability to environmental changes
                     –   Provides capability for rapid reprogramability
                 Explore non-traditional approaches
                     –   Strained and alloy layer devices
                     –   EM based chip interconnects
                     –   Molecular and macroelectronic devices
                     –   Electronic textiles and flexible electronics
                 Focus on critical enabling technologies
                     – Lithography
DARPA                – A/D converters
        Microsystems Technology Office
                                                                                              Winter DIRO Review 010123
                 DARPA Responses to Red-brick Wall
                                                Intel8080
 Feature size (nanometers)




                             1000nm               Intel386

                                                            Intel486
                                                               Pentium                    Circuit, architecture, SiP, software
                                                                                          advances (compensate for
                             100nm
                                                                 PentiumIII               performance degradation)
                                                                                          NanoMOS (overcome existing
                                                                                          planar CMOS issues
                                                                                          Moletronics (new materials for new
                              10nm                                                        devices)
                                                                                          LAMPEtronics (low cost, flexible,
                                                                                          size insensitive, distributed)
                               1nm
                                 1970             1980          1990     2000    2010   2020   2030     2040     2050
                                                                                Year
DARPA                          Microsystems Technology Office
                                                                                                                     Winter DIRO Review 010123
  Focus Center Research
  Program
   •     Goal is to create new options and initiate
         disruptive technologies through exploratory
         research focused toward the long-range needs of
         the entire semiconductor technology community.
   •     Major impact of this research is intended to be at,
         beyond, or off the 8-12 year horizon of the
         International Technology Roadmap for
         Semiconductors (ITRS).
   •     DARPA participates to drive technology
         development toward solving problems with
         military relevance, generate new MTO programs.



DARPA   Microsystems Technology Office
                                                          Winter DIRO Review 010123
                                   Solution to Research Gap
                98                                   01                       04                       07                           10                  13
                                Industry
                                • Largely company
  Increasing Cost of Research



                                  specific
                                • Product emphasis




                                                                                                                                                               Increasing Risk
                                                         SEMATECH &
                                                          SUPPLIERS                              8 - 12 yr impact
                                                         • Largely tool specific
                                                         • Manufacturing
                                                                                 SRC
                                                           Efficiency
                                                                                 • Narrow technology
                                                         • Industry standards
                                                                                   choices
                                                                                 • Identify path to
                                                                                   commercialization         MARCO: Subsidiary of SRC
                                                                                 • Emphasize technology      • Expand knowledge base
                                                                                   transfer                  • Create new choices
                                    Industry                      SRC
                                                                                 • Student emphasis          • Fund university facilities & equipment
                                                                                 • Customer fee allocation

                                                             SEMATECH
                                                                                         MARCO
                                                                                           SRC
                                                                                                                    MARCO
                                                                 Industry             SEMATECH                         SRC                     MARCO

                                        N                        N+1                    N+2                         N+3                        N+4
                                                                                                                                  Product Generation
DARPA                           Microsystems Technology Office
                                                                                                                                                        Winter DIRO Review 010123
MicroElectronic Device Technology
Application:
                                       RF/Analog     Data    High Speed High Gate
              Research                 Processing Conversion   Digital Count CMOS
               Switch            LNA, Mixer, PLL, Video   Mux, DeMux,         DDS,          Digital Processing,
                                  Processing, LogAmp,           A/D     High Speed FIR, IIR Tuner, FIR, IIR, FFT,
                                      Power Amp                                                T&C, Control
Performance




                Managing Performance
                                                          InP
  Speed, f




                                                             GaAs                          nano-CMOS
                                                                SiGe


                                                                          CMOS
                                                                            Managing Complexity


                                                                 Density: Transistors/Chip
  DARPA         Microsystems Technology Office
                                                                                                        Winter DIRO Review 010123
   Advanced Microelectronics
   Daniel J. Radack

                                            Build transistors and
                                             microstructures with sub 25nm
                                             features and useful terminal
                                             characteristics (gain, drive, shut-
                                             off, integratability) for DoD
                                             electronic systems at tera-scale
                                             (1E12/cm2) integration
                                            Transitioned results to industry
                                             resulting in extension of
                                             industry’s technology roadmap
                                             for semiconductors from 70nm to
                                             25nm.



DARPA   Microsystems Technology Office
                                                                       Winter DIRO Review 010123
Technology for Efficient, Agile Mixed
   Signal Microsystems (TEAM)
                                                                                       Goal: > 200GHz (Ft) devices
                                                                                        compatible with DSM CMOS for
Cut Off Frequency, FT (GHz)




                              1,000
                                                                                        high performance mixed signal
                                                                           DARPA
                                                                                        systems-on-chip.
                                100           III-V‟s
                                                                                       Challenges:
                                 10                              Silicon
                                                                                          Device level: Analog/RF perform-
                                      1
                                                           FT  L-2                         ance at low voltage, Integrated
                                                                                            passives, Subthreshold leakage
                                                1000nm          100nm        10nm
                                                                                           Circuit Level: Noise Immunity,
                                                          L (channel length)
                                                                                            Signal Isolation, Achieving projected
                                                                                            performance based on device IVs,
                                                                                            Power dissipation
          DARPA                           Microsystems Technology Office
                                                                                                                        Winter DIRO Review 010123
     System on Chip (SoC) Technology Drivers
Commercial SoC Drivers                        DoD SoC Drivers




   Wireless applications                 • Defense applications
        Cellular phones                     – Radar
        Wireless LAN                        – SIGINT
        Bluetooth                           – Communications
   Low performance (cost driven)         • High performance (TEAM, MSP)
        High noise figure (5-10 dB)         –   Low noise figure (<1 dB)
        Low dynamic range (20-40 dB)        –   High dynamic range (>90 dB)
        Narrow bandwidth (<50 MHz)          –   Wide bandwidth (1 GHz)
        Low computation (<1 GOPS)           –   High computation (1,000 GOPS)
DARPA    Microsystems Technology Office
                                                                      Winter DIRO Review 010123
   The Evolution of the Digital Receiver
1960                                                                  Audio
                                                                      Amp
                                                                                            1.5 ft3
            RF            IF1           IF2      Detector /
1970        Amp          Amp            Amp     Demodulator
                                                                                            60 Lbs
                                                                                            350W
                                                  Analog
                  LO1           LO2
1980                                                          100 x    Performance


1990        RF            IF1         IF2
                                                A/D
                                                          Digital
                                                          Signal
            Amp          Amp          Amp                                                                0.7 ft3
                                                        Processor
                                                                                                         40 Lbs
                  LO1           LO2                                                                      150W
                                                40,000 x   Performance


2000        RF            IF1
                                  A/D
                                              Digital
                                              Signal
                                                                                                    0.3 ft3
            Amp          Amp                                                                        20 Lbs
                                            Processor                                               75W

50nm CMOS         LO1
   SOC                                400,000 x Performance

                                                                                     0.03 ft3   (Includes
                                  Digital                                                         Power
            RF                                                                       5 Lbs
                        A/D       Signal                                                          Conv)
            Amp                                                                      15W
2010                            Processor
                                                                                                BAE

 DARPA Key Technologies: A/D Converter, DSP, RF MMICs, Algorithms, SoCs
       Microsystems Technology Office
                                                                                            Winter DIRO Review 010123
          Potential TEAM Technology
          Applications
                                       FLTSAT                                                     Discoverer II


       E-3 AWACS
                                  Secure Comm                                   Tier II+ UAV
                                                                                                     GMTI
                                                     RC-135V Rivet Joint                             SAR
            Airborne Early Warning                                                                   STAP
       (Space-Time Adaptive Processing)                                            SAR
                                                        SIGINT


                        E-2C Hawkeye
                                                                     Standard
                                                                      Missile




                                            Aegis Cruiser

                                                                                     GBR                    TEL

                                                                                                                              Small U
                                         Signal  Digital                                                    THAAD             Operatio
                                       Processor Array
                                        Upgrade Radar
                   Towed Sonar Array




 • Dynamic range is a key limiting factor in wideband sensor system performance
 • Low power, high throughput implementation required
 • Principal enabling technologies: AMS circuits, nonlinear equalization, VLSI architecture
DARPA Microsystems Technology Office
                                                                                               MIT Lincoln Laboratory
                                                                                                                  Winter DIRO Review 010123
     Industry Leadership SiGe HBT
     Performance
    New bipolar transistor structure to reduce parasitics
    Breaking perceived performance limits of silicon technology without
     aggressive lithographic scaling
    Customers perceive bipolar raw performance as disruptive change
           50 - >200 GHz in 3 years; goal for this program is 300GHz

            • Current gain cutoff frequency                             Courtesy IBM
            +75% from prior generation
                •207 GHz
                •180 GHz at 1 mA
            • Power gain cutoff frequency
            +85% from prior generation
                    •285 GHz U fmax
            •This device will be at the
            center of the next generation
            SiGe HBT technology:
DARPA       BiCMOS8HP
        Microsystems Technology Office
                                                                            Winter DIRO Review 010123
 Northrop                                                                     L.O.
                                                                                                   Wideband Functions
                                                                                                (SIGINT, SAR, GMTI, etc)                                          Low Cost
 Grumman                                                                                                                                                          Receiver
                                                                                                                                                                  On a Chip
                        RP         Tunable                                                                                                     Narrowband
                                      or                           Digital                                     - ADC          Decimation
                         +                           LNA                                          BPF                                           Functions
                                   Switched                      Attenuator                                    Modulator        Filter       (FCR, Elint, Etc.)
                       AGC                             (1)                               (1)
                                     BPF                                               Mixer
                       (1)         Assembly    (3)                   (3)                           (3)             (1,2)             (1,2)

                                 To be designed, fabricated and tested on the program

                                To be designed and studied in the system design task


         Generic Monolithic receiver Module can implement Digital Beamforming and Multi-channel receivers
         for SIGINT, SAR, GMTI, FCR, ELINT and other RF functions. ((1) High Speed Devices (2) Mixed Signal
         circuits (3) Integrated Passive Circuits)



                      RF                               Monolithic Receiver
                      in
                                                                                                                     To Digital Processing
                                              Monolithic Receiver
                                          Monolithic Receiver
        Multiple wafer scale integrated generic receiver circuits can implement the front end of digital
        adaptive beamforming or multi-function RF receiver systems.

                        The use of Advanced SiGe will enable an order of magnitude reduction in size, weight and
                                                       powerof digital receivers.
                        Technology                                                   Size                                  Weight                     Power

                        Conventional (Circa 2005)                                    3 inch 3                              .3 lbs.                    35 W

DARPA                   Advanced SiGe digital
        Microsystems Technology Office
                                                                                     < .25 inch 3                          <.025 lbs.                 1.5W
                        Receiver on a chip
                                                                                                                                                                      Winter DIRO Review 010123
                           Mixed Signal Circuits:
                              Noise Isolation
                                           Source, Drain, and
                                           Channel Engineering            Wideband On-chip Coax
       Metal “T” Gates
 Increase
 Gate Oxide
 Thickness
                 n+       p       n+           p+   n   p+



                                                                        Multi-level          CENTER
                        Sapphire Substrate                              Interconnect         CONDUCTOR
                                                                        Layers

                                                                                            OUTER
                                                                 Crosstalk < required SNR   CONDUCTOR
                                                                 (typically 80-100dB)

• Isolation for high speed nano-scale devices
• Shielded interconnects for eliminating parasitics (i.e., cross-talk)

                      RF Compatible Silicon Substrates Are Available
 DARPA    Microsystems Technology Office
                                                                                               Winter DIRO Review 010123
    Passive Component on RF Silicon CMOS Layout Concept




                                         Capacitor     Matching Network


                           Inductor              RF MEMS

          Ground Interconnect




                   MOSFET                     MOSFET



DARPA   Microsystems Technology Office
                                                                          Winter DIRO Review 010123
    NeoCAD
    Anantha Krishnan
  Advanced Military Systems Require High Performance Mixed Signal Electronics


                                                                                         Digital
Design effort                       Digital

                                                                                         Analog


   Analog                                     Battlespace Dominance
                                              Battlespace Dominance
                                                                                       UAV             X
                                                                                 JSTARS
                                                                         Satellite                            II
                                                 Mobile Apps Support
                                                 Mobile Apps Support
 Key Obstacle:                                                                                                                                       PLT LDR


Unacceptable design                              Networking Mobile
                                                  Networking Mobile                                                                               OOO
                                                                                             DS ARTY
                                                Wireless & End-to-End
                                                Wireless & End-to-End                                                I
                                                                                                                                 FIST
                                                                                                              BN TF CDR

                                                                                     BRIG
  time, cost and risk                              Wireless Nodes
                                                   Wireless Nodes
                                                                           CONUS
                                                                            CONUS
                                                                        Split Base Ops
                                                                        Split Base Ops
                                                                                           A DE
                                                                                                   BATA
                                                                                                                          M1A2


                                                                                                           LLIO
                                                                                                               N CO
                                                                                                                                        OOO


                                                                                                                          MMA
                                                                                                                                   ND



   Current approach is based on ad hoc design methods and on „experts‟
                with knowledge and experience (intuition)
DARPA   Microsystems Technology Office
                                                                                                                                         Winter DIRO Review 010123
Automated Design Tools for Integrated Mixed Signal
Microsystems (NeoCAD)
Anantha Krishnan
                                                              Goal
                                                                To develop and demonstrate
    Integrated                                                   innovative methods and automated
Electronic-Photonic                                              CAD tools that will reduce the design
      Systems                                                    cycle time and cost by a factor of 10
                                                                 to 100 for Mixed Signal and Mixed
                                                                 Electronic/ Photonic Systems.

                                                                  Design Automation for Mixed
                                                                        Signal Systems

                                                              Challenges
                                                                 Develop Fast Methods for Parasitic
                                                                  Extraction in Mixed Signal Circuits
                                                                 Create Behavioral Models and Model
                                                                  Libraries for Mixed Signal
   New Tools and                                                  Components and Circuits
   Methodologies                                                 Develop design flow methodology,
                                                                  synthesis tools, verification and
                                                 Mixed            optimization tools for mixed signal
                                             Digital-Analog       circuits
                                                Systems          Demonstrate capabilities on military
  DARPA     Microsystems Technology Office
                                                                  relevant mixed signal circuits
                                                                                                Winter DIRO Review 010123
   Intelligent RF Front-Ends
   “Digital Control of Analog Circuits”

                                                                      Impact:
  Battlefield environment is unpredictable                            This technology will enable:
     asymmetric and rapidly changing
                                                                      • RF Sensor adaptability (real
                                                                        time)
    AWACS Tx                             rf environment
                                             sensing
                                                                      • Platform Multifunctionality
                                                                        (Radar/EW/Communication
                  TRW Picture                    Stealthy UAV
                                                                        assets).
                                                   bistatic
                                                    radar
                                                                      • Training and mission
         Lincoln Lab: Comm.                stealthy SAM
                                                                ESM     reconfiguration in actual time
                                          adversary
                                                                      • Narrow band performance
                                                                        over broad bandwidth
                                                 SAM




               “ Chips that can think” enabling system adaptation to
                       rapidly changing threat environments

DARPA   Microsystems Technology Office
                                                                                                  Winter DIRO Review 010123
   Intelligent RF Front-Ends
   “Digital Control of Analog Circuits”

                                                           Goals:
                                                           Demonstrate a new class highly adaptable,
        Intelligent Microsystems                           highly integrated RF/analog component where
                                                           embedded digital control is used for self-
                                                           assessment and adaptation in real time,
                                                           optimizing component analog precision and
                                                           performance providing new levels of
    Adaptable Networks   RF Device    Adaptable Networks
                                                           functionalities that will be needed for the next
               Adaptive RF Components
                                                           generation of multifunctional RF sensor,
                                                           communication, and weapon systems.


                Digital “Intelligent” Control

                                                           Technical Challenges:
                                                           • Continue self-assessment
                                                           • Real-time adaptation
                                                           • Heterogeneous integration of mixed-signal
                                                             technologies


DARPA   Microsystems Technology Office
                                                                                                      Winter DIRO Review 010123
   Beyond MMIC’s
                                                                           Z-Tunable
                                                                           Networks
                                             RF/analog Device
                                                                                 Embedded
                                                                                  sensor


                                       Z-Tunable
                                       Networks
                                                             Intelligent
                                                              Control
      MMIC Amplifier                        External Input




        Limited ability to modify            Designed to adapt to changing
         operation                             operating conditions (Real time
     Optimized for a particular               reconfigurability)
         operating condition                  Continue self testing, self
     Rely on consistent fabrication           assessment and self
         processes and device models           optimization
     Bandwidth-performance trade-            Tolerant of device and
DARPA Microsystems Technology Office           fabrication process variations
         off
                                                                                            Winter DIRO Review 010123
Photonics Technology
Thrust Areas
  Processing and Interconnects - Develops photonics signal
        and data processing components and subsystems to
        demonstrate performance enhancements and size/weight
        reduction over conventional processing methods.




  RF Photonics - Develops photonics RF components and
        subsystems to demonstrate performance enhancements and
        size/weight reduction over conventional RF designs.




DARPA    Microsystems Technology Office
                                                                 Winter DIRO Review 010123
SensorCraft
Photonics Applications
                                            Digital
                                           Receivers
   Antenna
   Remoting                                                     Analog/
                                                                 Digital
                                                                 Signal
                                                              Distribution/
                                                                Routing




 TTD Beam Formation                                          RF/Timing
   Beam Steering                                               Signal
                                          Photonic Based     Generation
DARPA   Microsystems Technology Office
                                         Signal Processing
                                                                      Winter DIRO Review 010123
Space Systems
Photonics Applications
                                          Digital
                                         Receivers
    Antenna
    Remoting                                            Analog/
                                                         Digital
                                                         Signal
                                                      Distribution/
                                                        Routing




  TTD Beam Formation
    Beam Steering                                    RF/Timing
                    Photonic Based                     Signal
                   Signal Processing                 Generation
DARPA   Microsystems Technology Office
                                                              Winter DIRO Review 010123
   University Opto Centers
   Ravi Athale
  Goal
        Guide and focus university research visions to meet future
         DARPA/MTO program needs


  Challenges
     Focusing university research onto DARPA needs without stifling
      creativity
     Creating vibrant interaction between university researchers (multi-
      disciplinary and multi-institution)
     Transition “best-of-class” to DARPA industrial contractor base


        Universities are the “eigen-institutions” for science-to-technology
                   transformation and out-of-the-box innovation

DARPA   Microsystems Technology Office
                                                                         Winter DIRO Review 010123
DARPA and University Research Process Flow

                                                  Raw Input                              Unbiased
         DARPA                                                                           Intellect
        Program                   Visions/
        Manager                Direction and
                                                                    Students
                                   Goals
                                                                                              Creative Insights
                                                                                              Leads to Multiple
                                                                                                   Paths

                                           Expert
                                           Mentor
                                          (Advisor)
                                                                                         Initiation and

                                         Unforeseen Barrier                              Transformation
    New DARPA
     Programs

                                                                 Revolutionary
                                                                  Advances
                                                                                          Graduates

                                            Direct Support of
               Transition                   Current Programs
                                                                Spin-offs/Commercial &
                                                                 Defense Companies

DARPA   Microsystems Technology Office
                                                                                                          Winter DIRO Review 010123
Platform Scale Information Systems

                                                  Memory
         RF                                                     Controller
         w
                                         Analog
        MMW                                                                    Human Interface
                                                                              Human Interface
         IR                                  Switching
                                                                             Machine Interface
                                                                             Machine Interface
                   Sensor(s)                                       I/O        Weapon Interface
        UV                                                                   Weapon Interface
                                                                              Network Interface
                                                                             Network Interface
                                                      Digital
    Visible                                                                       Output
                                                                                   Output
                                              A/D
                                              A/D
        Bio
                                                  Processor(s)
            Sense                                                                   Actuate
                                                    Process

            What we’re talking about when we talk
              about Chip-scale Microsystems
DARPA   Microsystems Technology Office
                                                                                              Winter DIRO Review 010123
Real-Time Embedded
Signal Processing




 • 11.4 miles wire
 • 1,200 lbs
 • 138 K connections




DARPA   Microsystems Technology Office
                                         Winter DIRO Review 010123
                   TEAM & MSP Help Address DoD Applications
                                      Left
                  Void by Orthogonal Commercial Market Thrusts
    Device power/size affected
     by product of sample rate and                                                                 Advanced DOD
                                                                                                      Sensor

     operations per sample                                                                          Applications



    Commercial markets address:




                                                Operations/Sample
         Communications:
            – High sample rate, low ops                             Pentium
                                                                    PowerPC
         PC/Workstation:
            – High ops, lower sample rate                                      System
                                                                              on a Chip
         System on Chip:                                                       (SOC)

            – Moderate combination                                                  40 Gb SONET

    DoD Sensor Systems Require:                                                 Sample Rate (samples/s)

         High sample rate (High sensor bandwidth, multi-channel)
         High processing operations per sample (Adaptive processing, advanced
          waveforms)


DARPA    Microsystems Technology Office
                                                                                                           Winter DIRO Review 010123
               Wideband Channelized Receiver
                  Architecture Alternatives
 Analog Channelized
  Receivers (50 of                               Digitally Channelized Receivers
 20-MHz BW Receivers)                        (1-GHz BW Receiver & Digital Channelizer)


                                         With COTS    With MSP With MSP & With MSP,
                                                               Nonlin. EQ. Nonlin. EQ.,
                                                                            & TEAM




        90-dB SFDR                       65-dB SFDR   65-dB SFDR   90-dB SFDR   90-dB SFDR
           12 ft3                           1.5 ft3      0.2 ft3      0.2 ft3     0.01 ft3
          1,000 W                           200 W        30 W         40 W         15 W
DARPA   Microsystems Technology Office
                                                                                    Winter DIRO Review 010123
               Program Concept
               Adaptive Computing Systems


                                       High Level Design Entry

                                         Khoros, MatLab, C/C++,
                                              SA-C, Java




        Simulator            Compiler
                                                    Precompiled
                                                  ACS components     Design Tools
                                 VHDL/Verilog       and libraries   and Compilers
 Debugger        Place & Route                         VSIPL




                                                                             Hardware
                                                                                and
     Devices               Modules                                          Applications

  Near custom efficiency without custom point solutions
  New missions enabled with ACS
  Verification issues have been
DARPA Microsystems Technology Office addressed
  Direct compilation from algorithm to FPGA demonstrated                           Winter DIRO Review 010123
                                                           Problem: Obtain Custom Performance Without
                                                                      Custom Design Time
                                                                                   Mission Specific Processing
                                                                                                                                     Discoverer II development timeline
                          Hours




                                                                                                 Time (months)
                                                                                                                 25
                                                                                                                 20                      Fabrication
                                                              Programmable(RISC/DSP)                             15                      Design
                                                              .06 GOPS/W, 60 GOPS/cu.ft.                         10
                                                                                                                  5
                                                                                                                  0




                                                                                                                                                      S
                                                                                                                        l ls




                                                                                                                                                      s




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                                                                                                                                                     a
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                                                                                                                                                                        d
                                                                                                                                                                       to
                                                                                                                                                  hm
Design Time (Prototype)




                                                                                                                                 s in




                                                                                                                                                   at
                                                                                                                      ce




                                                                                                                                                                    ee


                                                                                                                                                                                 VL
                                                                                                                                                                   dia
                                                                                                                                                IM




                                                                                                                                              rd
                                                                                                                                               rit
                                                                                                                               ca
                            (ACS)




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                                                                                                                 TR




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                                                                                                                                                                 ra
                                                                                                                                            go


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                                                                                                                                                                we
                                                                                                                           TR
                                                                                                                                                                       VLSI drives
                            Days




                                                                                                                                         ra
                                                                                                                                         al




                                                                                                                                                              po
                                                                                                                                                  Component technology schedule/risk


                                                         Reconfigurable Processors(ACS)
                                      (COTS CAD)




                                                         1 GOPS/W, 1K GOPS/cu.ft.                                                                          Goal
                            Months+




                                                                                                                      No design
                                                                                                                      penalty

                                                                             Gate Array ASICs                                              Customized ASICs
                                                                             7 GOPS/W, 7K GOPS/cu.ft.                                      100 GOPS/W, 30K GOPS/cu.ft.
   DARPA                                    Microsystems Technology Office
                                                                                  Performance(Throughput/W•cu.ft.)                                                           Winter DIRO Review 010123
                              MSP Provides Continuous
                        Performance/Power Improvement Over
                               Standard Cell Approach
                                                  Yrs
                 10000


                                                                                   Mths
                 1000
 GOPS per Watt




                                                         MSP Channelizer/
                                                         Beamformer




                                                                                          Design Time
                                                                                   Wks
                  100
                           MIT/LL
                           channelizer
                                   Program A             Program B
                                   Channelizer
                               EW                        Channelizer               Days
                   10      Channelizer
                                         Program B        M1
                                         Beamformer
                                               Virtex II

                                                          TI C64xx
                                 Virtex I                                          Mins
                    1                 TI C62xx        Altivec                              Legend
                                  Hammerhead
                                  SHARC
                                                                                           Hand-Crafted Custom
                                                      AltiVec-4K FFT                       MSP Optimized Cells
                                                                                           Standard Cell
                    1996                    2000                2004        2008           ACS / FPGA
DARPA               Microsystems Technology Office
                                                                                           COTS DSP
                                                                                                        Winter DIRO Review 010123
   How about off the roadmap
   electronics, what would that
   be?




DARPA   Microsystems Technology Office
                                         Winter DIRO Review 010123
   Organic Thin Film Transistors
   Electronics Anywhere
                                         T. N. Jackson
        Center for Thin Film Devices and Materials Research Institute,
                 Electrical Engineering, Penn State University




DARPA   Microsystems Technology Office
                                                                         Winter DIRO Review 010123
 Large-Area Macroelectronics (LAME)
             Workshop

                                         Dr. Bob Reuss
                                          DARPA/MTO
                                          May 29, 2002
DARPA   Microsystems Technology Office
                                                         Winter DIRO Review 010123
                        LLNL Poly-Si TFTs on Plastic
                                      Paul G. Carey, Patrick M. Smith, Paul Wickboldt, and Steven D. Theiss
                                         Lawrence Livermore National Laboratory, Livermore CA 94551


        Substrate = Polyester
        Thin Film Materials = Si, SiO2, Al, ITO                                                                                  Transistor Process Flow
        Deposition Technologies = Sputtering, PECVD
        Etching Technologies = Plasma, Wet Chemical
        Maximum Processing Temperature = 100°C
        Maximum Anneal Temperature = 150°C
        Si Crystallization = 308nm XeCl Excimer Laser
        Si Doping = Gas Immersion Laser Doping
        Number of Photolithography Steps = 6




                                                Transistor I-V Curves
                               µn = 7.5   cm2/V-sec
                     10 -3                                                                    7.0
                     10 -4
                                   VDS = 15V                                                  6.0
                     10 -5
                                                                                                              VGS = 30V
                     10 -6                                                                    5.0
        IDS (Amps)




                                                                                  I DS (µA)




                     10 -7                                                                    4.0
                     10 -8
                                               VDS = 0.1V                                     3.0
                     10 -9
                                                                                                              VGS = 27.5V
                     10-10                                                                    2.0
                     10-11
                                                                                              1.0             VGS = 25V
                     10-12
                     10-13
                                                   wafer 7-7-96 #2 Die L12

                                                                                              0.0
                         -10   0     10 20 30               40               50                     0   5        10         15
                                     VGS (Volts)                                                        VDS (Volts)
DARPA      Microsystems Technology Office
                                                                                                                                                           Winter DIRO Review 010123
        Poly-Si CMOS circuits on steel
        foil

                                         Put figures here




  Can process up to 950 oC due to stability of steel
  Barrier layer prevents contamination of from steel
  Have shown self-aligned poly-gate TFT’s
DARPA   Microsystems Technology Office
                                                            Winter DIRO Review 010123
                  Low-Cost Electronics on Arbitrary Substrates
                                                                                               Polymeric substrate AMLCD
                       Electronics Anywhere                                                        (mouse click to view)




                                          Electronics on                                                                   Cathode
                                            a key ring                                        -Plastic photovoltaics

                                                                      Al cathode
                                                                                                             Source
                                                           Alq / TPD double-layer LED stack     Integrated
                                              Pd source   Pentacene active TFT layer            OLED/OTFT
                                                            SiN gate dielectric                    pixel
                                                            ITO gate electrode                                                Gate
                                                          Glass substrate




                                          Integrated OLED/a-Si:H TFT pixel




Pentacene organic circuits
DARPA Microsystems Technology Office on
    polymeric substrate
                                                                                                                 Winter DIRO Review 010123
   Polaroid Roll-to-Roll Display Processing
                                         Bill Smyth - smythw@polaroid.com




                                                               Roll-to-Roll laser etching
                                                               for electrode patterning




 Roll-to-Roll display
 assembly


DARPA   Microsystems Technology Office
                                                                                   Winter DIRO Review 010123
Molecular-level, Large-area Printing (MLP)
Christie Marrian
                          Interconnects
                                                Objective
  nm-scale features
     printed over                                  Develop high speed (>1cm2/s),
 non-planar surfaces                                flexible and inexpensive
                                                    (1¢/cm2) techniques for
                        Read-out circuitry          generating thin film structures
                                                    having features as small as
                                                    10nm over large-area (1m2), flat
                                                    and curved surfaces (even
                                                    fibers).
                        IR sensor arrays        Impact
                                                   The weight and complexity of an
                                                    imaging system can be
  Doubly curved focal                               significantly reduced if a curved
    surface array                                   focal surface can be used rather
                                                    than a flat focal plane.
   Circuits on Plastically Deformed Substrates for Spherically-Shaped IR Focal Plane Arrays

                                                                              Mechanical Analysis:
                 1998                              0.9 cm                   Strain distribution in the
                                                                          substrate (stainless steel foils)
                                                            Rd = 3.0 cm
                                         Deformation of substrates

                                                                               Mechanical Analysis:
                                                                          Strain distribution in the islands
                 1999
                                                                             by finite element analysis
                                                                           (amorphous Si on polyimide)
                                              Silicon islands
                                                                80 m
                                                                           Device fabrication in islands on
                                                                            flat foils, deform to spherical
                 2000                                                            shape without device
                                                                                      degradation

                              Deformed device islands with TFT’s

                                                                                      Interconnection:
                  2001:                                                     Printing and spherically patterning
                  Circuits                                                     transfer techniques to achieve
                                                                              interconnection between device
                                   Deformed interconnected circuits
                                                                                           islands
DARPA   Microsystems Technology Office
                                                                                                              Winter DIRO Review 010123
        Tube Concept




DARPA   Microsystems Technology Office
                                         Winter DIRO Review 010123
        Wearable Displays




DARPA   Microsystems Technology Office
                                         Winter DIRO Review 010123
          Automotive Applications
Instrument                          Situation Awareness           GPS and Navigation
Panel                                      Rear/side view              Aftermarket and OEM
  System Controls                         Collision avoidance         Rental, truck, luxury markets
  Warning, Caution, Status                                             Maps systems



                                                                       System Management
                                                                             Heating/AC, gauges
                                                                             clock and system status
                                                                             Audio system control



                                                                   Integrated Functions
Entertainment
                                                                      WinCE operating system
Systems                                                               Wireless communications
  DVD
  Satellite                                                          Internet access
                                                                      Personal computing - email,
                                                                       address book
                                                                      Voice synthesis and speech
                                                                       recognition




DARPA     Microsystems Technology Office
                                                                                              Winter DIRO Review 010123
        Large Antenna Arrays for Beamforming

                                         Computational Fabric


                                             array of sensors
                                             (antennas) and
                                               computation




              Need lots of antennae (1000s) placed within
                      half wavelengths of each other
              Large area system
              Lots of computation
              Applies to many situations – focusing, nulling, STAP,
              tracking, sound localization
DARPA   Microsystems Technology Office
                                                                      Winter DIRO Review 010123
                      The “Inflatable Tank” Decoy                               h




                                         Imagine…

                      Large-area flexible fabric with integrated computation
                         (processing, memory, communication, sensors)


                              Looks like a tank, sounds and measures like a tank,
                                 locates enemy fire, but it is a SMART DECOY
DARPA   Microsystems Technology Office
                                                                                    Winter DIRO Review 010123
 System Requirements vs Performance Capability



                                                                 • ASICs
                                                                 • Processors
                                              • SmartCards
                                              • Sensors
                                              • Memory           Higher Transistor
                                                                 Performance


                                             Increased Circuit
                                             Complexity

        Backplanes for
        • Electronic Paper
        • Simple Electronic Tags


DARPA
                                         Performance Capability
        Microsystems Technology Office
                                                                                     Winter DIRO Review 010123
    Large Area Macro and Plastic Electronics
                Are They Real?

    Could  they be disruptive technology?
    Could they be a companion to Si IC based
     systems?
    Will they only be a niche technology (displays)?
    What are the critical questions?
               What applications make sense?
               What technologies are applicable?
               What is current/future capability?
               What can DARPA do to make a differernce?

DARPA   Microsystems Technology Office
                                                           Winter DIRO Review 010123

				
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