# Experiment 9

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```					 Exp. # 9: Op Amp Applications-II

Faculty of Engineering

Dept. of Communication and Electronics Engineering
Second Semester: 2009/2010

Course Title: Electronics Lab                 Lecturers: Dr. Omar Daoud, Dr. Waka' Farman
Course No.: (650326/227)                                Eng. Wafeiah Al-Shabani

Experiment 9

OP-Amp Applications-II

Group Members:
1)_________________________________
2)_________________________________
3)_________________________________

Electronics Laboratory                                                             9-1
Exp. # 9: Op Amp Applications-II

Experiment 8

Op Amp Applications

Part one: Op-Amp Slew Rate
Objectives:
To demonstrate and measure the slew rate of a 741 operational amplifier

1- Electronic Devices, THOMAS L. FLOYD, Fifth edition.

2- Electronic Devices “a design approach”, Ali Aminian & Marian Kazimierezuk.

Theory
It is defined as the maximum time rate of change of the output voltage of an op-amp in
response to a step input voltage (V/s). The slew rate is dependent upon the frequency
response of the internal stages of the op-amp. Thus, the higher the slew rate, the better
the frequency response of the amplifier.

Equipments Required:
   Resistors (1/4 W): two-10k.
   741 op-amps (8-pin mini-DIP)
 Two 0-15 V dc power supply.
 Signal generator.
   Dual trace oscilloscope.

Electronics Laboratory                                                                  9-2
Exp. # 9: Op Amp Applications-II

Procedure
1. Wire the inverting amplifier circuit shown in the schematic diagram of Figure 9-1and
set your oscilloscope for the following approximate settings:

Channel 1: 5 V/division, ac coupling Time base: 10 s/division, and

Channel 2: 1 V/division, ac coupling Time base: 10 s/division.

Figure 9-1: Inverting Op- Amp               Figure 9-2: Pin diagram of 741 op-amp

input voltage to 5 V    P-P   square wave and the
frequency at 10kHz (the output should have a
trapezoidal shape as shown on Figure 9.3). In
reality, it takes a finite amount of time to switch
Figure 9-3: Input vs. Output
from one voltage extreme to another.

3. Measure both of the Peak-to-peak output voltage (V), and t; and record them in
Table 9.1.

V (V)

t (s)

Slew rate
(V/s)
Table 9-1

Electronics Laboratory                                                               9-3
Exp. # 9: Op Amp Applications-II

REVIEW QUESTIONS FOR PART 1

1. For the circuit of Figure 9-1, using a ±15V supply, the max. possible
output voltage swing is approximately

(a) 5V      (b) 15V (c) 20V      (d) 30V                                    (    )

2. The max time rate of change of the output voltage of the circuit in 9-1
in response to a step input is termed the

(a) gain-bandwidth product        (b) slew rate

(e) output voltage swing          (d) common-mode rejection ratio           (    )

3. The slew rate is usually specified in units of

(a)   V/s      (b) V/s       (c)dB        (d) MHz                          (    )

4. For an op-amp, the slew rate limits the

(a) input impedance (b) common-mode rejection ratio

(c) voltage gain        (d) frequency response                              (    )

5. For the circuit of figure 9-1, if the output voltage swings from +5V to -
10V in 0.5s, the slew rate is

(a)   9V/s        (b)15 V/s (c)20 V/s (d) 30 V/s                        (    )

Electronics Laboratory                                                             9-4
Exp. # 9: Op Amp Applications-II

Part Two: Op-Amp Common-mode rejection
Objectives:
 To measure the common-mode rejection of a 741 operational amplifier.

1- Electronic Devices, THOMAS L. FLOYD, Fifth edition.

2- Electronic Devices “a design approach”, Ali Aminian & Marian Kazimierezuk.

Theory
If the same signal is applied simultaneously to both inputs, called common-mode input,
then the output voltage of an ideal op-amp should be zero. Since the op-amps are not ideal,
then a small finite output will be presented when both inputs are the same. The ratio of the
common-mode input voltage to the generated output voltage is termed the common-mode
rejection (CMR) and it’s expressed in dB. The higher the CMR, the better the rejection
and the smaller the output voltage.

Required Mathematical Formulas:

 Differential amplifier voltage gain:
R2
Ad       , where R1  R3 and R2  R4                                          (1)
R1
 Common-mode voltage gain:

V0( cm)
Acm                                                                           (2)
Vi ( cm)

 dB common-mode rejection:

 A 
CMRdB  20 log  d 
A                                                             (3)
 cm 

Equipments Required:
    Resistors (1/4 W): two-100k, 10 k, and two-100 k.

Electronics Laboratory                                                                 9-5
Exp. # 9: Op Amp Applications-II

    100 k potentiometer.
    741 op-amps (8-pin mini-DIP)
 Two 0-15 V dc power supply, and VOM.
 Signal generator.
    Dual trace oscilloscope.
Procedure
1. Wire the circuit shown in Figure 9-4, and set your oscilloscope to the following
approximate settings:

Channel 1: 2 V/division, dc coupling.

Channel 2: 0.02 V/division, dc coupling.

Time base: 5 ms /division.

2. Apply power to the breadboard, and adjust the input voltage to 10V P-P and the
frequency at 60 Hz.

Figure 9-4: Schematic diagram of the Circuit

3. Using the VOM, measure the rms common-mode input and output voltages, and then
calculate the common-mode voltage gain. Record your results in Table 9-2.

4. Calculate the differential voltage gain and then use it to calculate the decibel
common-mode rejection. Record your results in Table 9-2. (A typical value should be
90dB while the minimum one is around 70dB)

5. Disconnect the signal generator and the dc power to the circuit. Replace R4 with a
series connection of a 100k potentiometer and a 10k resistor. Apply power to the

Electronics Laboratory                                                                    9-6
Exp. # 9: Op Amp Applications-II

breadboard and again adjust the common-mode input voltage to 10Vp-p at a frequency
of 60Hz.

6. Using the oscilloscope to observe the output of the op-amp, adjust the potentiometer
for a minimum output voltage.

7. Repeat step 3 and 4 using a differential gain of 1000. Record your results in Table 9-
3. Do you see any improvements in the CMR?

Measured common-mode input voltage (V)

Measured common-mode output voltage (V)

Calculated common-mode voltage gain

Calculated differential gain

Calculated common-mode rejection, CMR (dB)

Table 9-2

Measured common-mode input voltage (V)

Measured common-mode output voltage (V)

Calculated common-mode voltage gain

Calculated differential gain

Calculated common-mode rejection, CMR (dB)

Table 9-3

REVIEW QUESTIONS FOR PART 2

1. In the differential amplifier, the signal applied simultaneously to
both inputs is the

(a) differential input        (b) noninverting input                   (       )
(c) 3.6 kHz     (d) 15 kHz
(c) inverting input           (d) common-mode input

2. An increase in CMR means an increase in the amplifier’s

(a)input impedance           (b) frequency response                    (       )
(c)voltage gain              (d) noise immunity

Electronics Laboratory                                                                 9-7
Exp. # 9: Op Amp Applications-II

3. Differential amplifier CMR is measured in

(a)V      (b)V/s     (c)dB (d) V/mV                                  (   )

4. If the differential voltage gain is 100 and the common-mode
voltage gain is 0.001, the CMR is

(a) 40dB (b) 60dB       (c) 80dB     (d) 100dB                         (   )

5. For the circuit of Figure 9-4, if the common mode rejection ratio
is 100000:1 and the input voltage is 10Vp-p, the p-p output voltage
is

(a)0.001V (b)0.01V      (c)0.1V    (d) 1V                              (   )

 Conclusions

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Electronics Laboratory                                                           9-8

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