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					            Dynamic Offset
         Cancellation Technique
                         -Individual Study Subject-




Mixed Signal Chip LAB.                                Kyoung Tae Kang
Motivation
 • The input offset voltage is the serious drawback in
 high precision device
 • Offset Voltage in CMOS is larger when compared to
 BJT and BiCMOS
 • For example,
  - For Opamp with Av=100, 0.1mV input offset voltage
 leads 10mV error at output.
  - For series Opamp with Av=100, 0.1mV input offset
 voltage of each stage leads the serious malfunction of
 chip
 • The effective DC offset cancellation technique is
 needed in CMOS
Mixed Signal Chip LAB.                       Kyoung Tae Kang
Offset in Differential Amplifiers

   Differential amplifiers are widely
   used to amplify DC signals

   Balanced structure is

       •Nominally offset free

       •Rejects common-mode and
       power supply interference




Mixed Signal Chip LAB.                  Kyoung Tae Kang
Offset in Differential Amplifiers

       Component mismatch ⇒offset
       e.g. R1≠R2, M1≠M2
       Mismatch is mainly due to
          •Process variation
          •Lithographic errors

       All other things being equal:
       Bipolar ⇒ Vos 0.1mV
       CMOS ⇒ 10-100 times worse!




Mixed Signal Chip LAB.                 Kyoung Tae Kang
Offset Compensation

    • Offsets exist all of the CMOS design

    • But we can reduce offset “enough” by
       – 1.Using “large” devices and good layout
       – 2.Trimming
       – 3.Dynamic offset-cancellation (DOC) techniques

    • But residual offset & frequency drawback still
      remain



Mixed Signal Chip LAB.                       Kyoung Tae Kang
DOC Versus Trimming
   Advantage

   • reduction of offset and 1/f noise
   • excellent long term stability
   • no additional costs for testing

   Disadvantage

   • reduced bandwidth
   • increased circuit complexity
   • aliasing & intermodulation issues


Mixed Signal Chip LAB.                   Kyoung Tae Kang
DOC Techniques

          Auto-zeroing      Chopping

       Sampled data      Continuous
                         time
       Sample offset,
       then subtract     Modulate offset
                         away from DC
                         Complex



Mixed Signal Chip LAB.         Kyoung Tae Kang
Auto-zero Principle (1)




       S1,2 closed ⇒amplifier offset is stored on Caz;
       CMFB
       S3 closed ⇒ output signal is available
       Residual offse ~ Vos/A
Mixed Signal Chip LAB.                         Kyoung Tae Kang
Charge Injection (1)




     Occurs when MOSFETs switch OFF
     Consists of two components
       1.Channel charge, Qch= WLCox(VGS-Vt)
       2.Overlap capacitance between the gate and the
       source/drain diffusion

Mixed Signal Chip LAB.                     Kyoung Tae Kang
Charge Injection (2)




     • Error voltage depends on
          –   Source impedance
          –   Transistor area (WL)
          –   Value of Caz
          –   Clock amplitude & slew rate

Mixed Signal Chip LAB.                      Kyoung Tae Kang
Simulation (1)
         Voltage(V)




                      Before                                                    After     Ck
                                Offset Measure and Stored
                                         @Caz

                                                                                          Vin
      Voltage(V)
  Voltage(v)




                                                                                          Vout



                                                      Enlarged
        Voltage(V)




                       Offset                                                       Vro
        Voltage(v)




                                                                                   Vci    Vcaz
                                                                 Steady State




                                            Time(s)


Mixed Signal Chip LAB.                                                      Kyoung Tae Kang
Auto-zero Principle (2)
             CKb
                                             C1
                                +        -
  Vin                               Av                       Vout
                                -        +
                                             C2
                           CK                           CK




                     VCM                          VCM

        Ck closed ⇒ Differential amplifier offset is stored on
        C1, C2; OOS (Output Offset Storage)
        Ckb closed ⇒ Differential output signal is available
        Residual offset ~ Vos/Av
Mixed Signal Chip LAB.                             Kyoung Tae Kang
Simulation (2)
                                                                          Ckb
  Voltage(V)


               Before
                                 Offset Measure and Stored




                                                               After
                                         @C1, C2



                                                                          In+
  Voltage(v)




                                                                          In-
                                                                          Out+
                                                                          Out-
                                                 Enlarged
  Voltage(V)




                        Offset


                                             Time(s)

Mixed Signal Chip LAB.                                       Kyoung Tae Kang
Isolating the offset storage capacitor method(1)
                   Vos

                   -     +
                                       +
        Vin                       A1                  A2            Vout
                                           +


                             CK
                                                           CK

                                               Aaux
                   VCM

                                                  C1       C2




     •OOS & IOS have bad frequency characteristics
     •Isolating the signal path from capacitors
     •Adding amplifier degrades the speed

Mixed Signal Chip LAB.                                          Kyoung Tae Kang
Isolating the offset storage capacitor method(2)
                                                Transimpedance Amp.
                         Vos

                         -   +
                                            +
           Vin                        Gm1                  R               Vout
                                                +


                                 CK
                                                                  CK
                                                     Gm2
                     VCM




     •Constitute one amplifier at the signal path.
      - solve speed problem by transimpedance amp.
     •Gm2 used to be chosen on the order of 0.1Gm1
     •Still differential-induced error problem remains
Mixed Signal Chip LAB.                                                Kyoung Tae Kang
Design Consideration
 • Design differential amp & single amp without offset
 • Using OOS cancellation technique
 • Choose the suitable capacitor for the application
 • Reset period; numbers of KHz
 • Storage time must be longer than the settling time of storage
 capacitor
 • As high Av is, as low residual offset is
 •But, as high Av is, as high the effect of clock mismatch is
 •Considering the effect of offset when determine the
 resolution of Flash ADC

Mixed Signal Chip LAB.                            Kyoung Tae Kang

				
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posted:10/8/2011
language:English
pages:16