Full DupleX Switched Ethernet

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					                                                                Avionics Full DupleX Switched Ethernet (AFDX)
                                                                             in Manned Spacecraft
AFDX Hot Redundancy scheme duplicates links and switches, with
·                                                                                                                                                                                                                     Integrity Checking (IC) occurs in the receiving ES and serves to increase
frames always sent on both networks concurrently                                        ·Full   duplex, 100 Mbps, star architecture databus according to Part 7 of ARINC 664                                          data integrity and system robustness.
Network implements a ''first valid frame wins'' scheme in reception
·                                                                                           specification                                                                                                             The
                                                                                                                                                                                                                      · IC process for each frame occurs prior to the frame being forwarded
                                                                                                                                                                                                                      to the Redundancy Management function.
                                                                                        ·Commonly            used in Avionics applications (Airbus A380, A400M, Boeing B787 Dream Liner)                              The
                                                                                                                                                                                                                      · IC's prime function is to identify abnormal, invalid or stuck frames,
                                             Blue Switch
                                             (Network B)                                                                                                                                                              which it consequently must eliminate.
                                                                                        ·Specification  based on standard Ethernet IEEE 802.3, with superimposed features like Virtual
           Per VL                                                          Per VL                                                                                                                                     The
                                                                                                                                                                                                                      · IC function interacts directly with the Redundancy Management
             ES                                                              ES             Link Concept and Redundancy Scheme                                                                                        block, which accepts only the first arriving valid frame, and discards any
          Transmit                                                         Receive                                                                                                                                    consequent duplicates
                                             Red Switch                                 ·Differences          on 4 Layers of 7 Layer OSI Reference Model
                                             (Network A)
                                                                                                                                                                                                                                                       Integrity Checking
                                                                                              OSI Model           IEEE 802.3 Ethernet                Differences in AFDX according to ARINC 664 Part 7                 Network A
                                                                                                                                                                                                                                          Layer       Detects and eliminates
                                                                                                                                                                                                                                                                                          Redundancy Management                             Application
                                                                                                                                                                                                                                                         invalid frames
                                                                                                                                                                                                                                                                                            Eliminates redundant
                                                                                                                                                                                                                                                                                                  frames                         IP
                                                                                               LAYER 7              Application Layer                Sampling / Queuing / SAP; TFTP, SNMP implementation                                  MAC
                                                                                                                                                                                                                                                       Integrity Checking
Example of a typical AFDX network within an avionics environment.
·                                                                                                                                                                                                                      Network B          Layer       Detects and eliminates                                                                Management
                                                                                                                                                                                                                                                         invalid frames

· Systems provide an interface between avionics equipment and the
AFDX network.                                                                                  LAYER 6              Presentation Layer
                                  Avionics Computer System

           controllers                                                                         LAYER 5                 Session Layer                                                                                   At
                                                                                                                                                                                                                      ·each End System output, traffic flow needs to be adjusted and packets
                                                                                                                                                                                                                       adequately scheduled to ensure that allocated bandwidths of all VLs are
            sensors                                   ES 1                                                                                                                                                             adhered to.
           actuators                                                                           LAYER 4                Transport Layer                                 UDP and TCP implementation                      The
                                                                                                                                                                                                                      · Traffic Regulator positions packets within the data stream to be
                                                                           AFDX                                                                                                                                       separated by the BAG associated with that VL.
                                  Avionics Computer System              Interconnect
                                                                                               LAYER 3                Network Layer                                   IP and ICMP implementation                      The
                                                                                                                                                                                                                      · VL Scheduler orders and multiplexes frames prior to transmission on
                                                                                                                                                                                                                      the physical AFDX link.
            sensors                                   ES 2
                                    Subsystem                                                                                                                                                                         Blocking the VL for the remainder of a BAG, gives the Scheduler the
                                                                                               LAYER 2               Data Link Layer                              MAC addressing and VL concept                       possibility to insert packets from other VLs onto the physical link.
                                                                                                                                                                                                                      · may be introduced at the Scheduler output, caused by
                                                                           ES 3
                                                                                               LAYER 1                Physical Layer                                                                                  simultaneously arriving packets from different Vls being multiplexed onto
                                                                                                                                                                                                                      the physical link.

                                                                                                                                                                                                                                                               Virtual Link                                            Physical Link
                                           Internet                      Gateway
                                                                                        ·The    characteristics / features which make AFDX potentially suitable for future manned space                                            VL 1   R
                                                                                                                                                                                                                                                  BAG1 BAG1 BAG1 BAG1

                                                                                            applications include                                                                                                                   1ms
                                                                                                                                                                                                                                                  1        2      3       4

                                                                                                                                                                                                                                          l                                             Scheduler
                                                                                           ·High    Data Integrity and Determinism are achieved through fully profiled network                                                     VL 2
                                                                                                                                                                                                                                                               BAG2                       MUX            1 1       2      3       4     2

                                                                                                                                                                                                                                   4ms    o
A Virtual Link is a 'pathway' which transmits a predefined set of traffic and
·                                                                                              implementation ensuring there is no saturation possible on available data links                                                     BAG    r       1                            2

is characterised by the following key features:
  Single transfer direction (the VL 'pipe' is mono-directional)
  ·                                                                                        ·Configuration    tables in End Systems and Switches contain predefined information on
  Single subscriber in Tx mode and one or more subscribers in Rx mode
                                                                                               network structure and bandwidth allocation
                                                                                                                                                                                                                      Traffic Shaping achieved through use of Bandwidth Allocation Gaps
  Reserved, fixed bandwidth into the global AFDX network
  ·                                                                                        ·Strict      set of rules are enforced and policed by AFDX equipment                                                       (BAGs)
  Known maximum latencies and jitters
  ·                                                                                                                                                                                                                   The
                                                                                                                                                                                                                      · most important control mechanism imposed on a per VL basis to
                                                                                           ·Known         maximum delay for packet transmission                                                                       control the bandwidth of that particular VL.
  · predefined route on the network
                                                                                                                                                                                                                      BAG=Minimum time interval between the starting bits of two successive
  Unique identifier called a VL ID
                                                                                                                                                                                                                      Ethernet frames transmitted on a single VL
                                                                                                                                                                              Port 1                                  · values range from 20 to 27 milliseconds
                                  ES 1                         ES 4                    A physical 100 Mbps link of an ES can support multiple virtual links.
                                                                                                                                                                              Port 2
                                                                                                                                                                                                                      A BAG can only be initiated when there is data to be transmitted AND the
                                                                                       · all the VLs share the physical link, individual VLs need to be isolated to           Port 3
                                                                                                                                                                                                                      previous bag has expired
                                                                                       prevent traffic on one VL from interfering with traffic on another VL.
                         VL 3                     VL 4                                                                                                                      Port 4
                                                                                                                                                                                                   100Mbps Ethernet
             ES 2               SWITCH 1
                                                  VL 1
                                                             SWITCH 2       ES 5
                                                                                       · isolation between the individual VLs is achieved by specifying and limiting two    Port 5
                                                                                                                                                                                                     Physical Link                             BAG                                     BAG                         BAG
                                                  VL 2
                                                                                       · minimum time gap between consecutive transmission of Ethernet frames on             Port 6
                                                                                         a VL (Bandwidth Allocation Gap or BAG).                                             Port 7

                                  ES 3                         ES 6
                                                                                       · maximum size of Ethernet frames that can be transmitted on a VL (Lmax).
                                                                                         The                                                                                                                                               1                                       2                         3

Author:   Olga Trivailo                                                                                                                                                                                                                           Supervisors: Dr. Ahmet Sekercioglu (MONASH University)
          ID 18446760                                                                                                                                                                                                                                                                   Matthias Gronowski (EADS Astrium)