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Maxim Seminar Session 4 20090204

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Maxim Seminar Session 4 20090204 Powered By Docstoc
					   Session 4 - IC’s you did not know
          Maxim was doing?
• TDM-over-Packet
• IP Cameras
• Secure Micros
TDM-over-Packet
   Overview
Basic Concept of TDM-over-Packet Devices




  Up to 8 E1/DS1/J1 links or frame-based serial HDLC links to be transported
transparently through a switched IP or MPLS packet network.
 Jitter and wander of recovered clocks conform to G.823/G.824 and TDM specifications.
 Ethernet side: high QoS capabilities are provided through its MII/RMII/SSMII ports.
                 TDM-over-Packet Concept
   Access Network
          analog lines
                                         Packet
                                                                        P
                 T1/E1/T3/E3
                                        Switched                        B
                                                                        X
             P                          Network
             B
             X
extensions                       Asynchronous Network
                     E1/DS1/J1
                     or
                                 No timing information transfer
                     AAL1



• The TDM-over-Packet approach replaces the core with a packet (IP or MPLS)
  network
• The access networks and their protocols remain “TDM Pseudowire”
• G.xxx compliance maintained (error performance, timing, jitter & wander, etc.)
Application Example:
Network TDM Tunneling
 Customer Premises
         Ethernet


PBX              TDMoIP
         E1/T1



Customer Premises                                                         CO
                                     POP/Edge
        Ethernet
                          Ethernet                     PSN       TDM
                                                                   o
PBX          TDMoIP                                   TDMoIP
                                                                  IP
       4xE1/T1                                                             (n x E1/T1
                                                                           STM-1/OC-3)
                                           16xE1/T1
 Customer Premises
         Ethernet
                                                                        SDH/     ADM
                               Customer                                SONET
                               Premises               Customer
PBX          TDMoIP           PBX                     Premises
        4xE1/T1                                   PBX
          Application Example: Addressing the Metro
                         Carrier Needs
                   n x E1/DS1/J1                            TDMoIP
                                                                        4xFXS, FXO,
                    STM-1/OC-3                                              E&M
   ADM                                                                   Or 4 x BRI
           SDH/                             GbE                       Fast Ethernet
          SONET                                    Metro    TDMoIP
                                                   Packet
                                                  Network            Serial (v.35/x.21…)
                                   TDMoIP                            2xFast Ethernet
                                                            TDMoIP
                                                                     E1/T1

                                                                     2xFast Ethernet
         PSN                                      ToPview
                  Class 5                                   TDMoIP
                  Switch                                             4xE1/T1

                                                                     2xFast Ethernet

                                                            TDMoIP
                                                                     4xE1/T1
• Right interfaces for every customer need
                                                                     6 x Fast Ethernet
• Multi-service offering at the customer premises           TDMoIP
                                                                     16 E1/T1, 2 E3/T3
• Ethernet Demarcation at the customer premises                      2 CT3
                                                                     6 x Fast Ethernet
• Centralized management                                    TDMoIP
                                                                     120 Analog phones
• Competitive Pricing                                                And more…
Application Example: Cellular Backhaul
over PSN
Reduce Cellular Backhaul Costs
                                                   Remote Site
                    TDMoIP PoP
                      TDMoIP                   TDMoIP
16 E1/T1, T3, CT3                                       E1/T1

                                                                 Base
                                                                Station

    Controller
                                 IP/Ethernet
                                   Service
                    TDMoIP PoP     Network
                      TDMoIP                            E1/T1
      N x E1/T1                                TDMoIP
     STM-1/OC-3
                                                                 Base
                                                                Station

                                                        E1/T1
                                                                           Base
                                               Remote Site                Station




   Attractive for CDMA and GSM backhaul
    Clock Distribution and Recovery
•    Circuit Emulation Operation over a PSN
•    Architectures for Synchronous Circuit Emulation
     – Fully Synchronous TDM Network with PRC
        • at CO
        • at IWF
     – TDM Service Clock at one CO using
        • Differential Clock Recovery
        • Adaptive Clock Recovery
     – TDM Service Clock at one IWF
•    Architectures for Asynchronous Circuit Emulation
•    Special case: 2-clock mode (no loop-timing)
     – Independent Clocking for Each Direction
Circuit Emulation Operation over a PSN
Architectures for Synchronous Circuit Emulation
 - Fully Synchronous TDM Network with PRC at CO




• Clock Recovery is not required
   – PSN only transports TDM payload

• IWF device is loop-timed
   – IWF device sends clock back to CO device

• Also refered to as “CO-to-CO” backhaul or extension
Architectures for Synchronous Circuit Emulation
 - Fully Synchronous TDM Network with PRC at IWF




• Clock Recovery is not required
   – PSN only transports TDM payload

• CE devices are loop-timed
   – CE device sends clock back to IWF device
Architectures for Synchronous Circuit Emulation
- TDM Service Clock at one CO using Differential Clock Recovery




 •   2 spans are loop-timed:
      1. IWF device sends clock back to CO device
      2. CE device sends clock back to IWF device
 •   Customer Equipment needs clock traceable to the TDM service clock, not to the
     PRC
 •   The Delta between the TDM service clock and the PRC is relayed via Differential
     Clock Recovery
    Architectures for Synchronous Circuit Emulation
- TDM Service Clock at one CO using Adaptive Clock Recovery




•   2 spans are loop-timed:
     1. IWF device sends clock back to CO device
     2. CE device sends clock back to IWF device
•   Adaptive Clock Recovery is required at IWF of Customer Equipment
     – No GPS or SONET derived clock available to serve as the common clock
•   The Packet Buffers within the Customer Equipment will average the arrival rate of the
    packets over time
     – Strives to remove jitter and wander of the recovered TDM service clock, caused by PDV
Architectures for Synchronous Circuit Emulation
                 - TDM Service Clock at one IWF




•   2 spans are loop-timed:
     1. IWF device sends clock back to CO device
     2. CE device sends clock back to IWF device
•   Adaptive Clock Recovery is required at IWF of Customer Equipment
     – No GPS or SONET derived clock available to serve as the common clock
•   The Packet Buffers within the Customer Equipment will average the arrival rate of the
    packets over time
     – Strives to remove jitter and wander of the recovered TDM service clock, caused by PDV
  Architectures for Asynchronous Circuit
                Emulation
• Essentially:
   – Identical to Architectures for Synchronous Circuit
     Emulation
   – Except that each slice has its own independent
     clock domain.
  Special case: 2-clock mode (no loop-timing)
      - Independent Clocking for Each Direction




• Loop-timing is not acceptable
• Adaptive Clock Recovery is required for both directions
   – No Common Clock
   – TDM Service Clock A ≠ TDM Service Clock B
Maxims TDM-over-Packet Solution
• These products solve:
   – Delivering Native TDM Services E1/T1/E3/T3/STS-1 over Packet
     Switched Networks

• Applications:
   – MSPPs, MSSPs, IP DSLAMS, Base Stations, Service Provider Routers

• Products using these technologies:
   – Leased-Line Sevices Over PSN, TDM Over G/E-PON, Cellular Backhaul
     Over PSN, TDM Over WiMax

• Why use our solutions?
   – Highest Level Of Integration Available
   – Hardware Solutions Requiring Minimal CPU Support
   – Most Flexible Clock Recovery Capabilities
   – Most TDM Pseudowire Methods
TDM-over-Packet Solution Strengths (1/2)
• TDM-over-Packet Solution with Highest Level of Integration
   – DS34T108 Offers 8 E1/DS1/J1 Framers and LIUs
   – LIUs Enable Hitless Protection Switching for E1/DS1/J1
     Interfaces

• Uses Latest Circuit Emulation Technology from Rad Data Com

• On-chip Hardware Does Clock Recovery and TDM-to-Packet and
  Packet-to-TDM Conversion
   – User’s CPU Only Configures and Monitors – CPU Not in the
     Data Path
   – Customer Can Use Lower-cost CPU than with Competitive
     Solutions
   – High Level of On-chip Functionality Minimizes User’s Code
     Size
TDM-over-Packet Solution Strengths (2/2)
• Recovered Clock & Frame Sync Outputs for each E1/DS1/J1
  Port
   – Supports Asynchronous Clock Domains for All Ports for All
     Payload Types

• Widest Selection of TDM Pseudowire Methods
  – CESoPSN, SAToP, TDMoIP, or HDLC on a Per-bundle Basis

• Mature Clock Recovery Algorithms Provide Excellent
  Performance
   – G.8261 Compliance Report Available on Request
        TDMoP Software Support
– HAL (Hardware Abstraction Layer)
   • Includes driver code for the TDMoP Circuit Emulation
     engine
   • Includes driver code for the integrated E1/DS1/J1
     Framers and LIUs

– Sample Application for Choice of Operating Systems
   • VxWorks (6.3) - Available Now
      – HAL, Sample app sources, other modules
   • Embedded Linux (2.6.19) – Available Now
      – GNU compile tools, HAL, Sample app sources,
        other modules

– Schematics, Symbols, Manufacturing Gerber files
  TDMoP Evaluation Board - DS34T108DK
• Onboard Microprocessor   • RS232 Serial Communication
  (MPC870H)                  Port
• 8 T1/E1/J1 Ports         • External Common Clock Input
• 1 T3/E1 Port             • External Reference Clock Input
• 1 Ethernet Uplink        • 1 Ethernet Management
  Port (10/100)              Port (10/100)
Maxim H.264 Solutions
         for
     IP Cameras
        smarter video™
     defined by mobilygen
                           CHALLENGE
A product manager at a security company is asked to develop a new
line of cameras. Here is the challenging set of requirements:
   – fit into the existing analog infrastructure
       they must add IP capabilities
   – enable HD video recording and streaming, without overloading the
     network
   – enable multiple points of view
   – have integrated motion detection and analytics
   – video latency from the camera must be less than 100 ms to enable live
     control
   – integrate virtual PTZ (Pan Tilt Zoom) so as to save cost on mechanical PTZ
     equipment
   – all models of camera must run the same software
   – price point has to be same or less than last year analog cameras
      COMMON SOLUTION 1/4
    Use a DSP chip (TI or similar) to perform video
    encoding

-     Difficult to program

-     Not able to do MegaPixel encodings for the
      high-end of the product line

-     Too expensive for the low-end SD/720p
      H.264 IP cameras

-     Trade-off encoding quality vs analytics vs
      other features
      COMMON SOLUTION 2/4
    Use a DSP chip for the main IP camera
    functions (streaming, analytics, PTZ) and a
    H.264 ASIC for encoding

-     Expensive

-     Not scalable over a full line of IP cameras as
      the DSP becomes overkill for low end H.264
      cameras
     COMMON SOLUTION 3/4
    Use a low cost H.264 ASIC

-     Cannot provide multi view encoding (720p
      H.264+ D1 H.264 + CIF H.264 + MJPEG)

-     Will require new chip, new software and
      new board for the high end of the product
      line

-     Does not provide motion detection, virtual
      PTZ or multi-streaming capability
     COMMON SOLUTION 4/4
    Use a high-end MegaPixel H.264 ASIC

-     could in theory also act as a low end H.264
      IP camera

-     but too expensive and as such not
      competitive for the low end IP camera
      market
           IF ONLY I COULD FIND…
A H.264 chip that can cover both the low-end SD/720p IP camera
     market AND the MegaPixel market

… using the same software
… in the same physical package so that I only have to do 1 board
     for all my cameras
… with integrated analytics and motion detection
… with multi IP streams out for multi region of interest viewing
… with virtual PTZ integrated in the chip
… with a way to differentiate my low-end IP camera from my high-
     end fully featured camera
… and with a killer cost that enables a <$20 camera eBOM
     (cheaper than an analog cam!)
                           SOLUTION
MAXIM has what I need!!
They have 2 new H.264 IP camera chips that are
     - pin compatible
     - run the same software
     - provide integrated multi-stream, analytics, virtual PTZ
     - and are covering both the low-end SD/720p (P/N MG2580) and high-
     end 1080p (P/N MG3500) of my IP camera product line

ONE software effort and ONE hardware effort can enable me to develop a
     full IP camera product line that can be priced differently for my target
     markets

No need for complicated DSPs…
No need for expensive PTZ equipment…
No need to look for an external analytics solution…
No need to have several hardware and software efforts going on in parallel
          MG2580 SD/720p IP Camera
                                             SD

                                                  Local storage



           SD        656
                                     MG2580
                                     MG2580                              Video
                                          (SoC)                                           Optional
         sensor                            (SoC)                         output
                                   720p H.264 encode      optional                      SD TV display
                                   720p H.264 encode
                                   + D1 H.264 encode
                                   + D1 H.264 encode
                                  + D1 MJPEG encode
                                  + D1 MJPEG encode
                                    + object tracking
                                    + object tracking             Enet
             Audio                     + analytics                           Ethernet
                                        + analytics               Phy
             codec     optional       + virtual PTZ
                                       + virtual PTZ



                                       2xDDR2
                                        Flash


•   Full 30fps on all streams                                                                <$20
•   Basic analytics
                                                                                             not including lens, case,
•   16 viewers (50Mbps aggregate bandwidth)                                                  passives, testing, and audio
•   SD card storage
•   4 concurrent non-identical streams with different
    frame rates, bit rates, resolutions and picture quality
   MG3500 HD (1080p) IP camera
                                                                           1 1080p30 H.264 encode,
                                                        16 MB
                                                                         highest quality
                                                        FLASH              JPEG snapshots
                                                                           Object tracking
                                                                           Multi-unicast RTP
Interchangeable sensor board
                                                                         streaming to 8 viewers
                                     I2C
           1920x1080
                                                MG3500                      Enet
               CMOS
                                     8                (SoC)
                                                       (SoC)                Phy            Ethernet
    Lens                       ISP            All MG2580 features +
               Sensor                          All MG2580 features +
                                                1080p30 encoding
                                                 1080p30 encoding                  POE
                                           Pin compatible with MG2580
                                           Pin compatible with MG2580
                                            Same software as MG2580
                                            Same software as MG2580



                                                       16           16
                                                                                         Power
                                                                                         Supply

                                               64 MB            64 MB
                                               DDR2             DDR2
                   MG3500




• Linux distribution, firmware, drivers,...
Secure Microcontrollers in
         Action
   Background: Chinese Gaming
• Entertainment games
  – ‘Mary’ Machines – similar to slot
    or pachinko machines
  – Video Machines – like a video
    game
• Nearly 100% designed and
  manufactured in China, for
  China market
• Low cost—market does not
  refurbish machines, simply
  purchases new ones

                                        Game Sales Center in China
                     The Problem
• Used an off-the-shelf 8051
  micro
• Labs in China will crack the
  micro and give you SW for
  $500
• Largest manufacturer lost
  market share (and margin)
  to competitors who were
  able to copy HW & SW
  designs                        ‘Cracking’ Lab
  Software is More Valuable than
            Hardware!
• Why is a semiconductor company saying this?
   – IP protection is a key problem facing the entire embedded
     industry
   – Theft of IP protection lets competitors in without spending
     the time/resources
• This does not mean there is no value in hardware!
   – Maxim makes hardware solutions that can protect IP!
 Example: SW more valuable than
              HW
• There is one music player
  that dominates the market
• Why?
  – First to market (HW + SW)
  – Better user interface (SW)
  – Better tools (SW)
Why Don’t Most Generic Micros
   Protect Your Software?
               • External memories can be
                 easily read
               • Integrated memories
                 accessible through loaders
                 or debug interfaces
               • Determined attackers can
                 decapsulate the device and
                 find/read memory
                 structures at the silicon
                 surface
      How Would You Solve This?
• Secure your debugger & loader
• Top layer of silicon is shield to
  protect memories
• But need a way to protect your
  external memories from reverse
  engineering OR copying
Best Solution: Code Encryption




                                      Microcontroller
          On-Chip Instruction Cache

           64-bit Decrypted Buffer
 Code
Decrypt         3DES Engine
 Keys
           64-bit Encrypted Buffer


          Encrypted Program Memory
               in External Flash
                  But Wait…
• Doesn’t this slow down performance?
  – No – on-chip cache stores decrypted code &
    exploits locality for fast execution
• Can’t someone just take my external memory
  and copy it?
  – No – keys are randomly generated per chip, so
    each external memory is effectively paired with
    each microcontroller (see next slide)
                    Loading Code
                            DS5250
                         Secret Key
                      091DA6C7317A1B
 Program Code                                         Flash
11223344556677                  X                E309B643C2484D

                            DS5250
                          Secret Key
                       8E41B0A3101F74
 Program Code                                        Flash
11223344556677                  X               58F2A4097ACC31

 Encryption keys different on every device, so is encrypted flash
     Maxim Secure Microcontrollers
         With Code Encryption
Name        µC Core         Top Speed   Code Encryption
DS5002      12-clock 8051   16 MHz      64-bit proprietary
DS5003      12-clock 8051   16 MHz      64-bit proprietary
DS5250      4-clock 8051    25 MHz      3DES
MAXQ1103    Single Cycle    25 MHz      3DES
            MAXQ30
USIP Pro*   MIPS32 4KSd     96 MHz      AES

* NEW PRODUCT from Maxim’s acquisition of Innova Card!!!
              Back to China…
• Our Chinese friends now use one of our
  secure 8051 microcontrollers
  – Changed main board drastically to reduce cost
  – Rewrote API for new architecture
  – Now recapturing their lost market share since no
    competitor can copy their HW AND their SW
         What Did We Learn?
• IP protection is cricital!
   – Protects investment & margin
   – Helps brands stay unique
• Maxim Secure Microcontrollers provide
  best protection for application software
   – No copying
   – No reverse engineering
End
     Maxim Secure Microcontrollers
         With Code Encryption
Name        µC Core         Top Speed   Code Encryption
DS5002      12-clock 8051   16 MHz      64-bit proprietary
DS5003      12-clock 8051   16 MHz      64-bit proprietary
DS5250      4-clock 8051    25 MHz      3DES
MAXQ1103    Single Cycle    25 MHz      3DES
            MAXQ30
USIP Pro*   MIPS32 4KSd     96 MHz      AES

* NEW PRODUCT from Maxim’s acquisition of Innova Card!!!
                 USIP® Professional Suite




•   Secure key and code loading protocol           * http://www.innova-card.com/
•   USIP® Hardware Abstraction Layer (HAL)
•   Drivers and communication stacks, including EMV Level 1, USB, Ethernet
•   Cryptographic library (countermeasures in option), optimized and secure for the
    MIPS32®4KSd™ processor
•   Operating Systems like Linux, ecos, Nucleus, and other RTOS
•   GPD/STIP middleware from our partner Trusted Logic (jTOP® Middleware).
USIP Pro *, MIPS32 4KSd, 96 MHz

				
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