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					The Creation of a New Computer Chip




                           Silicon Design   Page 1
              The Concept
A group of people from marketing, design,
applications, manufacturing and finance develop
the basic concept, features and rough
specifications for a new product.




                                    Silicon Design   Page 2
They all go off and work on their particular
pieces of the proposal

        Marketing – what are the customers asking for and
                    what will sell vs. the competition, what is
                   the marketing plan, what will it cost

        Design – how will it be designed, how long will it take,
                 what design tools will be necessary, how many
                 people will it take, what will it cost

        Manufacturing – how will it be manufactured, what tooling
                         will be necessary, how many manufacturing
                        lines will it need, what will it cost


        Finance – will the product make money, what is the return
                  on investment, what resources are available and
                  what will need to be acquired, what will it cost

                                                   Silicon Design   Page 3
           The Decision

They all get back together again with
management and decide whether or not to
proceed will the project.




                               Silicon Design   Page 4
                GO!

Once the decision is made to proceed,
the design team swings into action




                                 Silicon Design   Page 5
        The Design Flow
   Block Level


   RTL Level       RTL Simulation


   Logic Level     Logic Simulation


Transistor Level   Extract Parasitics
                    & create timing
                        model
Physical Layout
Level – (masks)



                                        Silicon Design   Page 6
          The Block Diagram

The problem is broken down into basic
functions blocks and the interfaces are
specified


           Memory    Registers   ALU




Clock &               Branch     I/O
           Control
Timing                Control



                                       Silicon Design   Page 7
       The High Level Description
The blocks are then broken down into
functional units and registers. The functionality
is coded in a high level descriptive language.
This is known as the RTL description.

         IR          operand selection      Register
                     and register control     File




    master control      ALU control          ALU




                                                       Silicon Design   Page 8
    The High Level Simulation

The RTL description is simulated to
ensure that the design performs as it
should.




                                  Silicon Design   Page 9
    The Logic Level Description

The functional units are then broken down
into logic gates and registers. This is known
as the logic level description.




                                    Silicon Design   Page 10
    The Logic Level Simulation
The logic description is simulated to
ensure that the design performs as it
should. It is also compared against the
RTL simulation.




                                  Silicon Design   Page 11
      The Transistor Description
The logic gates are broken down to their
component transistors. From this description,
the timing delays and electrical parasitics can
be estimated. If necessary, transistors can be
resized.

                                    P
                                         OR

              N type                    P type
             Field Effect Transistors
                                         Silicon Design   Page 12
Field Effect Transistor Operation
       N type                P type


            S                     S

   G                     G


                D                 D




           Gate = Ground = ‘0’
                                  Silicon Design   Page 13
Field Effect Transistor Operation
       N type                 P type


            S                      S

   G                    G


                D                  D




           Gate = Vcc = ‘1’
                                   Silicon Design   Page 14
  N Type Field Effect Transistor
            no current flow




                 GND




             P type substrate
               Silicon Wafer
GND
                                Silicon Design   Page 15
  N Type Field Effect Transistor



                 Vcc




             P type substrate
               Silicon Wafer
GND
                                Silicon Design   Page 16
  N Type Field Effect Transistor



                 Vcc




             P type substrate
               Silicon Wafer
GND
                                Silicon Design   Page 17
  N Type Field Effect Transistor
      current flow




                         Vcc




                     P type substrate
                       Silicon Wafer
GND
                                        Silicon Design   Page 18
  P Type Field Effect Transistor
            no current flow




                  Vcc




      Vcc                       N-Well


             P type substrate
               Silicon Wafer
GND
                                  Silicon Design   Page 19
  P Type Field Effect Transistor



                GND




      Vcc                       N-Well


             P type substrate
              Silicon Wafer
GND
                                  Silicon Design   Page 20
  P Type Field Effect Transistor



                GND




      Vcc                       N-Well


             P type substrate
              Silicon Wafer
GND
                                  Silicon Design   Page 21
  P Type Field Effect Transistor
        current flow




                          GND




      Vcc                                 N-Well


                       P type substrate
                        Silicon Wafer
GND
                                            Silicon Design   Page 22
        Logic Gate Implementation Using
             Field Effect Transistors
                          I1                         I1

    I            O                      O                                      O

                          I2                         I2




                                   P
                                                                                   I2
                                                          P            P
         P

I            O
                               P
                                                                                          O
                                                I1
                                            O




                     I1                I2




                                                              Silicon Design            Page 23
     So how do we build
   Field Effect Transistors?


We start with a blank piece of silicon wafer




            P type substrate
             P type substrate
              Silicon Wafer
                Silicon Wafer


                                     Silicon Design   Page 24
Cover it with an N-well Mask




        type substrate
       PP type substrate
          type substrate
        PP type substrate
          Silicon Wafer
         Silicon Wafer
             Silicon Wafer
          Silicon Wafer


                             Silicon Design   Page 25
Bombard it with negatively charged
    ions to create the N-well

            N type dopant




           type substrate
          PP type substrate
             type substrate
           PP type substrate
             Silicon Wafer
            Silicon Wafer
                Silicon Wafer
             Silicon Wafer


                                Silicon Design   Page 26
Create the N-well


     N type dopant




    type substrate
   PP type substrate
      type substrate
    PP type substrate
      Silicon Wafer
     Silicon Wafer
         Silicon Wafer
      Silicon Wafer


                         Silicon Design   Page 27
Create the N-well


     N type dopant




    type substrate
   PP type substrate
      type substrate
    PP type substrate
      Silicon Wafer
     Silicon Wafer
         Silicon Wafer
      Silicon Wafer


                         Silicon Design   Page 28
Grow the Gate Oxide layer




      type substrate
     PP type substrate
        type substrate
      PP type substrate
        Silicon Wafer
       Silicon Wafer
           Silicon Wafer
        Silicon Wafer


                           Silicon Design   Page 29
Grow the Gate Oxide layer




      type substrate
     PP type substrate
        type substrate
      PP type substrate
        Silicon Wafer
       Silicon Wafer
           Silicon Wafer
        Silicon Wafer


                           Silicon Design   Page 30
Deposit Polysilicon




  type substrate
 PP type substrate
    type substrate
  PP type substrate
    Silicon Wafer
   Silicon Wafer
       Silicon Wafer
    Silicon Wafer


                       Silicon Design   Page 31
Cover it with a Polysilicon mask




          type substrate
         PP type substrate
            type substrate
          PP type substrate
            Silicon Wafer
           Silicon Wafer
               Silicon Wafer
            Silicon Wafer


                               Silicon Design   Page 32
Etch the Polysilicon and Oxide

                Etchant




          type substrate
         PP type substrate
            type substrate
          PP type substrate
            Silicon Wafer
           Silicon Wafer
               Silicon Wafer
            Silicon Wafer


                               Silicon Design   Page 33
Etch the Polysilicon and Oxide

                Etchant




          type substrate
         PP type substrate
            type substrate
          PP type substrate
            Silicon Wafer
           Silicon Wafer
               Silicon Wafer
            Silicon Wafer


                               Silicon Design   Page 34
Etch the Polysilicon and Oxide

                Etchant




          type substrate
         PP type substrate
            type substrate
          PP type substrate
            Silicon Wafer
           Silicon Wafer
               Silicon Wafer
            Silicon Wafer


                               Silicon Design   Page 35
Etch the Polysilicon and Oxide




          type substrate
         PP type substrate
            type substrate
          PP type substrate
            Silicon Wafer
           Silicon Wafer
               Silicon Wafer
            Silicon Wafer


                               Silicon Design   Page 36
Cover it with an N Transistor mask




            type substrate
           PP type substrate
              type substrate
            PP type substrate
              Silicon Wafer
             Silicon Wafer
                 Silicon Wafer
              Silicon Wafer


                                 Silicon Design   Page 37
Implant the N type Dopant

     N type dopant




      type substrate
     PP type substrate
        type substrate
      PP type substrate
        Silicon Wafer
       Silicon Wafer
           Silicon Wafer
        Silicon Wafer


                           Silicon Design   Page 38
Implant N Dopant

 N type dopant




  type substrate
 PP type substrate
    type substrate
  PP type substrate
    Silicon Wafer
   Silicon Wafer
       Silicon Wafer
    Silicon Wafer


                       Silicon Design   Page 39
Cover it with a P Transistor mask




           type substrate
          PP type substrate
             type substrate
           PP type substrate
             Silicon Wafer
            Silicon Wafer
                Silicon Wafer
             Silicon Wafer


                                Silicon Design   Page 40
Implant P Dopant

 P type dopant




  type substrate
 PP type substrate
    type substrate
  PP type substrate
    Silicon Wafer
   Silicon Wafer
       Silicon Wafer
    Silicon Wafer


                       Silicon Design   Page 41
Implant P Dopant

 P type dopant




  type substrate
 PP type substrate
    type substrate
  PP type substrate
    Silicon Wafer
   Silicon Wafer
       Silicon Wafer
    Silicon Wafer


                       Silicon Design   Page 42
Grow more Oxide




 type substrate
PP type substrate
   type substrate
 PP type substrate
   Silicon Wafer
  Silicon Wafer
      Silicon Wafer
   Silicon Wafer


                      Silicon Design   Page 43
Grow more Oxide




 type substrate
PP type substrate
   type substrate
 PP type substrate
   Silicon Wafer
  Silicon Wafer
      Silicon Wafer
   Silicon Wafer


                      Silicon Design   Page 44
Cover it with a Contact mask




        type substrate
       PP type substrate
          type substrate
        PP type substrate
          Silicon Wafer
         Silicon Wafer
             Silicon Wafer
          Silicon Wafer


                             Silicon Design   Page 45
Etch the Oxide
        Etchant




  type substrate
 PP type substrate
    type substrate
  PP type substrate
    Silicon Wafer
   Silicon Wafer
       Silicon Wafer
    Silicon Wafer


                       Silicon Design   Page 46
Etch the Oxide
        Etchant




  type substrate
 PP type substrate
    type substrate
  PP type substrate
    Silicon Wafer
   Silicon Wafer
       Silicon Wafer
    Silicon Wafer


                       Silicon Design   Page 47
Deposit Metal




  type substrate
 PP type substrate
    type substrate
  PP type substrate
    Silicon Wafer
   Silicon Wafer
       Silicon Wafer
    Silicon Wafer


                       Silicon Design   Page 48
Deposit Metal




  type substrate
 PP type substrate
    type substrate
  PP type substrate
    Silicon Wafer
   Silicon Wafer
       Silicon Wafer
    Silicon Wafer


                       Silicon Design   Page 49
Cover it with a Metal mask




       type substrate
      PP type substrate
         type substrate
       PP type substrate
         Silicon Wafer
        Silicon Wafer
            Silicon Wafer
         Silicon Wafer


                            Silicon Design   Page 50
Etch the Metal
        Etchant




  type substrate
 PP type substrate
    type substrate
  PP type substrate
    Silicon Wafer
   Silicon Wafer
       Silicon Wafer
    Silicon Wafer


                       Silicon Design   Page 51
Etch the Metal
        Etchant




  type substrate
 PP type substrate
    type substrate
  PP type substrate
    Silicon Wafer
   Silicon Wafer
       Silicon Wafer
    Silicon Wafer


                       Silicon Design   Page 52
Deposit Insulation




  type substrate
 PP type substrate
    type substrate
  PP type substrate
    Silicon Wafer
   Silicon Wafer
       Silicon Wafer
    Silicon Wafer


                       Silicon Design   Page 53
Deposit Insulation




  type substrate
 PP type substrate
    type substrate
  PP type substrate
    Silicon Wafer
   Silicon Wafer
       Silicon Wafer
    Silicon Wafer


                       Silicon Design   Page 54
             A CMOS Inverter                    P

                                         I            O
I     O




             Vcc




    N-well
                                        OUT




             Gnd


             IN




                               Silicon Design   Page 55
N-well Mask




              Silicon Design   Page 56
Polysilicon Mask




                   Silicon Design   Page 57
N Transistor Mask




                    Silicon Design   Page 58
P Transistor Mask




                    Silicon Design   Page 59
Metal Mask




             Silicon Design   Page 60
Contact Mask




               Silicon Design   Page 61
         The Completed Circuit

           Vcc




N-well
                                      OUT




           Gnd


           IN




                             Silicon Design   Page 62
Partial Die Plot




                   Silicon Design   Page 63
More Partial Die Plots




                    Silicon Design   Page 64
       Complete Chip Plot
Intel Microcontroller Chip – 80C196KJ




                                   Silicon Design   Page 65
Another Chip Plot




                    Silicon Design   Page 66
  Intel
Pentium 4




            Silicon Design   Page 67
Processed Silicon Wafer




                    Silicon Design   Page 68
          Processed Silicon Wafer

A wafer




A die

                              Silicon Design   Page 69
           Wafer Fabrication

• Preceding steps done in a “wafer fab”
  – Silicon wafer fabrication facility


• Fabs are expensive
  – rely on high volumes to get part cost down




                                         Silicon Design   Page 70
      Post-Wafer Fabrication

• Each die is tested to see which work
• Wafer is cut up
  – Good die are kept
  – Bad die are thrown away




                                  Silicon Design   Page 71
Packaging




            Silicon Design   Page 72
Packaging




            Silicon Design   Page 73
Packaging




            Silicon Design   Page 74
Packaging




            Silicon Design   Page 75
Packaging




            Silicon Design   Page 76
Packaging




            Silicon Design   Page 77
               Final Testing

• Packaged chips are tested again
  – Burn-in used to eliminate infant mortality
• Good chips labelled and shipped




                                        Silicon Design   Page 78

				
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posted:9/14/2011
language:English
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