# BJT Amplifier

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```					                 BJT Amplifier

•   Bipolar - electron and hole
•   Two types: npn and pnp
•   Current-controlled
•   Low input impedance
•   High voltage gain

http://www.mtmi.vu.lt/pfk/funkc_dariniai/transistor/bipola
r_transistor.htm
http://www.ibiblio.org/obp/books/socratic/output/bjt2.pdf
Data Sheet
•   2N3904
•   npn
•   hFE = 180
•   VBE = 0.65 V
Basic Characteristics

Active Region

Saturation Region
Basic Characteristics

 A small base current controls a
large collector current.
 Current amplification
Curve Tracer Measurements
• IC versus VCE
 Device characteristics
-   Function: Acquisition
-   Type: NPN
-   Vce max: 20 V
-   Ic max: 10 mA
-   Ib/step: 10 mA
-   Steps: 10
-   Rload: 0.25 W
-   Pmax: 0.1 W
   Screen print
Basic Characteristics

Active Region

Saturation Region
Curve Tracer Measurements
• IB versus VBE - Use the diode menu.
Connect the base pin to collector socket.
Leave the collector pin float.
IB versus VBE
• The base-emitter junction is forward
biased, VBE = 0.6 - 0.7 V.
Three Models
• 1. DC bias design - Q-point
• 2. h-parameter model - curve tracer
• 3. Hybrid-p model - ac analysis
DC Bias Model

• Typical values:
– Von = 0.65 V
– RBB = 1 kW
– dc = 150-180
h-Parameter Model –
Curve Tracer Plot

• Typical values:
– hFE = 180
– hIE = 1 kW, hOE > 40 kW
Curve Tracer to h-Parameter
•   hIE = DVBE / DIB
•   hRE = DVBE / DVCE
•   hFE = DIC / DIB
•   hOE = DIC / DVCE
Hybrid-p Model –
AC Gain Calculation

• Typical values:
– gm = 38.9·IC
– rp = 1 kW, rx = 0, rC = > 40 kW
• Capacitors - High frequency roll off
Relations
•   hFE = ac = gmrp
•   hIE = rp + rx
•   hOE = 1 / rc
•   hRE = 0
BJT Common Emitter Amp.
Circuit Characteristics
•   Av     =   gm RC
•   gm     =   38.9 IC
•   Zin    =   (rx + rp) || rB
•   Zout   =   RC || rc
Effect of Capacitor
• Capacitors serve as open circuit for dc and
short circuit for ac.
• There are coupling capacitors and the
bypass capacitor which limit the low
frequency response.
• There are junction capacitances which
limit the high frequency response.
Design Procedures
•   Design Goal              x200
•   Select VCC = 10-20 V.    15 V
•   Set VCE = VCC / 2.       7.5 V
•   Pick RE = 100-500 W.     220 W
•   RC = Av / gm             ~1.5 k W
•   IC (RC+RE) + VCE = VCC   4.5 mA
Design Procedures
•   IB = IC / hFE      22 mA
•   VE = IC RE         1V
•   VB = VE + 0.65     1.65 V
•   Pick R2.           330 kW
•   Calculate R1.      ~500 kW
Optimization
• Gain
– Adjust power supply
• Maximum output swing without clipping
• More gain?
– Higher current, lower VCE
• DC Load line passes through the Q-point with a slope
of - (RE+Rc)-1.
• AC Load line passes through the Q-point with a slope
of - (Rc)-1.
PSPICE
• Frequency response - bandwidth
• Transient response - waveform
distortion, clipping
Experimental Procedures

• Curve tracer measurements
– Determine hFE.
– Determine hOE.
– Determine hIE (rp).
•   Calculate gm from hFE and rp.
•   Design circuit
•   Perform simulations
•   Build and characterize circuit
•   Optimization
Common Emitter Amplifier
Common Emitter Amplifier
Measurements

• Frequency response
– Scan frequency
– Plot in a semi-log plot.
• Maximum swing without clipping
• Transient response
– Drive with a square wave
• Output impedance
• Input impedance
Resistor Transistor Logic

• Operate in the saturation regime
• Speed, delay, fan out, and power
consumption are primary concerns.
– Two resistors for optimization

http://www.uic.edu/classes/ece/ece340/experiments/
old.experiments/EECS340lab9.html

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