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The Automatic Gain Control _AGC_ Circuit

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					Automatic Gain Control

                  The Automatic Gain Control (AGC) Circuit

  Previous set of notes focused on the design of the Audio Amplifier and its feed back
  network
     Filters the signal and controls the gain
  Currently, the gain of the audio amp is constant.
     Independent of the signal level
  When incoming signals are fluctuating in magnitude, this will be detectable at the
  output.
  To avoid such fluctuations, the designer included an additional feed back network
  provides an variable gain control.
     The Automatic Gain Control (AGC) circuit
  Intention of the AGC
     If the signal begins to fade, the gain will increase to hold a steady output
     If the signal strength jumps, the gain will decrease to prevent a pop or jump in the
     output
  This is done automatically by a feed back circuit that varies the voltage across a
  “voltage controlled resistor” (VCR)
     The VCR is simply a JFET circuit
     We will first study this in detail



EE521                                                                                pg. 1
Automatic Gain Control

                 Using a JFET as a Voltage Controlled Resistor

  There are two JFET VCR’s in the NORCAL40a
     Q2 and Q3
  The JFET works as a VCR by noting that for small drain-source voltages, the
  relationship between vds and ids is linear. And, the slope of this linear relationship can
  be varied by the gate-source voltage.
  Observe an n-type JFET device:




    Negative Vgs increases the depletion region, limiting the current.
      Largest current is when Vgs = 0. Smallest current at pinchoff Vgs = −VC .
      I ds depends on the “channel resistance” rds .
      The channel resistance is a function of Vgs

EE521                                                                                 pg. 2
Automatic Gain Control




    For small vds there is roughly a linear relationship between vds and ids .
      The slope ∆ids / ∆vds = 1/ rds
      The slope decreases as Vgs becomes increasingly negative.
       • This increases rds
    As vds increases, the amount of current that can pass through the channel will
    plateau, and the current will remain constant.




EE521                                                                                pg. 3
Automatic Gain Control




    As vds increases, it begins to narrow the channel near the drain.
    Once vds , the channel will actually pinch off.
      Since it is only near the drain, charges will still tunnel through.
      However, the further increasing vds will not allow any additional current through.
      ids remains ~constant.




EE521                                                                             pg. 4
Automatic Gain Control
  In the linear region (also called the triode, or VCR region), the current is approximated
  as:
                  ⎛ 2I ⎞ ⎛            V ⎞
        I d ≈ Vds ⎜ dss ⎟ ⎜ Vgs − VC − ds ⎟
                  ⎝ VC2 ⎠ ⎝            2 ⎠
  The resistance is computed as:
              dV V
        rds = ds ≈ ds
               dI d I ds V , small
                        ds
                                −1
              ⎛ ⎛ 2 I dss ⎞       ⎞   1
        rds ≈ ⎜ ⎜ 2 ⎟ (Vgs − VC ) ⎟ =
              ⎝ ⎝ VC ⎠            ⎠   G




EE521                                                                                pg. 5
Automatic Gain Control

                    JFET as a VCR in the NORCAL40A




EE521                                                pg. 6
Automatic Gain Control
  The Q2 circuit:




    C20 charges to ≤ Vs through Q2 and the 50 kΩ resistor at the input of U3 (LM386).
    Since Vds is small, Q2 is in the VCR region
       rds is controlled by Vgs




EE521                                                                           pg. 7
Automatic Gain Control




    AF2 has a DC bias VAF 2 ≈ 6.65 V-DC
    Control voltage is established by the voltage division of 8V by R6
      D5 and D6 are Schottky diodes (V f ≈ 0.2 V).
        • Max voltage at control point (Multimeter) should be VAF 2 with D5/D6 open
        • Due to current leakage through the Schottky diodes, and the fact that a small
          current through R5 leads to a large voltage. Thus, max control voltage ~7.2 V


EE521                                                                             pg. 8
Automatic Gain Control
    Gate voltage: (VAF 2 + Vcontrol ) / 2
    Source Voltage: VAF 2
    Vgs = (Vcontrol − VAF 2 ) / 2
    Operation:
      As the control voltage drops (turning
      R6 CCW), Vgs becomes increasingly
      negative
      As Vgs becomes more negative, rds
      increases
      Once control voltage drops such that
      Vgs ≤ −VC , rds reaches maximum,
      leading to maximum attenuation.
    Trend:
      Large control voltage, small rds
      Small control voltage, large rds
    Effective Circuit:




EE521                                         pg. 9
Automatic Gain Control
In Prob. 32A, you will measure an output audio voltage as a function of the DC control
voltage
        Control voltage varied by varying R6




        What is the control voltage at pinch-off?
        If VAF 2 = 6.65 V-DC, what is VC ?
        About a 104:1 ratio in the max to min signal level.
        Note that the shape of the curve and the voltage at which the audio voltage begins
        to drop is dependent on your J309.




EE521                                                                              pg. 10
Automatic Gain Control

                             Automatic Gain Control

  The automatic gain control unit automatically controls the level of the output by
  varying the control voltage.
    This controls rdc
  This is accomplished through two capacitors:
  C29 and C30
    C30 couples the output back to the AGC
    C29 is the “AGC capacitor”
    “Attack” of the AGC:
       Assume a large increase in the output
       • C29 will charge during the period while
          the output audio voltage is negative.
       • D5 will be forward biased, D6 is reverse
          biased
       • Current flows D5 and C30 while C29 charges.
       • During the positive swing, D5 is reverse biased, and due to the large time
          constant of C29 × R5, C29 holds its charge during the half cycle.
       • This lowers the control voltage.
    Recovery of the AGC
       When the level of the signal drops, C29 discharges through R5, which has a large
       time constant. As it recovers, the control voltage will increase.

EE521                                                                           pg. 11
Automatic Gain Control

           Predicting the Recovery Time

  In Problem 33B, you will predict the recover time.
     This is simplified by measuring the DC voltage of
     C29 before and after the recovery with a DMM.
     C29 discharges through R5
        4.4 MΩ || 4.4 MΩ = 2.2 MΩ
       τ = 22 s
     Measure VC 29 with the function generator set at
     0.1 Vrms, and again at 3 Vrms.
       Example:
       • VC 29 = 5.18 V (fn generator = 0.1 Vrms)
            1


       • VC229 = 5.8 V (fn generator = 3 Vrms)
       • VC 29 = VC229e −∆t / τ
            1


                     ⎛ VC 29 ⎞
                          1
                                      ⎛ 5.18 ⎞
       • ∆t = −τ ln ⎜ 2 ⎟ = −22 × ln ⎜       ⎟ = 2.5s
                     ⎝ VC 29 ⎠        ⎝ 5.8 ⎠




EE521                                                    pg. 12

				
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posted:8/25/2011
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