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Next Page Go To Quit AMS/AL 10 Digital Signal Processing To perform digital signal processing (DSP) operations, you must be able to: • Create DSP data buffers (integer, real, and complex) • Move data from DSP buffers to the test hardware • Move data from the test hardware to the DSP buffers • Operate on the data in the DSP buffers This section describes test program commands to perform all of these opera- tions. In addition, functions for moving data to and from tester memory are dis- cussed. (A complete list of the DSP algorithms supported in IMAGE is in “DSP Algorithms” on page 10–20.) Because a test program can be executed on both a tester and a workstation (using the simulator), DSP operations must execute similarly on both. Since workstations do not require an array processor, a mechanism has been deﬁned to determine whether or not the array processor is present. As a result, test program execution on a computer without the Mercury Array Processor is transparent to the user (with the exception of execution time). 10.1 Double Precision Beginning with V5.7, IMAGE adds support for double precision digital signal DSP Capabilities processing. Starting IMAGE as usual causes IMAGE to be loaded with only the DSP algorithms supported through IMAGE V5.6. Starting IMAGE with a spe- cial switch for double precision causes IMAGE to be loaded with both the exist- ing and new DSP algorithms. See “Enabling/Disabling Double Precision DSP” on page 10–1 for more information. Double precision algorithms use an additional 56 Kilobytes of memory on the array processor, so you may not want to load them all the time. All the new algorithms are always available when simulating an MC860 Array Processor. Algorithms that are only available when the double precision switch is used are all of the integer algorithms, all of the double precision algorithms, and several of the conversion algorithms. Calling one of these algorithms when they are not loaded with IMAGE results in undeﬁned behavior. 10.2 Enabling/Disabling By default, the double precision DSP is not enabled. You can enable or disable Double Precision it in either of the following ways: DSP • For all users, using a given IMAGE installation • For single users Each is described below. 10.2.1 Enabling for All Users Follow the steps below for enabling for all users: 1. Become root on the machine whose disks hold /image/bin.5.7. 2. cd /image/bin.5.7 December 1996 Version 6.2 10–1 Previous Page Next Page Go To Quit Digital Signal Processing Type Deﬁnitions 3. rm mc860_boot_sh 4. cp mc860_double_boot_sh mc860_boot_sh The next time a user enters IMAGE using this IMAGE installation, the double precision extension will be enabled. 10.2.2 Enabling for Single Follow the steps below for enabling for a single user: Users 1. Log in as yourself. 2. cd to your home directory. 3. cp /image/bin5.7./mc860_double_boot_sh mc860_boot_sh 4. chmod +x mc860_boot_sh The next time you enter IMAGE, the double precision extension will be enabled, even if the IMAGE installation has the extension disabled. 10.2.3 Disabling for All Users Follow the steps below for disabling for all users: 1. Become root on the machine whose disks hold /image/bin.5.7. 2. cd /image/bin.5.7 3. rm mc860_boot_sh 4. cp mc860_single_boot_sh mc860_boot_sh The next time a user enters IMAGE using this IMAGE installation, the double precision extension will be disabled. 10.2.4 Disabling for Single Follow the steps below for disabling for a single user: Users 1. Log in as yourself. 2. cd to your home directory. 3. cp /image/bin5.7./mc860_single_boot_sh mc860_boot_sh 4. chmod +x mc860_boot_sh The next time you enter IMAGE, the double precision extension will be dis- abled, even if the IMAGE installation has the extension enabled. Note In all situations, an mc860_boot_sh installed for a single user overrides the IMAGE-wide default. 10.3 Type Deﬁnitions Two type deﬁnitions (typedef) are available to the test program for declaring complex and double precision complex data structures in tester memory. The typedefs are: typedef struct { float real; float imag; } COMPLEX; typedef struct { double real; double imag; } D_COMPLEX; December 1996 Version 6.2 10–2 Previous Page Next Page Go To Quit Digital Signal Processing Data Buffer Allocation The words COMPLEX and D_COMPLEX can be used when deﬁning variables. For example, to deﬁne an array of 10 complex numbers named myarray use the fol- lowing statement: COMPLEX myarray[10]; To assign the imaginary part of the ﬁfth element (element 4) to a variable: float val; val = myarray[4].imag; To deﬁne an array of 10 double precision complex numbers named myarray use the following statement: D_COMPLEX myarray[10]; To assign the imaginary part of the ﬁfth element (element 4) to a variable: double val; val = myarray[4].imag; To aid in test program development, you can view data which exists in a DSP environment buffer directly using the Wave Display. You can also use the Wave Display to view ﬁles written by the DSP move command. In all cases, you can- not view complex or double precision data. Attempting to do so results in the Wave Display reporting an error. Note While it is possible to create double and double complex buffers without double precision DSP enabled, there is no beneﬁt to doing so. 10.4 Data Buffer Use the set dsp create command to allocate data space for DSP operations. Allocation The buffer created resides in the array processor if the hardware is available. The total number of buffers allowed simultaneously in all test stations is about 96. Each buffer handle allocated (temp, perm, or equiv) uses one of these. set dsp create = (<buf_handle>, ... ,<buf_handle>) type: real buf: perm size = <integer> ; integer temp complex d_real d_complex Where: <buf_handle> Is a variable (which you must deﬁne) of type DSP- BUFFER or of type int. When IMAGE executes the set dsp create command, it assigns an integer value to this variable, which it uses to identify the buffer. The value assigned is not important to the user, but you should never modify the contents of this variable. type: Represents the type of data the buffer holds. inte- ger indicates signed integers; real are single preci- sion ﬂoating point numbers, d_real are double precision ﬂoating point numbers, complex is a pair of single precision ﬂoating point numbers (the ﬁrst is December 1996 Version 6.2 10–3 Previous Page Next Page Go To Quit Digital Signal Processing Buffer Equivalence the real part, the second is the imaginary part), and d_complex is a pair of double precision ﬂoating point numbers. buf: Describes how IMAGE should handle the buffer. If speciﬁed as temp, the buffer is deallocated at the completion of the test program. (You can deallocate temp buffers from within the test program using the reset dsp command. See “Removing Buffers” on page 10–6.) If speciﬁed as perm, once the buffer is allocated it is not deallocated until the test program is deleted. The perm type allows you to maintain data from one execution of the test program to the next. size = <integer> Is an integer expression of the number of elements in the buffer. The number of bytes allocated by IMAGE is based on this number. Real and integer ele- ments are four bytes each; complex and d_real ele- ments are eight bytes each; d_complex elements are 16 bytes each. 10.4.1 Runtime Once a buffer is created as perm, repeated executions of the same dsp create Considerations command are ignored because it remains in existence between test program executions. These buffers must have static buffer handles. That is, their deﬁni- tion must contain the word static or be outside any braces ({}). The buf_handle maps to an index in an array of structures. Each structure describes the buffer allocation (such as size, type, and where it is located). The number of bytes allocated for a buffer is one of the following: (size * sizeof(int)) for int (size * sizeof(ﬂoat)) for real (size * 2 * sizeof(ﬂoat)) for complex (size*sizeof(double)) for d_real (size*2*sizeof(double)) for d_complex A complex number is represented by two ﬂoats. A d_complex number is repre- sented by two doubles. 10.4.2 Example DSPBUFFER buffer_a; main() { ... /* Create a temporary buffer named "buffer_a" to hold */ /* 128 floating point numbers */ set dsp create= (buffer_a) type:real buf:temp size=128; ... } 10.5 Buffer Equivalence When you must access a DSP buffer as a different data type (real instead of complex, for example) or when a subset of the data is to be processed, you can use the set dsp equiv equivalence command. This command allows you to deﬁne a new buf_handle for an existing DSP buffer. Optionally, the start of the buffer can begin at other than the ﬁrst element and the size may be less than the original. The new buffer handle, unlike a typical December 1996 Version 6.2 10–4 Previous Page Next Page Go To Quit Digital Signal Processing Buffer Equivalence buffer handle, can be reused if the IMAGE Behavior Chooser option called reuse_equiv_handles is turned on. If the new buffer handle contains the handle of an existing equivalence buffer, the existing equivalence buffer is dis- posed of and the new equivalence is established. This allows you to minimize the number of buffer handles used by a test program (as a limited number are available). Beginning with V6.2, the IMAGE Behavior Chooser option reuse_equiv_handles is turned off by default and no attempt is made to reuse the equivalence buffer handles unless you turn on the option. You should not use this option unless buffer handles are in short supply or for compatibil- ity with old test programs (see “Using the IMAGE Behavior Chooser” on page 5–10 in the IMAGE Base Language Manual and the online help, IMAGE Quick Help, Base Language, IMAGE Behavior Chooser). The syntax is set dsp equiv=(<new_buf_handle>) to=(<buf_handle>) type: real size=<integer> [offset=<integer>] ; integer complex d_real d_complex Where: <new_buf_handle> Is a variable of type DSPBUFFER or int, which becomes the new buffer handle for the speciﬁed buffer data. <buf_handle> Is an existing buffer, previously deﬁned by a set dsp create statement. type: Is the data type associated with the new buffer han- dle. integer indicates signed integers; real are single precision, float are ﬂoating point numbers, d_real are double precision ﬂoating point numbers, complex is a pair of single precision ﬂoating point numbers (the ﬁrst is the real part, the second is the imaginary part), and d_complex is a pair of double precision ﬂoating point numbers. size=<integer> Is the number of elements associated with the new buffer handle. It cannot exceed the size of the exist- ing buffer minus the offset. For instance, if the exist- ing buffer has 20 real elements and the equivalence buffer is of type complex (and completely overlays it), the size would be 10 (1 complex= 2 reals). offset=<integer> Is an optional starting element expression (0 to n) in the existing buffer where the new buffer handle is to start. Note IMAGE does not allow you to form an equivalence buffer from an already existing equivalence buffer. 10.5.1 Examples The following two examples show buffer equivalence. Both examples start on the second element of the buffer. Example 1 shows the creation of a complex buffer, and example 2 shows the creation of a real buffer. Note that each com- plex number has two real values. December 1996 Version 6.2 10–5 Previous Page Next Page Go To Quit Digital Signal Processing Removing Buffers Example 1: set dsp create= (APreal) size=10 type:real buf:temp; set dsp equiv= (APcomplex) to=(APreal) type:complex size=2 offset=1 Real buffer (APreal) already exists 1.00 –1.00 2.00 —2.00 3.00 —3.00 4.00 —4.00 5.00 —5.00 –1.00 2.00 —2.00 3.00 Complex buffer (APcomplex) is created Example 2: set dsp create= (APcomplex) size=5 type:complex buf:temp; set dsp equiv= (APreal) to=(APcomplex) type:real size=2 offset=1; Complex buffer (APcomplex) already exists 1.00 –1.00 2.00 —2.00 3.00 —3.00 4.00 —4.00 5.00 —5.00 2.00 —2.00 Real buffer (APreal) is created 10.6 Removing Buffers Use the reset dsp command to deallocate a temporary buffer a test program has created. This is useful for freeing array processor memory or buffer handles or both. (A limited number of buffer handles is available.) The syntax is reset dsp: all | last | perm; Where: all Deallocates all buffers created by the command and speciﬁed to be temp. last Deallocates or removes the last temporary buffer created. Also removes any equivalence buffers you create. perm Deallocates all permanent, as well as temp, and equiv buffers created. Note The contents of the DSP buffer variable are not altered by the reset dsp statement. Use caution when reusing a DSP buffer variable. An example would be: December 1996 Version 6.2 10–6 Previous Page Next Page Go To Quit Digital Signal Processing Moving Data /* deallocate the last 5 temporary buffers created */ int i; for(i= 0; i < 5; ++i) reset dsp: last; 10.7 Moving Data The following command moves data between CPU arrays, DSP buffers, capture memory (also called dig_cap or c_mem) and the PLFDIG. The data moved is converted based on the speciﬁed form of the data in the buffer. move c_mem: offset= <integer> size= <integer> [justify: left | right] adata= <array of floats> size= <integer> aidata= <array of integers> size= <integer> axdata= <array of complex numbers> size= <integer> addata= <array of doubles> size= <integer> adxdata= <array of double complex numbers size= <integer> file= <filename> size= <integer> dsp_data= <buf_handle> size= <integer> plfdig: offset= <integer> size= <integer> [readback: coarse | fine] to: dsp_data= <buf_handle> adata= <array of floats> aidata= <array of integers> axdata= <array of complex numbers> addata= <array of doubles> adxdata= <array of double complex numbers> file= <filename> smpl_freq= <sampling frequency> cap_sz= <integer> domain: time | freq data= <double> error= <error variable> timeout= <time> ; Where: c_mem Speciﬁes transfers from a capture memory. If the capture memory is not triggered when the move command is executed, a runtime error occurs. To wait for it to trigger, use the timeout parameter. Once triggered, move waits for any outstanding cap- ture memory transfers to ﬁnish before transferring new data. Errors can be handled directly by the test program by specifying the optional error parame- ter. offset Is a signed integer expression (negative is pretrig- ger). It speciﬁes where to begin moving samples from capture memory. For example, if offset=100, IMAGE begins moving sample data from the capture memory beginning at the sample located 100 sam- December 1996 Version 6.2 10–7 Previous Page Next Page Go To Quit Digital Signal Processing Moving Data ples after the trigger point. This option is for moving data from the capture memory only. size Is an integer expression for the number of elements to be moved. justify: left | right Is an optional parameter which tells IMAGE how to position the data from the capture memory in the DSP buffer. If left, the capture memory data has its MSB in the upper bits of the 32-bit buffer word. If right, the data has its LSB in the lower bits of the buffer word. If justify is not speciﬁed, IMAGE left justiﬁes for analog capture memories and right jus- tiﬁes for all others. This parameter only applies to 16 bit or smaller data transfers where the read_mask ends in 0xf. adata Represents a real array (ﬂoat). aidata Represents an integer array. axdata Represents a complex array (pairs of ﬂoat). addata Represents a real array (double). adxdata Represents a complex array (pairs of double). file Is used to read or write a disk ﬁle in a Wave Display compatible format. Disk ﬁle transfers are limited to bidirectional operations between disk and memory arrays, disk and DSP buffers, and capture memory to disk. The ﬁle name must specify the complete path and extension, if any. Note Transferring data from a capture memory to a ﬁle under the simu- lator does not create a ﬁle. Since no data is transferred, only error checking occurs. <buf_handle> Identiﬁes the buffer for the data transfer. It is the name assigned to the buffer in a set dsp create or set dsp equiv statement. If the buffer is an equivalence buffer with data type real or integer, the buffer must begin on an even element or a runtime error occurs. plfdig Speciﬁes transfers from a Precision Low Frequency Digitizer with on board capture memory. If the cap- ture memory is not triggered when the move com- mand is executed, a runtime error occurs. To wait for it to trigger, use the timeout parameter. Once trig- gered, move waits for any outstanding capture mem- ory transfers to ﬁnish before transferring new data. Errors can be handled directly by the test program by specifying the optional error parameter. readback Speciﬁes coarse (16 bit) readback or ﬁne (23 bit) readback from a PLFDIG with on board capture memory. December 1996 Version 6.2 10–8 Previous Page Next Page Go To Quit Digital Signal Processing Moving Data smpl_freq Is used when writing data to a ﬁle and speciﬁes the sample frequency used to capture the data. cap_sz Is used when writing data to a ﬁle and speciﬁes the number of points originally captured. domain: time | freq Is used when writing data to a ﬁle and indicates whether the data represents points in the time or frequency domain. double Is any variable declared as a double. This statement moves exactly one measurement. The size parame- ter to the move statement is not valid for this desti- nation. timeout Is a ﬂoating point expression which speciﬁes an optional backup timer for capture memory transfers only. If used, the number is a time-out for the opera- tion. (The test system waits for the speciﬁed time- out period, and if the capture memory is not trig- gered before the speciﬁed period, or if the capture is not completed before the speciﬁed period, a runtime error occurs). The timeout value is in seconds. error Directs IMAGE not to execute the runtime error reporting routine (tl_error) if an error occurs, but instead to return an indication of the error in the speciﬁed integer variable. The possible return val- ues are: TL_DSP_SUCCESS No error TL_DD_FULL No more handles available TL_ZMEM_FULL Array processor memory full TL_ZIP_ERROR Array processor call failed TL_UNKWN_TYPE Unknown data type speciﬁed TL_MALLOC_FAIL Can not dynamically allocate memory TL_DSP_BAD_SIZE Illegal size speciﬁed TL_DSP_BAD_BH Buffer handle not allocated TL_DSP_BAD_TYPE Illegal data type speciﬁed TL_NOT_TEMP Buffer handle not a temporary buffer TL_NOT_LAST Buffer not the last allocated TL_UNKWN_CLASS Unknown memory class speciﬁed TL_DSP_BAD_CONV Illegal data conversion speciﬁed TL_DSP_BAD_INPLACE In-place data conversion not allowed TL_WAIT_FAIL zip_queue_wait() failed TL_DSP_CMEM_NOCLK Clock not started for dig_cap TL_DSP_NOT_QUAD Equiv buffer not on an even boundary TL_DSP_FILE_OPEN_ERR Cannot open or read the ﬁle TL_DSP_FILE_WRT_ERR Cannot create or write to the ﬁle TL_DSP_FILE_EOF Unexpected end-of-ﬁle TL_DSP_FILE_NOTWAVE Not a Wave Display compatible ﬁle TL_DSP_CMEM_NOTRIG Capture memory has not triggered TL_DSP_CMEM_TO Capture memory did not trigger before timeout TL_DSP_CMEM_NONE No dig_cap present for move TL_DSP_TMEM_PART Bad tmem partition number TL_DSP_TMEM_SIZE Size too large TL_DSP_TMEM_TIMEOUT Timeout waiting for memory TL_DSP_TMEM_CPUDMA DMA to CPU failed TL_DSP_TMEM_CONFIG tmem and/or tsy missing December 1996 Version 6.2 10–9 Previous Page Next Page Go To Quit Digital Signal Processing Moving Data TL_DSP_INSTR_UNCAL Instrument is uncalibrated TL_DSP_INSTR_NO_SELECT Instrument could not be selected TL_DSP_SET_SINCE_ARM Must arm instrument before moving data TL_DSP_INVALID_INTLV Invalid interleaved move TL_DSP_BADTRNSZ Illegal capture memory word size TL_DSP_DMATO Array processor did not complete DMA TL_DSP_CMEM_PAR_ERR Capture memory parity error TL_DSP_CMEM_ALARM Capture memory alarm error TL_DSP_UNS_MOVE Unsupported move combination 10.7.1 Moving Data From Figures 10–1 to 10–3 show how data is moved from capture memory to the Capture Memory to the array processor using the move statement. The ﬁgures also show the effects of Array Processor the justify parameter on transferred data. When capturing data of 16 bits or less, wire the DIB starting from digital chan- nel 16. This will make processing the digital data in the array processor easier. For data larger than 16 bits, start with channel 20. 10.7.2 Important The test system cannot guard against a data overﬂow. Therefore, when trans- Considerations ferring to and from CPU arrays, you must ensure that the size of memory arrays is large enough to hold the number of elements speciﬁed. Errors in this area may cause random and unpredictable results. When moving data from an equivalence DSP buffer to a CPU array, the equiv- alence buffer must have been allocated on an even boundary if the following conditions apply: • The amount of data being moved is greater than or equal to 32 elements • The equivalence data type is real or integer 12 BIT TRANSFER THE LOWER 4 BITS ARE MASKED AND NOT TRANSFERRED 12 bits 4 bits 4 bits 12 bits 4 bits 4 bits CAPTURE MEMORY 0000 0000 ARRAY PROCESSOR 0000 0000 16 bits 12 bits 4 bits 12 bits 4 bits 16 bits MSB MSB set pin=<pin ID> set pin=<pin ID> dig_cap: read_mask=0xff; dig_cap: read_mask=0xff; move ... justify: right; move ... justify: left; Figure 10–1 Transferring Data of Less Than 16 Bits From Capture Memory to the Array Processor December 1996 Version 6.2 10–10 Previous Page Next Page Go To Quit Digital Signal Processing Moving Data THE LOWER 4 BITS ARE MASKED AND NOT TRANSFERRED 16 bits 4 bits 16 bits 4 bits CAPTURE MEMORY ARRAY PROCESSOR 16 bits 16 bits 16 bits 16 bits MSB MSB set pin=<pin ID> set pin=<pin ID> dig_cap: read_mask=0x0000f; dig_cap: read_mask=0x0000f; move ... justify: right; move ... justify: left; Figure 10–2 Transferring 16-Bit Data From Capture Memory to the Array Processor If these conditions apply and the equivalence buffer does not start on an even element of the original buffer, an error occurs and the move is not completed. Also remember that when running the algorithms, all moves are synchronous. That is, the command does not end until the move is complete or an error occurs. 16 bits 4 bits 16 bits 4 bits CAPTURE MEMORY ARRAY PROCESSOR 20 bits 12 bits 20 bits 12 bits MSB MSB set pin=<pinlist> set pin=<pinlist> dig_cap: read_mask=0x00000; dig_cap: read_mask=0x00000; move ... justify:right; move ... justify:left; THE justify PARAMETER IS IGNORED Figure 10–3 Transferring 20-Bit Data from Capture Memory to the Array Processor December 1996 Version 6.2 10–11 Previous Page Next Page Go To Quit Digital Signal Processing Moving Data 10.7.3 Data Movement and The tables 10–1 to 10–5 show legal data movement as a function of data type. Conversion Table 10–1 Moving Data From the CPU To CPU To DSP To File Data Type I R C D DC I R C D DC I R C D DC Integer m 1 m 1 m Real 2 m 5 2 m 5 m Complex m 7 m 7 m Double 6 m 6 m m Double 8 m 8 m m Complex Data Type To WGEN To WDIG I R C D DC I R C D DC Integer m m Real 4 4 Complex Double Double Complex Table 10–2 Moving Data From the DSP To CPU To DSP To File Data Type I R C D DC I R C D DC I R C D DC Integer m m 1 m Real m 2 m * 5 m Complex m * m 7 m Double m 6 m * m Double m 8 * m m Complex December 1996 Version 6.2 10–12 Previous Page Next Page Go To Quit Digital Signal Processing Moving Data To WGEN To WDIG Data Type I R C D DC I R C D DC Integer m m Real 4 4 Complex Double Double Complex Table 10–3 Moving Data From the File To CPU To DSP To File Data Type I R C D DC I R C D DC I R C D DC Integer m 1 m Real 2 m 5 m 5 Complex m 7 m 7 Double m 6 m Double 8 m 8 m Complex To WGEN To WDIG Data Type I R C D DC I R C D DC Integer m m Real 4 4 Complex Double Double Complex December 1996 Version 6.2 10–13 Previous Page Next Page Go To Quit Digital Signal Processing Moving Data Table 10–4 Moving Data From the WGEN To CPU To DSP To File To WGEN To WDIG Data Type I R C I R C I R C I R C I R C Integer m 3 m 3 m m m Real Complex Table 10–5 Moving Data From the WDIG To CPU To DSP To FILE To WGEN To WDIG Data Type I R C I R C I R C I R C I R C Integer m 3 m 3 m m m Real Complex Column and row labels are: I= integer, R= real, C= complex, D= double, DC= double complex. “m” indicates data move only (no conversion is performed). “*” indicates the move must be out-of-place and conversion is performed. “1” indicates int to float conversion performed on moved data. “2” indicates float to int conversion performed on moved data. “3” indicates fract2 to float conversion performed on moved data. “4” indicates float to fract2 conversion performed on moved data. “5” indicates float to double conversion performed on moved data. “6” indicates double to float conversion performed on moved data. “7” indicates complex to double complex conversion performed on moved data. “8” indicates double complex to complex conversion performed on moved data. Blank spaces indicate no legal move. December 1996 Version 6.2 10–14 Previous Page Next Page Go To Quit Digital Signal Processing DSP Calculations 10.7.4 Examples Example 1: /* Move data from C_MEM to a DSP buffer */ move c_mem: offset= -128 size= 256 to: dsp_data= buffer_a; Example 2: /* Move a data from a disk file to a DSP buffer */ int err; move file= "/mydir/table.dsp" size= 256 to: dsp_data= table_buf error= err; switch(err) { case TL_DSP_FILE_OPEN_ERR: puts("Error reading table.dsp file."); break; default: puts("Unexpected error while reading table.dsp file."); break; } 10.8 DSP Calculations The following ITL statements allow you to deﬁne a sequence of operations (define_chain) or start a DSP algorithm or execute a previously deﬁned sequence of DSP algorithms (exec_chain). Note DSP chains are described in this section for compatibility only. Your test program runs faster and more efﬁciently if you deﬁne functions that call all the algorithms in sequence. Using DSP chains is an obsolete technique that is not recommended. set dsp [define_chain = <chain name>] { <algorithm definition 1> <algorithm definition 2> ... <algorithm definition N> } ; start dsp <algorithm definition> ; exec_chain = <chain name> Where: define_chain Is a sequence of operations to be executed. The sequence is not executed by this command, it is only deﬁned. To execute it, use the exec_chain form of the start command. The define_chain must come before the exec_chain. Each chain deﬁned uses an entry in the buffer allocation array and cre- ates a temporary buffer to hold the chain. Once deﬁned, the chain can be executed multiple times during the test program. December 1996 Version 6.2 10–15 Previous Page Next Page Go To Quit Digital Signal Processing DSP Calculations <chain name> Is an integer variable (like buf_handle) deﬁning a sequence of operations. The number is deﬁned by IMAGE when the define_chain keyword is used. <algorithm definition> Is deﬁned as: <algorithm name> in1 = <buf_handle> in2 = <buf_handle> in3 = <buf_handle> out1 = <buf_handle> out2 = <buf_handle> out3 = <buf_handle> size1 = <integer> size2 = <integer> size3 = <integer> [in_offset1 = <integer>] [in_offset2 = <integer>] [in_offset3 = <integer>] [out_offset1 = <integer>] [out_offset2 = <integer>] [out_offset3 = <integer>] [in_strd1 = <integer>] [in_strd2 = <integer>] [in_strd3 = <integer>] [out_strd = <integer>] [option_flag= <integer>] ; <algorithm name> Is the name of an algorithm deﬁned in “DSP Algo- rithms” on page 10–20. in1, in2, and in3 Represent the buffers used as the sources of data for the operation. The number of buffers needed depends on the operation selected. If an operation requires a scalar, element 0 of the buffer is used. out1, out2, and out3 Represent the buffers where the results of the oper- ation are placed. The number of buffers needed depends upon the operation selected. If an operation requires a scalar, element 0 of the buffer is used. <buf_handle> Is an integer number identifying the buffer. This number is assigned by IMAGE when the buffer is created using the set dsp create or set dsp equiv commands. Each algorithm checks the type of the buffers to ensure they are legal for the operation. If an illegal buffer type is used for the operation, a runtime error occurs. size1, size2, and size3 Are the number of elements on which to operate. The destination buffers must be large enough to hold the results of the operation. in_offset1, in_offset2, and in_offset3 Optional offset for the input buffer. This offset deter- December 1996 Version 6.2 10–16 Previous Page Next Page Go To Quit Digital Signal Processing DSP Calculations mines the location within the buffer at which the algorithm will have its effect. For compatibility, the reset state for all offsets is zero. out_offset1, out_offset2, and out_offset3 Optional offset for the output buffer. This offset determines the location within the buffer at which the algorithm will have its effect. For compatibility, the reset state for all offsets is zero. in_strd1, in_strd2, and in_strd3 Specify an integer multiplier used to determine the next element in the source buffer. For example, to include every element in the source buffer, specify in_strd1=1; every other element in the source buffer, specify in_strd1=2; and every third element in the source buffer, specify in_strd1=3. (The default is 1, every element.) out_strd Speciﬁes an integer multiplier used to determine the next element of the output buffer. For example, to include every element in the output buffer, specify out_strd=1; every other element in the output buffer, out_strd=2; and every third element in the output buffer, out_strd=3. (The default is 1, every element.) option_flag = <integer> Is used by some algorithms to modify their behavior. There is no default value; it must be speciﬁed if required. Note Each algorithm requires a speciﬁc set of parameters, but not all the parameters. Which parameters are required depends on the algo- rithm. The vclr (vector clear) algorithm, for instance, requires the parameters size1 and out1. In contrast, the vlim (vector limit) algorithm requires the parameters in1, in2, in3, out1, and size1. 10.8.1 Runtime A variety of error checking occurs for each algorithm. In addition to special Considerations checks, each algorithm generally has the following checks performed: • Buffer handle veriﬁcation • Buffer data types legal for algorithm • Buffer size consistent with # of elements to process and strides speciﬁed. The criteria to be met is: • Buffer size ≤ ((stride * (#elements - 1)) + 1). For instance, if an algorithm speciﬁes size1= 300 and in_strd= 4, the input buffer must be greater than or equal to 1197 elements [(4 * 299) + 1]. Chains are allocated as temporary buffers. Therefore, this command must be executed once each time the test program runs, before executing the chain. 10.8.2 Examples Example 1: December 1996 Version 6.2 10–17 Previous Page Next Page Go To Quit Digital Signal Processing DSP Calculations /* Start the DSP operation to find the maximum element of a vector. */ /* */ /* The offsets find the largest value between locations APoffset */ /* and APoffset+SIZ1-1 of buffer APpseudo, and place it in location */ /* APpeakoffset of buffer APpeak. APelement will receive the index */ /* at which this value was found, minus the offset; that is, if the */ /* largest value is found at location 10 of APpseudo, APelement will */ /* contain 10-APoffset. */ start dsp maxv in1= APpseudo out1= APpeak out2= APelement size1= SIZ1 in_offset1=APoffset out_offset1=APpeakoffset; Example 2: /* define a sequence of operations and execute */ set dsp define_chain= do_two { rfftb in1= input out1= output size1= 64 option_flag= 1 cvmags in1= output out1= result size1= 32 }; start dsp exec_chain= do_two; Example 3: int AP_buf1; int AP_buf2; int AP_buf3; int j; float some_data[16]; set dsp create=(AP_buf1) buf:temp type:real size=16; set dsp create=(AP_buf2) buf:temp type:real size=16; set dsp create=(AP_buf3) buf:temp type:real size=16; for (j=0;j<16;j++) some_data[j] = j; move adata=some_data size=16 to: dsp_data=AP_buf1; for (j=0;j<16;j++) some_data[j] = -j; move adata=some_data size=16 to: dsp_data=AP_buf2; start dsp vclr /* clear AP_buf3 vector */ out1=AP_buf3 size1=16; start dsp vadd in1=AP_buf1 in2=AP_buf2 out1=AP_buf3 in_strd1=2 size1=8; Figure 10–4 shows the effect the vadd algorithm has on buffers AP_buf1, AP_buf2, and AP_buf3 in example 3. December 1996 Version 6.2 10–18 Previous Page Next Page Go To Quit Digital Signal Processing DSP Calculations in_strd1=2 AP_buf1 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 + AP_buf2 -1 -2 -3 -4 -5 -6 -7 -8 -9 -10 -11 -12 -13 -14 -15 -16 AP_buf3 0 1 2 3 4 5 6 7 Figure 10–4 Effect of vadd Algorithm on Input and Output Buffers December 1996 Version 6.2 10–19 Previous Page Next Page Go To Quit Digital Signal Processing DSP Algorithms 10.9 DSP Algorithms The following is an overview of the DSP algorithms. For more information on these algorithms, see the Mercury manual.1 Note Double precision algorithm names are the same as single precision algorithm names listed below with a “d” appended to the end. For example, the double precision blackman algorithm is blkmand. Double precision algorithms require their input/output buffers to be of the appropriate double precision types. 10.9.1 Integer Algorithms vandi Vector AND (32-bit bitwise logical) This function performs a bitwise AND on the integer input vectors. out1[k]=(in1[i] & in2[j]); for (i=0, j=0, k=0; i<size1; i=i+in_Strd1,j=j+in_strd2,k=k+out_strd) Parameters: in1= An input buffer of 32-bit numbers (type=integer). in2= Another input buffer of 32-bit numbers (type=integer). out1= An output buffer for 32-bit results (type=integer). size1= The number of buffer elements. in_strd1= Speciﬁes the number by which to increment input buffer (in1). index for each iteration of this operations. in_strd2= Speciﬁes the number by which to increment input buffer (in2). index for each iteration of this operations. out_strd= Speciﬁes the number by which to increment output buffer (out1) index for each iteration of this operations. You must have double precision DSP enabled to use this algorithm. See “Dou- ble Precision DSP Capabilities” on page 10–1 and “Enabling/Disabling Double Precision DSP” on page 10–1 for more information. vori Vector OR (32-bit bitwise logical) This function performs a bitwise OR on the integer input vectors. out1[k]=(in1[i] | in2[j]); for (i=0, j=0, k=0; i<size1; i=i+in_Strd1,j=j+in_strd2,k=k+out_strd) Parameters: in1= An input buffer of 32-bit numbers (type=integer). in2= Another input buffer of 32-bit numbers (type=integer). out1= An output buffer for 32-bit results (type=integer). size1= The number of buffer elements. in_strd1= Speciﬁes the number by which to increment input buffer (in1). index for each iteration of this operations. in_strd2= Speciﬁes the number by which to increment input buffer (in2). index for each iteration of this operations. out_strd= Speciﬁes the number by which to increment output buffer. (out1) index for each iteration of this operations. 1. See also “Test Technique Note MS1: Mathematical Oversampling”; “Test Technique Note MS2: Spectrum Analysis Using the Chirp-Z Transform”; “Test Technique Note MS9: Template Testing Techniques”; “Test Technique Note MS10: Using DSP Algo- rithms to Convert Digital Signal Data to Floating Point Notation”. December 1996 Version 6.2 10–20 Previous Page Next Page Go To Quit Digital Signal Processing DSP Algorithms You must have double precision DSP enabled to use this algorithm. See “Dou- ble Precision DSP Capabilities” on page 10–1 and “Enabling/Disabling Double Precision DSP” on page 10–1 for more information. veqvi Vector Equivalence (32-bit bitwise logical) This function performs a bitwise XNOR on the integer input vectors. out1[k]= ~(in1[i] ^ in2[j]); for (i=0, j=0, k=0; i<size1; i=i+in_Strd1,j=j+in_strd2,k=k+out_strd) Parameters: in1= An input buffer of 32-bit numbers (type=integer). in2= Another input buffer of 32-bit numbers (type=integer). out1= An output buffer for 32-bit results (type=integer). size1= The number of buffer elements. in_strd1= Speciﬁes the number by which to increment input buffer (in1). index for each iteration of this operations. in_strd2= Speciﬁes the number by which to increment input buffer (in2). index for each iteration of this operations. out_strd= Speciﬁes the number by which to increment output buffer. (out1) index for each iteration of this operations. You must have double precision DSP enabled to use this algorithm. See “Dou- ble Precision DSP Capabilities” on page 10–1 and “Enabling/Disabling Double Precision DSP” on page 10–1 for more information. 10.9.2 Real Vector Algorithms blkman/blkmand Blackman Window Multiply This function multiplies vector in1 by a Blackman window. out1[i]= in1[i]*(0.42-0.5*cos(i*2*pi/size1)+ 0.08*cos(i*4*pi/size1)) for: i= 0 to size1-1 parameters: in1, out1, size1, in_strd1, out_strd corr Correlation (convolution & FIR) This function performs either a convolution or correlation on two vectors in1 and in2 and stores the results in out1. out[i]= SUM{in[i*in_strd1+j]*in2[j]} for: i= 0 to size1-1 j= 0 to size2-1 in_strd1= the decimation factor size1= out1 # of elements size2= in2 # of elements (must be odd, >9) Notes: reverse in2 data order to perform convolution or FIR. # of output points is always the nearest multiple of 4. in1 must be at least n elements long where: n ≥ [(size1-1)*in_strd1 + size2] in1 must be aligned to a 64 bit boundary December 1996 Version 6.2 10–21 Previous Page Next Page Go To Quit Digital Signal Processing DSP Algorithms parameters: in1, in2, out1, size1, size2, in_strd1 dotpr Dot Product This function computes the dot product of the elements of two real vectors in1 and in2 and stores the results in real scalar out1. out1[0]= SUM{in1[i]*in2[i]} for: i= 0 to size1-1 parameters: in1, in2, out1, size1, in_strd1, in_strd2 hamm/hammd Hamming Window Multiply This function multiplies vector in1 by a Hamming window. out1[i]= in1[i]*(0.54-0.46*cos(i*2*pi/size1)) for: i= 0 to size1-1 parameters: in1, out1, size1, in_strd1, out_strd hann/hannd Hanning Window Multiply This function multiplies vector in1 by a Hanning window. out1[i]= X*in1[i]*(1-cos(i*2*pi/size1)) for: i= 0 to size1-1 X= 0.5 if option_flag= 0, X= sqrt(2/3) if option_flag= 1 parameters: in1, out1, size1, in_strd1, out_strd, option_ﬂag hist/histd Histogram This function histograms the data stored in buffer in1 into the appropriate bin in output buffer out1. hist is additive. If hist is invoked upon an uncleared vector, the histogram is added to whatever is already in there. Parameters: in1= An input buffer containing real data. in2= Maximum histogram value. in3= Minimum histogram value. out1= An output buffer for the histogram results. size1= Number of elements in in1 (must be greater or equal to 4 and a multiple of 2). in_strd1= Speciﬁes the number by which to increment the input buffer (in1) index for each binning operation. out_strd= Number of bins in histogram (32766 maximum). Algorithm: width of each bin=(in2 – in3)/out_strd; for (i=0; i < size1; i=i+in_strd1) { if (in1[i] < in3[0]) j[i] = 0 ; if (in1[i] ≥ in2[0]) j[i] = out_strd1 ; if (in3[0] ≤ in1[i] < in2[0]) December 1996 Version 6.2 10–22 Previous Page Next Page Go To Quit Digital Signal Processing DSP Algorithms j[i]=(int) (out_strd × (in1[i] – in3[0]) / (in2[0] – in3[0])) ; out1[j[i]]= out1[j[i]] + 1 }; Notes: • When histogramming output codes from an A/D converter, the width of each bin should equal one. For this to be the case, in2 must be one greater than the maximum histogram value. For example, if the maximum output code for a converter is 4095, the maximum histogram value should be 4095. However, to make the width of each bin equal to 1, set in2=4096. • Execution of this algorithm is considerably slower if the number of bins (out_strd) exceeds 16382. lveq Logical Vector Equal This function compares the elements of two vectors (in1, in2), and sets the cor- responding elements of the output vector out1 as follows. out1[i] = 1.0, if in1[i] = in2[i] = 0.0, if in1[i] != in2[i] for: i= 0 to size1-1 parameters: in1, in2, out1, size1, in_strd1, in_strd2, out_strd lvge Logical Vector Greater Than or Equal This function compares the elements of two vectors, in1 andin2, and sets the output vector out1 as follows. out1[i]= 1.0, if in1[i] ≥ in2[i] = 0.0, if in1[i] < in2[i] for: i= 0 to size1-1 parameters: in1, in2, out1, size1, in_strd1, in_strd2, out_strd lvgt Logical Vector Greater Than This function compares the elements of two vectors, and sets the corresponding elements of the output vector out1 as follows. out1[i]= 1.0, if in1[i] > in2[i] = 0.0, if in1[i] ≤ in2[i] for: i= 0 to size1-1 parameters: in1, in2, out1, size1, in_strd1, in_strd2, out_strd lvne Logical Vector Not Equal This function compares the elements of two vectors, and sets the corresponding elements of the output vector out1 as follows. out1[i]= 1.0, if in1[i] != in2[i] = 0.0, if in1[i] = in2[i] for: i= 0 to size1-1 parameters: in1, in2, out1, size1, in_strd1, in_strd2, out_strd lvnot Logical Vector Not December 1996 Version 6.2 10–23 Previous Page Next Page Go To Quit Digital Signal Processing DSP Algorithms This function takes the logical complement of real input vector in1 and stores the result in real output vector out1. out1[i]= 1.0, if in1[i] = 0.0 = 0.0, if in1[i] != 0.0 for: i= 0 to size1-1 parameters: in1, out1, size1, in_strd1, out_strd maxmgv Maximum Magnitude Element of a Vector This function ﬁnds the element having the maximum magnitude (absolute value) in a vector and stores its magnitude in out1. out1[0]= value of element with greatest absolute value parameters: in1, out1, size1, in_strd1 maxv Maximum Element of a Vector This function ﬁnds the maximum-value element in a vector and stores it in out1. out1[0]= greatest value found within in1[i] for: i= 0 to size1-1 out2[0]= element # of max value (real) (this value ranges from 0 to size1-1) parameters: in1, out1, out2, size1, in_strd1 meamgv Mean of Vector Element Magnitudes This function adds the absolute value of all elements in in1 and divides by size1. The resulting mean value is stored in scalar out1. out1[0]= SUM{ABS(in1[i])}/size1 for: i= 0 to size1-1 parameters: in1, out1, size1, in_strd1 meanv Mean of Vector Elements This function computes the mean value of the elements of vector in1. out1[0]= SUM{in1[i]}/size1 for: i= 0 to size1-1 parameters: in1, out1, size1, in_strd1 measqv Mean of Vector Element Squares This function computes the mean value of the squares of the elements of vector in1. out1[0]= SUM{in1[i]*in1[i]}/size1 for: i= 0 to size1-1 parameters: in1, out1, size1, in_strd1 minmgv Minimum Magnitude Element of a Vector December 1996 Version 6.2 10–24 Previous Page Next Page Go To Quit Digital Signal Processing DSP Algorithms This function ﬁnds the element having the minimum magnitude (absolute value) in vector in1 and stores its magnitude in out1. out1[0]= value of element with least absolute value found within in1[i] for: i= 0 to size1-1 parameters: in1, out1, size1, in_strd1 minv Minimum Element of a Vector This function ﬁnds the minimum value element in a vector and stores it in out1. out1[0]= least value found within in1[i] for: i= 0 to size1-1 out2[0]= element # of min value (real) (this value ranges from 0 to size1-1) parameters: in1, out1, out2, size1, in_strd1 rmsqv Root Mean Square of Vector Elements This function computes the square root of the mean value of the squares of the elements of vector in1 and stores the results in scalar out1. out1[0]= SQRT(SUM{in1[i]*in1[i]}/size1) for: i= 0 to size1-1 parameters: in1, out1, size1, in_strd1 sve Sum of Vector Elements This function sums the elements of vector in1 and stores the sum in scalar out1. out1[0]= SUM{in1[i]} for: i= 0 to size1-1 parameters: in1, out1, size1, in_strd1 svemg Sum of Vector Elements Magnitudes This function sums the absolute values of the elements of vector in1 and stores the sum in scalar out1. out1[0]= SUM{ABS(in1[i])} for: i= 0 to size1-1 parameters: in1, out1, size1, in_strd1 svesq Sum of Vector Element Squares This function sums the squares of the elements of vector in1 and stores the results in scalar out1. out1[0]= SUM{in1[i]*in1[i]} for: i= 0 to size1-1 parameters: in1, out1, size1, in_strd1 December 1996 Version 6.2 10–25 Previous Page Next Page Go To Quit Digital Signal Processing DSP Algorithms svessq Sum of Vector Element Signed Squares This function sums the signed squares of the elements of vector in1 and stores the sum in scalar out1. out1[0]= SUM{in1[i]*ABS(in1[i])} for: i= 0 to size1-1 parameters: in1, out1, size1, in_strd1 vabs Vector Absolute Value This function computes the absolute value of the elements of vector in1 and stores the results in out1. out1[i]= ABS(in1[i]) for: i= 0 to size1-1 parameters: in1, out1, size1, in_strd1, out_strd vadd/vaddd Vector Addition This function adds the elements of two vectors, in1 and in2, and stores the results in out1. out1[i]= in1[i]+in2[i] for: i= 0 to size1-1 parameters: in1, in2, out1, size1, in_strd1, in_strd2, out_strd vam Vector Add and Multiply This function adds the elements of two vectors, in1 and in2, and multiplies the sum by the element of a third vector, in3, and stores the results in vector out1. out1[i]= (in1[i]+in2[i])*in3[i] for: i= 0 to size1-1 parameters: in1, in2, in3, out1, size1, in_strd1, in_strd2, in_strd3, out_strd vatan Vector One Argument Arctangent This function computes the arctangent of the elements of vector in1 and stores the results in vector out1. out1[i]= atan(in1[i]) for: i= 0 to size1-1 parameters: in1, out1, size1, in_strd1, out_strd vatan2 Vector Two Argument Arctangent This function computes the arctangent of the ratio of elements of two vectors, in1 and in2, and stores the results in vector out1. out1[i]= atan(in1[i]/in2[i]) for: i= 0 to size1-1 parameters: in1, in2, out1, size1, in_strd1, in_strd2, out_strd vclip Vector Clip December 1996 Version 6.2 10–26 Previous Page Next Page Go To Quit Digital Signal Processing DSP Algorithms This function clips the values of vector in1 to within a range speciﬁed by sca- lars in2 and in3. The results are stored in vector out1. out1[i]= in2[0], if in1[i] < in2[0] = in1[i], if in2[0] ≤ in1[i] < in3[0] = in3[0], if in3[0] ≤ in1[i] for: i= 0 to size1-1 parameters: in1, in2, in3, out1, size1, in_strd1, out_strd vclr/vclrd Vector Clear This function sets all the elements of vector out1 to zero. out1[i]= 0.0 for: i= 0 to size1-1 parameters: out1, size1, out_strd vcos/vcosd Vector Cosine This function computes the cosine of the elements of vector in1 and stores the results in vector out1. out1[i]= cos(in1[i]) for: i= 0 to size1-1 parameters: in1, out1, size1, in_strd1, out_strd vdiv/vdivd Vector Divide This function divides the elements of vector in1 by the corresponding elements of vector in2 and stores the results in vector out1. out1[i]= in1[i]/in2[i] for: i= 0 to size1-1 parameters: in1, in2, out1, size1, in_strd1, in_strd2, out_strd vexp Vector Natural Exponential This function computes the natural exponential of the elements of vector in1 and stores the results in vector out1. out1[i]= e**in1[i] for: i= 0 to size1-1 parameters: in1, out1, size1, in_strd1, out_strd vexp10 Vector Base 10 Exponential This function computes the base-10 exponential of the elements of vector in1 and stores the results in vector out1. out1[i]= 10.0**in1[i] for: i= 0 to size1-1 parameters: in1, out1, size1, in_strd1, out_strd vﬁll Vector Fill with Constant This function ﬁlls the elements of vector out1 with constant stored at in1. December 1996 Version 6.2 10–27 Previous Page Next Page Go To Quit Digital Signal Processing DSP Algorithms out1[i]= in1[0] for: i= 0 to size1-1 parameters: in1, out1, size1, out_strd vlim Vector Limit This function creates a vector out1 with only two values, in3 or -in3. The sign of each element of out1 depends on whether the corresponding element of in1 is less than the threshold in2 value. out1[i]= -in3[0], if in1[i] < in2[0] = in3[0], if in1[i] ≥ in2[0] for: i= 0 to size1-1 parameters: in1, in2, in3, out1, size1, in_strd1, out_strd vlog Vector Natural Logarithm This function takes the natural logarithm of the elements of vector in1 and stores the results in vector out1. out1[i]= ln(in1[i]) for: i= 0 to size1-1 parameters: in1, out1, size1, in_strd1, out_strd vlog10 Vector Base 10 Logarithm This function takes the base-10 logarithm of the elements of vector in1 and stores the results in vector out1. out1[i]= log(in1[i]) for: i= 0 to size1-1 parameters: in1, out1, size1, in_strd1, out_strd vma Vector Multiply and Add This function multiplies the elements of two vectors, in1 and in2 and then adds the product to the elements of a third vector, in3, and stores the results in out1. out1[i]= (in1[i]*in2[i])+in3[i] for: i= 0 to size1-1 parameters: in1, in2, in3, out1, size1, in_strd1, in_strd2, in_strd3, out_strd vmax Vector Maximum of Two Vectors This function selects the maximum value of corresponding pairs of elements of vectors in1 and in2 and stores the results in vector out1. out1[i]= in1[i], if in1[i] ≥ in2[i] = in2[i], if in1[i] < in2[i] for: i= 0 to size1-1 parameters: in1, in2, out1, size1, in_strd1, in_strd2, out_strd vmaxmg Vector Maximum Magnitude of Two Vectors December 1996 Version 6.2 10–28 Previous Page Next Page Go To Quit Digital Signal Processing DSP Algorithms This function selects the maximum absolute value of corresponding pairs of elements of vectors in1 and in2 and stores the results in out1. out1[i]= ABS(in1[i]), if ABS(in1[i]) ≥ ABS(in2[i]) = ABS(in2[i]), if ABS(in1[i]) < ABS(in2[i]) for: i= 0 to size1-1 parameters: in1, in2, out1, size1, in_strd1, in_strd2, out_strd vmin Vector Minimum of Two Vectors This function selects the minimum value of corresponding pairs of elements of vectors in1 and in2 and stores the results in out1. out1[i]= in1[i], if in1[i] ≤ in2[i] = in2[i], if in1[i] > in2[i] for: i= 0 to size1-1 parameters: in1, in2, out1, size1, in_strd1, in_strd2, out_strd vminmg Vector Minimum Magnitude of Two Vectors This function selects the minimum absolute value of corresponding pairs of ele- ments of vectors in1 and in2 and stores the results in out1. out1[i]= ABS(in1[i]), if ABS(in1[i]) ≤ ABS(in2[i]) = ABS(in2[i]), if ABS(in1[i]) > ABS(in2[i]) for: i= 0 to size1-1 parameters: in1, in2, out1, size1, in_strd1, in_strd2, out_strd vmov/vmovd Vector Move This function moves (copies) the elements of vector in1 to another vector, out1. out1[i]= in1[i] for: i= 0 to size1-1 parameters: in1, out1, size1, in_strd1, out_strd vmsa Vector Multiply and Scalar Add This function multiplies the elements of two vectors, in1 and in2, and then adds a scalar in3 to the products. The results are stored in vector out1. out1[i]= (in1[i]*in2[i])+in3[0] for: i= 0 to size1-1 parameters: in1, in2, in3, out1, size1, in_strd1, in_strd2, out_strd vmsb Vector Multiply and Subtract This function multiplies the elements of two vectors, in1 and in2, and then subtracts the elements of a third vector, in3, from the products. The results are stored in out1. out1[i]= (in1[i]*in2[i])-in3[i] for: i= 0 to size1-1 December 1996 Version 6.2 10–29 Previous Page Next Page Go To Quit Digital Signal Processing DSP Algorithms parameters: in1, in2, in3, out1, size1, in_strd1, in_strd2, in_strd3, out_strd vmul/vmuld Vector Multiply This function multiplies the elements of two vectors, in1 and in2, and stores the results in vector out1. out1[i]= in1[i]*in2[i] for: i= 0 to size1-1 parameters: in1, in2, out1, size1, in_strd1, in_strd2, out_strd vneg/vnegd Vector Negate This function negates the elements of vector in1 and stores the results in vec- tor out1. out1[i]= -in1[i] for: i= 0 to size1-1 parameters: in1, out1, size1, in_strd1, out_strd vpoly Vector Polynomial Evaluation This function evaluates a vector polynomial. out1[i]= SUM{in1[i]*in2[j]**(size2-i)} for i= 0 to size2 j= 0 to size1-1 size1= in1 # of elements size2= poly int order (must be ≥ 2) parameters: in1, in2, out1, size1, size2, in_strd1, in_strd2, out_strd vramp/vrampd Vector Fill with Ramp This function ﬁlls the elements of vector out1 with a ramp speciﬁed by scalars in1 and in2. out1[i]= in1[0]+(i*in2[0]) for: i= 0 to size1-1 in1[0]= initial value (real) in2[0]= increment (real) parameters: in1, in2, out1, size1, out_strd vsadd/vsaddd Vector Scalar Add This function adds scalar in2 to the elements of vector in1 and stores the results in vector out1. out1[i]= in1[i]+in2[0] for: i= 0 to size1-1 parameters: in1, in2, out1, size1, in_strd1, out_strd vsbm Vector Subtract and Multiply December 1996 Version 6.2 10–30 Previous Page Next Page Go To Quit Digital Signal Processing DSP Algorithms This function subtracts the elements of two vectors, in1 and in2, and multi- plies the difference by a third vector in3. The results are stored in out1. out1[i]= (in1[i]-in2[i])*in3[i] for: i= 0 to size1-1 parameters: in1, in2, in3, out1, size1, in_strd1, in_strd2, in_strd3, out_strd vsdiv/vsdivd Vector Scalar Divide This function divides the vector in1 by in2. Results are stored in out1. out1[i]= in1[i]/in2[0] for: i= 0 to size1-1 parameters: in1, in2, out1, size1, in_strd1, out_strd vsin/vsind Vector Sine This function computes the sine of the elements of vector in1 and stores the results in out1. out1[i]= sin(in1[i]) for: i= 0 to size1-1 parameters: in1, out1, size1, in_strd1, out_strd vsma Vector Scalar Multiply and Add This function multiplies the elements of vector in1 by scalar in2 and adds a second vector, in3 to the product. The results are stored in vector out1. out1[i]= (in1[i]*in2[0])+in3[i] for: i= 0 to size1-1 parameters: in1, in2, in3, out1, size1, in_strd1, in_strd3, out_strd vsmsa Vector Scalar Multiply and Scalar Add This function multiplies the elements of vector in1 by scalar in2 and adds a second scalar, in3, to the product. The results are stored in out1. out1[i]= (in1[i]*in2[0])+in3[0] for: i= 0 to size1-1 parameters: in1, in2, in3, out1, size1, in_strd1, out_str vsmsb Vector Scalar Multiply and Subtract This function multiplies the elements of vector in1 by scalar in2 and subtracts the elements of a second vector, in3, from the product. The results are stored in out1. out1[i]= (in1[i]*in2[0])-in3[i] for: i= 0 to size1-1 parameters: in1, in2, in3, out1, size1, in_strd1, in_strd3, out_strd December 1996 Version 6.2 10–31 Previous Page Next Page Go To Quit Digital Signal Processing DSP Algorithms vsmul/vsmuld Vector Scalar Multiply This function multiplies the elements of vector in1 by scalar in2 and stores the results in out1. out1[i]= in1[i]*in2[0] for: i= 0 to size1-1 parameters: in1, in2, out1, size1, in_strd1, out_strd vsq Vector Square This function squares each element of vector in1 and stores the results in out1. out1[i]= in1[i]*in1[i] for: i= 0 to size1-1 parameters: in1, out1, size1, in_strd1, out_strd vsqrt/vsqrtd Vector Square Root This function computes the square root of each element of vector in1 and stores the results in out1. out1[i]= SQRT(in1[i]) for: i= 0 to size1-1 parameters: in1, out1, size1, in_strd1, out_strd vssq Vector Signed Square This function multiplies each element of vector in1 by the absolute value of the element and stores the results in out1. out1[i]= in1[i]*ABS(in1[i]) for: i= 0 to size1-1 parameters: in1, out1, size1, in_strd1, out_strd vsub/vsubd Vector Subtract This function subtracts the elements of one vector in2 from the corresponding elements of a second vector in1 and stores the results in out1. out1[i]= in1[i]-in2[i] for: i= 0 to size1-1 parameters: in1, in2, out1, size1, in_strd1, in_strd2, out_strd vsum Vector Sum This function performs a running sum on the elements of input vector in1 and stores the results in output vector out1 for size size1 real elements. out1[j]= SUM(in1[i]) for: i= 0, j j= 0 to size1-1 in1= APbuf1 out1= APbuf2 December 1996 Version 6.2 10–32 Previous Page Next Page Go To Quit Digital Signal Processing DSP Algorithms parameters: in1, out1, size1, in_strd1, out_strd 10.9.3 Complex Vector Algorithms cdotpr Complex Dot Product This function computes the dot product of two complex vectors, in1 and in2, and stores the results in complex scalar out1. REAL{out1[0]}= SUM{REAL{in1[i]}*REAL{in2[i]}- IMAG{in1[i]}*IMAG{in2[i]}} IMAG{out1[0]}= SUM{REAL{in1[i]}*IMAG{in2[i]}+ IMAG{in1[i]}*REAL{in2[i]}} for: i= 0 to size1-1 parameters: in1, in2, out1, size1, in_strd1, in_strd2 cvadd Complex Vector Add This function adds the elements of two complex vectors in1 and in2 and stores the result in complex vector out1. REAL{out1[i]}= REAL{in1[i]}+REAL{in2[i]} IMAG{out1[i]}= IMAG{in1[i]}+IMAG{in2[i]} for: i= 0 to size1-1 parameters: in1, in2, out1, size1, in_strd1, in_strd2, out_strd cvcomb Complex Vector Combine This function combines the elements of real vectors in1 and in2 to form a com- plex vector out1. Real parts are stored in in1. Imaginary parts are stored in in2. REAL{out1[i]}= in1[i] IMAG{out1[i]}= in2[i] for: i= 0 to size1-1 parameters: in1, in2, out1, size1, in_strd1, in_strd2, out_strd cvconj Complex Vector Conjugate This function conjugates the elements of complex vector in1 and stores the conjugated results in complex vector out1. REAL{out1[i]}= REAL{in1[i]} IMAG{out1[i]}= -IMAG{in1[i]} for: i= 0 to size1-1 parameters: in1, out1, size1, in_strd1, out_strd cvexp Complex Vector Exponential This function computes the complex exponential of a vector in1 and stores the results in complex vector out1. REAL{out1[i]}= cos(in1[i]) IMAG{out1[i]}= sin(in1[i]) for: i= 0 to size1-1 December 1996 Version 6.2 10–33 Previous Page Next Page Go To Quit Digital Signal Processing DSP Algorithms parameters: in1, out1, size1, in_strd1, out_strd cvmags/cvmagsd Complex Vector Magnitude Squared This function computes the sum of the squares of the real and imaginary parts of each element of complex vector in1 and stores the results in real vector out1. out1[i]= (REAL{in1[i]}**2)+(IMAG{in1[i]}**2) for: i= 0 to size1-1 parameters: in1, out1, size1, in_strd1, out_strd cvmov Complex Vector Move This function moves (copies) the elements of complex vector in1 to complex vector out1. REAL{out1[i]}= REAL{in1[i]} IMAG{out1[i]}= IMAG{in1[i]} for: i= 0 to size1-1 parameters: in1, out1, size1, in_strd1, out_strd cvmul Complex Vector Multiply This function multiplies the elements of complex vectors in1 and in2 and stores the results in out1. The two complex vectors are either multiplied nor- mally, or in2 is multiplied by the conjugate of in1 depending on the value of option_flag. if option_flag= 1 REAL{out1[i]}= REAL{in1[i]}*REAL{in2[i]}- IMAG{in1[i]}*IMAG{in2[i]} IMAG{out1[i]}= REAL{in1[i]}*IMAG{in2[i]}+ IMAG{in1[i]}*REAL{in2[i]} if option_flag= -1 REAL{out1[i]}= REAL{in1[i]}*REAL{in2[i]}+ IMAG{in1[i]}*IMAG{in2[i]} IMAG{out1[i]}= REAL{in1[i]}*IMAG{in2[i]}- IMAG{in1[i]}*REAL{in2[i]} for: i= 0 to size1-1 parameters: in1, in2, out1, size1, option_flag, in_strd1, in_strd2, out_strd cvneg Complex Vector Negate This function negates the elements of complex vector in1 and stores the results in vector out1. REAL{out1[i]}= -REAL{in1[i]} IMAG{out1[i]}= -IMAG{in1[i]} for: i= 0 to size1-1 parameters: in1, out1, size1, in_strd1, out_strd December 1996 Version 6.2 10–34 Previous Page Next Page Go To Quit Digital Signal Processing DSP Algorithms cvrcip Complex Vector Reciprocal This function computes the reciprocal of the elements of complex vector in1 and stores the results in out1. REAL{out1[i]}= REAL{in1[i]}/(REAL{in1[i]}**2+ IMAG{in1[i]}**2) IMAG{out1[i]}= -IMAG{in1[i]}/(REAL{in1[i]}**2+ IMAG{in1[i]}**2) for: i= 0 to size1-1 parameters: in1, out1, size1, in_strd1, out_strd cvsub Complex Vector Subtract This function subtracts two complex vectors in1 and in2 and stores the results in out1. REAL{out1[i]}= REAL{in1[i]}-REAL{in2[i]} IMAG{out1[i]}= IMAG{in1[i]}-IMAG{in2[i]} for: i= 0 to size1-1 parameters: in1, in2, out1, size1, in_strd1, in_strd2, out_strd 2 10.9.4 Spectral Analysis Algorithms cfft/cfftd In-Place Complex FFT This function performs either a forward or inverse complex FFT on the data depending on the value of option_flag. forward FFT, if option_flag= 1 inverse FFT, if option_flag= -1 minimum size1 is 4 parameters: in1, size1, option_flag cfftb Not-In-Place Complex FFT This function performs the same operation as cfft (above) but the results of in1 data are destroyed. This algorithm operates faster than the cfft. forward FFT, if option_flag= 1 inverse FFT, if option_flag= -1 minimum size1 is 32 maximum size1 is 8192 parameters: in1, out1, size1, option_flag fftwts/fftwtsd Replace Standard FFT & Windowing Weighting This function replaces the standard FFT weight table—used by the array pro- cessor for windowing and all FFT algorithms (hann, hamm, rfft, rfftb, cfft, and cfftb) with a new FFT weight table that you create. Parameters: 2. See “Test Technique Note MS2: Spectrum Analysis Using the Chirp-Z Transform”. December 1996 Version 6.2 10–35 Previous Page Next Page Go To Quit Digital Signal Processing DSP Algorithms size1= The largest number of input elements of any FFT or windowing algorithm used by the test program. Notes: • The table size should be large enough to handle the largest buffer (in ele- ments) the test program uses in any of these algorithms. • Do not execute this algorithm if FFTs and windowing algorithms are less than 8192 elements. (The default table is 8 k elements.) • When executing under the simulator, this routine does error checking only. rfft/rfftd In-Place Real-to-Complex FFT This function performs either a real-to-complex forward or complex-to-real inverse FFT on the data depending on the value of option_flag. forward FFT, if option_flag= 1 inverse FFT, if option_flag= -1 minimum size1 is 8 parameters: in1, size1, option_flag rfftb Not-in-Place Real-to-Complex FFT This function performs the same operation as the rfft (above) but the in1 data is destroyed. This algorithm executes faster than the rfft. forward FFT, if option_flag= 1 minimum size1 is 64 maximum size1 is 16384 inverse FFT, if option_flag= -1 minimum size1 is 32 maximum size1 is 8192 parameters: in1, out1, size1, option_flag rfft400b Not-in-Place Real-to-Complex FFT This function performs the same operation as the rfft (above) but the in1 data is destroyed. This algorithm executes only on 400 point FFT’s. parameters: in1, out1, size1, option_flag rfft800b Not-in-Place Real-to-Complex FFT This function performs the same operation as the rfft (above) but the in1 data is destroyed. This algorithm executes only on 800 point FFT’s. parameters: in1, out1, size1, option_flag rfftsc/rfftscd Real FFT Scale and Format This function scales the results of a real-to-complex forward FFT and converts a complex vector between the special packed rfft format and the normal com- plex vector format. This algorithm may be used either after a forward-to-real complex FFT or before an inverse complex-to-real FFT to scale results and for- mat the complex numbers. size2= int formatting ﬂag 2 to unpack into size1 complex elements December 1996 Version 6.2 10–36 Previous Page Next Page Go To Quit Digital Signal Processing DSP Algorithms 3 to unpack into size1+1 complex elements -2 for size1 packed complex elements -3 for size1+1 packed complex elements size3= int scaling ﬂag 0 for no scaling 1 to multiply results by 1/(2*size1) -1 to multiply results by 1/(4*size1) parameters: in1, size1, size2, size3 10.9.5 Matrix Operations rmmul Real Matrix Multiply This function multiples the elements of real matrices in1 and in2 and stores the result in out1. out1= in1*in2 size1= in1 & out1 # of rows size2= in2 & out1 # of columns size3= in1 # of columns & in2 # of rows parameters: in1, in2, out2, size1, size2, size3 rmtran Real Matrix Transpose This function transposes the elements of real matrix in1 and stores the results in out1. out1[j][i]= in1[i][j] for: i= 0 to size1-1 j= 0 to size2-1 size1= in1 # of columns & out1 # of rows size2= in1 # of rows & out1 # of columns parameters: in1, out1, size1, size2, in_strd1, out_strd 3 10.9.6 Conversion Algorithms double_to_frac Double precision real to fractional 2’s complement conversion. This function converts a double precision real (ﬂoating point) number to a binary number (fractional 2’s complement). The binary number is left justiﬁed in the resulting integer. Parameters: in1= A buffer of double precision real numbers to convert. out1= An output buffer for binary results (type=integer). size1= The number of buffer elements to convert. in_strd1= Speciﬁes number by which to increment input buffer (in1) index for each iteration of this operation. 3. See also “Test Technique Note MS10: Using DSP Algorithms to Convert Digital Sig- nal Data to Floating Point Notation”. December 1996 Version 6.2 10–37 Previous Page Next Page Go To Quit Digital Signal Processing DSP Algorithms out_strd= Speciﬁes the number by which to increment the out- put buffer (out1) index for each iteration of this oper- ation. Algorithm: for (i=0, j=0; i<size1; i=i+in_strd1, j=j+out_strd) out1[j]=frac2(in1[i]); You must have double precision DSP enabled to use this algorithm. See “Dou- ble Precision DSP Capabilities” on page 10–1 and “Enabling/Disabling Double Precision DSP” on page 10–1 for more information. frac_to_double Fractional 2’s complement to double precision real conversion. This function converts a binary number (fractional twos complement) to a dou- ble precision real (ﬂoating point) number. The binary number must be left jus- tiﬁed as a 32 bit integer. Parameters: in1= A buffer of 32 bit integers. out1= An output buffer for ﬂoating point results (type d_real). size1= The number of buffer elements to convert. in_strd1= Speciﬁes number by which to increment input buffer (in1) index for each iteration of this operation. out_strd= Speciﬁes the number by which to increment the out- put buffer (out1) index for each iteration of this oper- ation. Algorithm: for (i=0, j=0; i<size1; i=i+in_strd1, j=j+out_strd) out1[j]=frac_to_double (in1[i]); You must have double precision DSP enabled to use this algorithm. See “Dou- ble Precision DSP Capabilities” on page 10–1 and “Enabling/Disabling Double Precision DSP” on page 10–1 for more information. frac_to_real Fractional 2’s complement to real conversion. This algorithm converts a binary number (fractional twos complement) to a real (ﬂoating point) number. The binary number must be left justiﬁed as a 32- bit integer. Parameters: in1= A buffer of 32-bit integers. out1= An output buffer for the ﬂoating-point results (type= real). size1= The number of buffer elements to convert. in_strd1= Speciﬁes the number to increment the input buffer (in1) index for each iteration of this operation. out_strd= Speciﬁes the number to increment the output buffer (out1) index for each iteration of this operation. Algorithm: December 1996 Version 6.2 10–38 Previous Page Next Page Go To Quit Digital Signal Processing DSP Algorithms for (i=0, j=0; i < size1; i=i+in_strd1, j=j+out_strd) out1[j]= frac_to_float(in1[i]) ; lookup General integer to user-deﬁned lookup table conversion. This algorithm is a general purpose, table-driven conversion routine. Data at the in1 buffer is converted and placed in the buffer at out1. Conversion is done using in1 data as an index into the in2 buffer (the lookup table). The contents of in2 are placed into the next element at out1. Parameters: in1= Integer buffer containing the data to be converted. in2= Real lookup table used to perform the conversion. out1= Buffer into which the converted data is placed. size1= Number of elements to convert. Algorithm: for (i=0; i < size1; i=i+1) out1[i] = in2[in1[i]] ; Notes: • Maximum lookup table size is 32768. Data in in1 must be 0 to 32767. Input data should be right justiﬁed to minimize the size of the lookup table required for conversion. Lookup tables larger than 16383 cause the conver- sion algorithm to execute about 35% slower than tables less than or equal to 16383. Input size is restricted to multiples of 4. If size1 is not a multiple of 4, the algorithm rounds up to the nearest multiple of 4. • The output buffer and the table are error checked to ensure that their data type is the same. The input buffer must be of type integer. offset_binary_to_real Offset binary format to ﬂoating-point format Parameters: in1= Input buffer containing data points in offset binary format. in2= Scale factor (real number). out1= Output buffer for the converted results. size1= Number of data points to convert. size2= Resolution of each data point (in bits). Algorithm: for (i=0; i < size1; i=i+1) out1[i] = real(in1[i]) × in2[0] ; polar Rectangular-to-Polar Conversion This function converts a buffer of rectangular coordinates (x,y) to polar coordi- nates (r,θ). Parameters: in1= A buffer of rectangular coordinates. out1= An output buffer for the polar coordinates. December 1996 Version 6.2 10–39 Previous Page Next Page Go To Quit Digital Signal Processing DSP Algorithms size1= The number of buffer elements to convert. in_strd1= Speciﬁes the number by which to increment the input buffer (in1) index for each iteration of this operation. out_strd= Speciﬁes the number by which to increment the out- put buffer (out1) index for each iteration of this operation. Algorithm: for (i=0, j=0; i < size1; i=i+in_strd1, j=j+out_strd) { r(out1[j]) = SQRT(x(in1[i]2) + y(in1[i]2)) ; θ(out1[j]) = atan2(y(in1[i]), x(in1[i])) ; } real_to_frac Real to fractional 2’s complement conversion This function converts a real (ﬂoating point) number to a binary number (frac- tional twos complement). The binary number is left justiﬁed in the resulting integer. Parameters: in1= A buffer of real numbers to convert. out1= An output buffer for binary results (type= integer). size1= The number of buffer elements to convert. in_strd1= Speciﬁes number by which to increment input buffer (in1) index for each iteration of this operation. out_strd= Speciﬁes the number by which to increment the out- put buffer (out1) index for each iteration of this operation. Algorithm: for (i=0, j=0; i < size1; i=i+in_strd1, j=j+out_strd) out1[j]= frac2(in1[i]) ; rect Polar-to-Rectangular Conversion This function converts a buffer of polar coordinates (r,θ) to rectangular coordi- nates (x,y). Parameters: in1= A buffer of polar coordinates. out1= An output buffer for the rectangular coordinates. size1= The number of buffer elements to convert. in_strd1= Speciﬁes the number by which to increment the input buffer (in1) index for each iteration of this operation. out_strd= Speciﬁes the number by which to increment the out- put buffer (out1) index for each iteration of this operation. Algorithm: December 1996 Version 6.2 10–40 Previous Page Next Page Go To Quit Digital Signal Processing DSP Algorithms for (i=0, j=0; i < size1; i=i+in_strd1, j=j+out_strd) { x(out1[j]) = r(in1[i]) × cos(θ(in1[i])) ; y(out1[j]) = r(in1[i]) × sin(θ(in1[i])) ; } vspdp Single precision ﬂoating point to double precision ﬂoating point conversion. This function converts a single precision real (ﬂoating point) number to a dou- ble precision real (ﬂoating point) number. Parameters: in1= A buffer of 4-byte ﬂoating point numbers (type=real) out1= An output buffer for double precision results (type=d_real). size1= The number of buffer elements to convert. in_strd1= Speciﬁes the number by which to increment input buffer (in1) index for each iteration of this opera- tion. out_strd= Speciﬁes the number by which to increment the out- put buffer (out1) index for each iteration of this operation. Algorithm: for (i=0, j=0; i<size1; i=i+in_strd1, j=j+out_strd) out1[j]=(double) (in[i]); You must have double precision DSP enabled to use this algorithm. See “Dou- ble Precision DSP Capabilities” on page 10–1 and “Enabling/Disabling Double Precision DSP” on page 10–1 for more information. vdpsp Double precision ﬂoating point to single precision ﬂoating point conversion. This function converts a double precision real (ﬂoating point) number to a sin- gle precision real (ﬂoating point) number. Parameters: in1= A buffer of 8 byte ﬂoating point numbers (type=d _real). out1= An output buffer for single precision results (type=real). size1= The number of buffer elements to convert. in_strd1= Speciﬁes the number by which to increment input buffer (in1) index for each iteration of this opera- tion. out_strd= Speciﬁes the number by which to increment the out- put buffer (out1) index for each iteration of this operation. Algorithm: for (i=0, j=0; i<size1; i=i+in_strd1, j=j+out_strd) out1[j]=(float) (in1[i]); December 1996 Version 6.2 10–41 Previous Page Next Page Go To Quit Digital Signal Processing Debug Display You must have double precision DSP enabled to use this algorithm. See “Dou- ble Precision DSP Capabilities” on page 10–1 and “Enabling/Disabling Double Precision DSP” on page 10–1 for more information. vﬁx/vﬁxd Vector Fix to Integer This function changes the elements of vector in1 from real to integer data, and stores the results in out1. Fractional parts of the real values are truncated. out1[i]= (int)in1[i] for: i= 0 to size1-1 parameters: in1, out1, size1, in_strd1, out_strd vﬂoat/vﬂoatd Vector Float This function converts the elements of vector in1 from integer to real numbers and stores the results in vector out1. out1[i]= (float)in1[i] (vfloat) out1[i}= (double)in1[i] (vfloatd) for: i= 0 to size1-1 parameters: in1, out1, size1, in_strd1, out_strd vimag Extract Imaginaries of Complex Vector This function extracts the imaginary parts of complex vector in1 to form real vector out1. out1[i]= IMAG{in1[i]} for: i= 0 to size1-1 parameters: in1, out1, size1, in_strd1, out_strd vreal Extract Reals of Complex Vector This function extracts the real parts of complex vector in1 to form the real vec- tor out1. out1[i]= REAL{in1[i]} for: i= 0 to size1-1 parameters: in1, out1, size1, in_strd1, out_strd 10.10Debug Display The DSP Setup display is shown in ﬁgure 10–5. To invoke the setup display select DSP Buffer Management from the display button Instruments menu or type dspdisp in the command region. The display has two parts. The upper half contains the control buttons and detailed per buffer information. The lower half shows a detailed buffer report as well as general memory use information. The buffer memory information can be displayed in bytes or elements where 4 bytes equals 1 integer, 1 real, or 1/2 complex pair. The control buttons include: Refresh Rereads the hardware and updates all of the meter setup information in the display. Store Saves a snapshot in memory of the currently visible setup. The display has memory to store one setup. December 1996 Version 6.2 10–42 Previous Page Next Page Go To Quit Digital Signal Processing Debug Display Figure 10–5 Debug Display for the Digital Signal Processor Setup>Show Setup Displays the current settings for the other setup menu items. This information appears in the control panel below the panel buttons. Setup>Highlight>Off Turns off all highlighting in the display window. Setup>Highlight>All Interactive Parameters Highlights (in reverse video) all the interactive parameters in the display window. Setup>Highlight>Diffs from Stored State Highlights all the differences between the current state of the hardware and the stored state. Use the store button to produce the stored state. Setup>Select Data Type>Display Data in Bytes Displays the buffer data in bytes. Setup>Select Data Type>Display Data in Ints Displays the buffer data in integer format. Setup>Select Data Type>Display Data in Real Displays the buffer data in real format. Setup>Select Data Type>Display Data in Complex Displays the buffer data in complex format. Create>Standard Creates a new buffer in standard format. This is the same as using the set dsp create statement. Create>Equiv Creates a new equivalent buffer. This is the same as using the set dsp equiv statement. Note The buffer handle must exist in the test program prior to issuing the create statement. Reset>last Resets the last temporary buffer created. Reset>all Resets all outstanding temporary buffers. December 1996 Version 6.2 10–43 Previous Page Next Page Go To Quit Digital Signal Processing Debug Display Reset>perm Resets all permanent, temporary, and equivalent buffers. Remember, the perm type allows you to maintain data from one execution of the test pro- gram to the next. Quit Removes the debug display. ■ December 1996 Version 6.2 10–44