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					       Welcome to ELE22MIC
• Lecturer : Paul Main.
• Room BG 441

• Lab. Coordinator: Jim Royston.
• Room: PS2, 120
• Email:
• introduction to microprocessors,
  microprocessor architecture,
  microcomputers, assembly language
  programming, memory, parallel and serial
  I/O, computer design, timing, address
  decoding, interrupts, memory management,
  caches, virtual memory, mass storage
  devices, DMA, systems programming and
  other processors.
    Course Aims & Objectives
• Develop a working knowledge of digital
  logic and how those principles can be
  applied to implement a microprocessor
• Develop an understanding of
  microprocessors, micro-controllers,
  peripherals and interfacing.
Course Aims & Objectives (cont)
• Develop an ability to write 68HC11
  assembly language code to meet a design
• Learn how to design, build, program and
  debug a useful basic microcomputer
         Class requirements
• Two lectures per week (total of 26)

• One problem class per fortnight
  (total of 5 problem classes)

• Three hours practical work per fortnight
  (total of 5 sessions).
            Laboratory Sessions
•   One 3-Hour Laboratory Session per fortnight.
•   Labs commence next week.
•   WEDNESDAY:         2pm, Duration: 3Hours
•   THURSDAY:          2pm, Duration: 3Hours
•   Weeks 30, 32, 34, 36, 38, 41, 43
•   Location: Beth Gleeson, Room 310 (Dry Lab)
           Problem Class Times
•   TUESDAY:           12noon, Duration: 1 Hours
•   WEDNESDAY:         12noon, Duration: 1 Hours
•   Weeks 30, 32, 34, 36, 38, 41, 43
•   Location: HS1, ROOM 302
• Tuesday 9:00am to 10:00am   HS1 136
• Friday 9:00am to 10:00am    PW 101
• 26 Lectures.
           Consultation Times
• To be advised next lecture
•   2-hour Examination (70%),

•   Practical work (20%)

•   Assignments (10%).
            68HC11 Resources
•   Textbook
•   Library
•   internal web site
          Lectures Topics (1)
• Introduction, History & Perspective
• The CPU : What's inside ? Logic gates,
  oscillators, Binary logic, counters
• CPU operation: Instruction Pointer, Fetch-
  Execute cycle, jump
• MC68HC11 Instruction set : Registers,
  Load, store, transfer, exchange, Addressing
          Lectures Topics (2)
• The ALU : Arithmetic & Logical Instructions
  : Add, Subtract, Shift Left/Right
• The ALU : Arithmetic & Logical Instructions
  : Multiply & Divide
• The Condition Codes Register, Jumping,
  Conditional Branching, Subroutines
• More Assembly language programming -
  putting it together - top down/bottom up.
           Lectures Topics (3)
• Computer memories (hardware aspect)
• Computer memories (system application)
• Input/Output: parallel interface devices
• Programming techniques and applications
  Flow charts, Grey code
• Serial Input/Output serial interface devices
  UARTS, RS232, RS485
• Interrupts & interrupt handlers
         Lectures Topics (4)
• Simple computer networks
• Designing a MC68HC11 based computer:
  memory - address space considerations
• Designing a MC68HC11 based computer:
  timing considerations
• Direct memory access (DMA) and related
• Expanded memory design & caches
• 20 - Mass storage devices
           Lectures Topics (5)
• Mass storage devices
• The A/D converter and counter/timer
  subsystem on MC68HC11
• Timing diagrams & meeting timing
• Features of other micro-controllers (e.g.
  AVR, PIC, 80188), and more complex
• 25 & 26 - Revision
  A Short History of Computers
• The Abacus “Computing Tray” The first
  mechanical calculating machine. 28?
             Computing Tray
• Used by Babylonian priests to keep track of
  their vast storehouses of grain. Still in use
  today. Circa 3000BC.
• In Roman times the board was given grooves to
  facilitate moving the counters in the proper
• Circa 1300BC Wire & Bead Abacus replaced
  the Chinese calculating rods.
            Computing Tray
• A modern equivalent is an Accumulator: used
  to accumulate results of arithmetic sums.
• Uses binary numbers - reviewed next lecture
                John Napier
• 1612 John Napier uses the printed decimal
  point, devised logarithms and used numbered
  sticks (or Napiers Bones) for calculating.
         New Improved Abacus
• 1642AD: Blaise Pascal Invented the first
  mechanical calculator constructed of 10
  toothed gears, wheels & teeth called
• The same principle is still in use in
  automobile‟s odometer mechanism
• Same principle is the basis for all mechanical
        Joseph Marie Jacquard
• 1801: A linked
  sequence of punched
  cards programmed
  Jacquard‟s loom to
  produce intricate
  weaving patterns in
         By Royal Commission
• 1823: The royal Astronomical Society of Great
  Britain commissioned Charles Babbage to
  produce a programmable calculating machine.
  He was aided by Augusta Ada Byron, the
  countess of Lovelace. The machine was to
  produce navigational tables for the Royal Navy.
       Babage‟s Analytical Engine
1834 Babbage shifted his focus to
work on The Analytical Engine. The
mechanical computer stored 1000 20-
digit decimal numbers and a variable
program that could modify the
function of the machine to perform
various tasks.
            Babbage IO devices
• Input to his engine was through punched cards (similar
  to punched cards of the 1950s-80s).
• It is assumed that he obtained the idea from
  Frenchman, Joseph Jaquard, who used punched cards
  as input to a weaving machine that he invented in
               Dreams Faded
• After many years of work, Babage‟s dream
  faded when he realised that the machinists of
  the day were unable to create the parts needed
  to complete his work.
• The analytical engine required 50 000 precision
  machined parts to allow his engine to function
             Michael Faraday
• Son of a Blacksmith, had limited formal
  education but attended public lectures and
  became an avid reader
• 1813 Started working life at the London Royal
  Institution as a laboratory assistant
• 1821 demonstrated the electric motor effect.
• 1831 demonstrated EMF(current) induced by
  motion of magnet by a nearby conductor.
             Electric Motors
• Electric Motors became available.
• Motor driven adding machines based on
  mechanical calculators developed by Blaise
  Pascal became popular.
• Electrically driven mechanical calculators were
  common office equipment until 1970s.
• 1844 - Samuel Morse sent a telegraph from
  Washington to Baltimore.
              George Boole
• Publishes “Laws of Thought”, describing a
  system for symbolic & logical reasoning
  which becomes the basis for computer design.
• 1858 A telegraph cable spans the Atlantic
  Ocean & provides service for a few days.
• 1876 Alexander Graham Bell invents, and
  patents, the telephone.
   Herman Hollerith‟s Tabulator
• In 1889, Herman Hollerith developed punched
  cards for storing data.
• Like babbage he also borrowed the idea of a
  punched card from Joseph Jaquard.
• Hollerith developed a machine that counted,
  sorted and collated information stored on
  punched cards.
• 1895, Guglielmo Marconi transmits a radio
    Tabulating Machine Company
• Hollerith was commissioned by US
  Government to store and tabulate the 1890
  census data.
• 1896: Hollerith formed a company called the
  Tabulating Machine Company.
• Produced a line of punched card based
  tabulating machines.
• After a number of mergers, the Tabulating
  Machine Company was formed into the
  International Business Machines Corporation -
            Herman Hollerith
• The punched cards used in computer systems
  are often called Hollerith cards.
• The 12-Bit code used on a punched card is
  called the Hollerith Code.
• Mechanical machines continued to dominate the
  Information Processing world until the 1941.
• In 1941 Conrad Zuse, a
  German Inventor, created a
  electro-mechanical calculating
  computer. Used for aircraft &
  missile design during World
  War II for the German war
• The Z3 used a 5.33Hertz
  clocking frequency.
• Great Britain‟s survival depended on imports of
  fuel, food, weapons & industrial raw materials.
• Germany‟s Gossadmiral Doenitz‟s planned to
  sink the merchant ships that were bringing
  supplies to Brittain by using a powerful
  submarine fleet.
• Doenitz calculated that sinking 800 000 tons of
  merchant ships per month would bring Britain
  to starvation and a request for peace would
• 1941 German Commands to the submarine fleet
  were initially encrypted with a three rotor
  Enigma before being transmitted by radio to
  submarine commanders.
• Capturing a 1940 Kurzchussel cipher from the
  weather ship, Muenchen, enabled British code
  breakers at Bletchey to decrypt the messages
  with the aid of a crude “Bombe” computer.
• Feb 1 1942 Germans began encrypted
  communication with a four rotor Enigma.
  British cryptanalysts were unable to decrypt
  these new messages.
          The Cost of Failure..
• 1942 Jan-July 460 ships, 203000tons, sunk.
• Jan 1943: 29 ships per month
• by March 1943: the rate had increased to 95
  ships per month totalling 627000tons
• Twice the rate of new-ship construction.
• Greek for „puzzle‟.
• For example the letters „e‟ input might be
  connected to the first rotor‟s „q‟ output. So an
  arriving „e‟ pulse in the first rotor goes as „q‟ to
  the second rotor where it might depart as „g‟ to
  the third rotor.
• When a key is pressed, the right hand motor
  advances one notch, changing the encryption
              Enigma Coding
• After 26 advances, the next rotor is advanced,
• Also a plug board had 26 sockets with up to 10
  holes interlinked by the operator‟s choice of
• Enigma also had extra rotors with different
  internal connections.
            Capturing Enigma
• Oct 30, 1942: a 25-pound four-rotor Enigma
  machine, with short signal book, was recovered
  from a sinking German submarine, U559, by
  two sailors who swam into the submarine from
  the destroyer Petard.
• The two sailors lost their lives as the submarine
  plunged to the bottom of the sea..
       First Electronic Computer
• June 1943: Alan Turing, Tommy Flowers &
  MHA Newman made operational the first
  electronic computer, Colossus
• Colossus was utilised to break the cipher codes
  generated by the mechanical Enigma Machine;
  German military communication was
• British cm wavelength radar assisted to provide
  military superiority.
• German submarine attacks ceased being a threat
  for the remainder of WWII.
• 1945: The University of Pennsylvania created
  ENIAC, the Electronics Numerical Integrator
  And Calculator
• ENIAC was a 30 ton machine containing 17
  000 vacuum tubes and 500 miles of wires.
• ENIAC was re-programmed by rewiring, a
  process that took many workers several days.
• ENIAC was programmed by electrical
  connections on plug-boards that looked like
  early telephone switchboards.
• ENIAC processed 100 000 Instructions Per
• ENIAC suffered reliability problems due to
  limited vacuum tube life.
• 1939 William Shockley observed P- and N- type
  regions in Silicon. Shockley forecast that a
  semiconductor amplifier was possible.
• WWII interrupted further work.
• 1945: John von Neumann described the general-
  purpose, stored program computer.
• 1948: The invention of the Germanium bipolar
  junction transistor at Bell Labs, by William
  Shockley, John Bardeen & Walter Brittain
• TI commercialised the Transistor.
• In 1958 Jack Kilby realised that - Resistors
  formed by cutting small bars of silicon,
  Capacitors formed by wafers metalised on both
  sides, and silicon transistors could all be made
  on the same material.
• In september 1958 he created a phase-shift
  oscillator - the first IC on one wafer.
     Digital PDP8 mini-computer
• 1964: The first mass produced mini-computer
  was produced by Digital Equipment
               Fair children
• Bob Noyce & Gordon Moore, founders of
  Fairchild Semiconductor, became disgruntled and
  left Fairchild Semiconductor to start N M
• Bob Noyce wrote a 1 page business plan on his
  typewriter one night.
• Noyce went to see Fairchild‟s Venture Capitalist
  Art Rock. He requested $2.5M as venture
  capital... which he received 2 Days Later!
             N M Electronics
• N M Electronics became Intel.
• Intel‟s first product was the „3101‟, a 64 Bit
  Schottky Barrier static RAM.
• Busicom, a Japanese calculator manufacturer,
  wanted Intel to develop 12 custom chips for
  their calculators.
• Ted Hoff recommended one chip to function as
  12. Busicom agreed & contracted Intel.
                  Intel 4004
• Intel went ahead with a general purpose logic
  chip capable of being programmed for
• First use of „Intelligence‟ programmed by
  software. Bought the design back from
• After 9 months development Intel‟s first
  microprocessor is born, the 4004.
November 1971
10 Micron technology
2300 Transistors
108 KKz Clock
60 000 Instructions/second
Bus width 4 bits
640 bytes addressable
12 Volt. Weighed < 1 Oz.
P-channel MOSFET
April 1972
10 Micron technology
3500 Transistors
200 KKz Clock
0.06 Million Instructions Per
Second (MIPS)
Bus width 8 bits
12 Volt
Address: 16 Kbytes
Apps: Terminals, Calculators,
Bottling Machines
April 1974
6 Micron Technology
4 500 transistors
2 MHz Clock
0.64 MIPS
Bus width: 8 bits
12 Volt
Addressable memory: 64 Kbytes
Apps: Traffic light controller,
Altair computer (first PC)
Performance = 10 x 8008
• March 1976
  Clock speed: 5 MHz
  0.37 MIPS
  Number of transistors: 6,500 (3 microns)
  8 bit data bus, 16 bit address bus.
  Typical use: Toledo scale. From measured
  weight and price the scale computed cost.
  Single 5 volt power supply
                      8086 (8088)
June 1978/1979
3 Micron Technology
5, 8 &10 MHz clock
0.33, 0.66 & 0.75 MIPS
29 000 Transistors
16/8 bit data bus
20 bit address bus (1MB)
5 Volt
apps: IBM PCs & Clones
performance = 10 x 8080
Segmented architecture, CISC
• 1981 The open-architecture IBM PC is launched
  based on the Intel 8086
• 1980 PCDOS sold to IBM
• 1980 Ada emerged
• 1980 dBaseII popular
• 1982 First Clone PC
• 1982 AutoCAD
• 1983 TCP/IP
             80186 (80188)
• 1982 Original NMOS 80186
• 1987 80C186 converted to CMOS - uses 1/4
  power at twice clock rate
• Used in Controllers
• Still popular
• Segmented architecture
• Software Backward Compatible with 8086
February 1982
6 MHz -12 MHz clock
0.9 - 2.66 MIPS
1.5 micron technology
134 000 Transistors
16 bit data bus
16MB Physical, 1GB Virtual
Performance =3 to 6 x 8086
Software Backward
Compatible with 8086
Also V.20, AMD Cyrix etc
October 17, 1985
16 MHz - 33MHz
5 to 11 MIPS
1 Micron technology
275 000 Transistors
Data Bus width: 32 bits
Addressable memory: 4 gigabytes
Virtual memory: 64 terabytes
Software Compatible with 8086
32 bit “Flat Mode” available
April 1989 25 MHz, 20 MIPS
       June 1991 50 MHz, 41 MIPS
1.2 Million Transistors
1-0.8 Micron Technology
Bus width: 32 bits
Addressable memory: 4 GB
Virtual memory: 64 TB
50X performance of the 8086.
Software Compatible with 8086
486DX first CPU to include floating
point maths co-processor.
   80486DX2 & DX4 - Overdrive
2 or 3 times overclocked cpu core,
with standard memory transfer rate.
Plugged directly into a 486SX or
486DX socket and acted as a double or
triple-clocked CPU.
Eg a 33MHz cpu replaced with an DX4
processor would use a memory transfer
rate of 33MHz, and an internal clock
rate of 99MHz.
March 1993
60 MHz 100 MIPS
66 MHz 112 MIPS
3.1 million transistors
0.8 Micron technology
64 bit external data bus 32-bit
32 bit address bus
4 GB physical
64 TB virtual
Software Compatible with 8086.
                          Pentium Pro
November 1995
150-200 MHz
5.5 million transistors
0.35 micron technology
64 bits front side bus
64 bits to L2 cache
Addressable memory: 64
Virtual memory: 64 terabytes
256K - 1MB L2 Cache
Software Compatible with 8086
    Intel® Pentium® 4 Processor
June 25, 2002
1.3GHz to 2.40 GHz
55 Million Transistors
Bus speed: 400 and 533 MHz System Bus
Mfg. Process: 0.13 Micron
Cache: 512KB on-die L2 cache
Packaging: FC-PGA2 478
Streaming SIMD Extensions 2 (SSE2)
Typical Use: High End Desktop PCs, Applied computing,
communications, interactive client and industrial automation
Core Voltage: 1.3 volts , Power : <2 watts in Battery Optimized Mode
Still Software Compatible with 8086
     Intel® Itanium® 2 Processor
July 2002
1 GHz and 900 MHz)
0.18 Micron Technology
Cache: 3 MB, 1.5 MB L3 cache
Typical Use: Demanding enterprise-class
servers, workstations and high-
performance computing applications
50 bit Address Bus, 128 bit-wide data bus.
New Parallel Architecture. EPIC
128 general & 128 Floating Point registers
Compatible with intel IA-32 assembler.
1991: 22 peripherals on one chip including:
Power-save clock divider,
PowerDown Idle,
80C187 interface,
8259 compatible Interrupt Controller,
Timer-counter unit,
enhanced chip select unit,
4 channel DMA unit,
Serial Communications unit,
DRAM Refresh Control Unit,
Watchdog Timer Unit.
            Motorola 68HC11
Primarily used in applications performing a single task or
single group of tasks, controlling:
       Microwave Ovens

In 1991, > 750 million 8-bit microcontrollers were
delivered by chip manufacturers
                Logic Levels
Logic High, 1, or True
        TTL family level > 2 Volts (greater than 2V)
        CMOS , > 2/3 VCC (> 3.33V for VCC=5V)
Logic Low, 0, or False
        TTL level < 0.8 Volts (less than 0.8V)
        CMOS, < 1/3 VCC (< 1.66V for VCC=5V)
TTL logic level compatible families include: 74xx (plain
ttl), F (fast), S (Schottky), LS (Low Power Schottky),
HCT (High speed CMOS Ttl compatible), ABT
(Advanced Bipolar Ttl compatible)
CMOS Compatible: 4000 series, 74C (CMOS) 74HC
(High Speed CMOS),
MC 68HC x 11 yy Part Numbering
MC = Motorola Qualified, XC - Tested Pre Production, M= General Family Reference
68HC = Motorola HCMOS (High density Complementary Metal-Oxide Semiconductor)
x =7=EPROM program memory
x =8=EEPROM program memory
none = ROM or NO program memory
11=HC11 family
yy = specific part type A8, A2, A1, A0, E9, E2, E1, E0,
D3, F1, etc
         M68HC11 family members
Ten major series of micro-controller units;

All M68HC11 Family members have on-chip SCI and SPI, and
most have EEPROM and an A/D converter.

A8:     8-bit MCU
        8 Kbytes ROM,
        256 bytes of RAM,
        512 bytes of EEPROM,
        bus speed of 3 MHz.
        8-bits, 8-channel A/D (Analog to Digital) converter.
A1 = A8 with the 8K ROM disabled
       M68HC11 family members
C0: chip selects and memory expansion to 256 Kbytes,
      2PWM channels
      4 A/D channels.

D3:   4 Kbytes ROMof RAM, A/D converter, SPI, SCI and

E:   EEPROM and EPROM on a single chip.
     The E-series offers multiple memory sizes in a pin-
compatible package.
       M68HC11 family members
F1     High-speed expanded systems required the
development of             the 68HC11F1. This particular chip
series stands out with its extra I/O ports, an increase in static
RAM (1 Kbyte), chip-               selects, and a 4 MHz non-
multiplexed bus. (Fast)

G5     10-bit A/D resolution.
       sophisticated timer systems

K4     high speed, large memories, an MMU, PWMs, I/O.
KA     lower pin count Kseries
       M68HC11 family members
L6    Low-power, high-speed chip with a multiplexed bus
capable of operation up to 3 MHz. The L6’s high performance
design is based on the 68HC11E9. It includes 16 Kbytes of
ROM, plus an additional bi-directional port. Its fully static
design allows operation at frequencies down to dc.

M series: enhanced, high-performance microcontrollers are
derived from the 68HC11K4 and include large Memory
modules, a 16-bit math coprocessor, and 4 channels of DMA.

P2    Power saving programmable PLL-based clock circuit
along with many I/O pins, large memory and 3 SCI ports

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