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Description
Project Team Member Contact List Template document sample
Document Sample
Step 1 : Submit Project Information
Visit : http://www.arl.wustl.edu/~lockwood/class/cs536/project/index.html
– Provide Project Title
• What do you plan to design and implement?
– Identify Project Team
• Team Leader
– Specialty
– Email contact
• Team Member
– Specialty ..
• Team Member
– Specialty .. (2-4 people should be on a team)
CS/CoE 536 : Lockwood 1
Step 1 (cont) : Provide Project Information
– Provide Project Description
• Provide 2-3 paragraphs of detail
– What will it do ?
– How will it do it ?
– Where will it connect to the rest of the System on Chip ?
– Identify Project Website
• Provide the URL to a homepage hosted by the
project leader
CS/CoE 536 : Lockwood 2
Step 2 : Motivate the Problem
– What is this problem interesting ?
– How will this component improve the Internet ?
CS/CoE 536 : Lockwood 3
Step 3: Reference Related Work
– What have others done ?
• References
– How did the do it ?
– Why is this problem hard
CS/CoE 536 : Lockwood 4
Step 4 : Describe your approach
– How do you plan to solve this problem
• Theory
• Data structures
• Diagrams
CS/CoE 536 : Lockwood 5
Step 5: Specify Interfaces and Components
• Data Interfaces
– Entity of new component
• External Memory Interfaces
– Number of SRAM interfaces (0..2)
– Number of SDRAM interfaces (0..3)
• Estimated Size
– Number of LUTs
– Number of BlockRAMs
CS/CoE 536 : Lockwood 6
Step 6: Provide a Block Diagram
• Show how your component will integrated into
the System On Chip (SOC)
– Show which interfaces your block will use
– Show how your component interfaces to external
SRAM or SDRAM memory (if applicable)
– Examples give on the next page
CS/CoE 536 : Lockwood 7
Block Diagram of SOC (Example 1)
Off-Chip Off-Chip Off-Chip Off-Chip
SRAM 2 SDRAM 2 SDRAM 1 SRAM 1
SRAM SDRAM 2 SDRAM 1 SRAM 1
Controller Controller Controller Controller
# SRAM (0..2) # SDRAM (0..3)
Show how your new
SDRAM Free
component connects List Manager
to the rest of the SDRAM
system on chip Free pointers
Content- Flow
p p Buffer p
based My Expanded
Match New CAM-based Head Tail
(regex) p p Pointers Pointers
Component Firewall
(MP1) Queue
(MP2) Manager Scheduler
(RR, DRR, 3DQ)
(MP 3)
Match Flow#
vector from CAM
Layered Protocol Wrappers
= Available Interface = New Component = New Connectivity
CS/CoE 536 : Lockwood 8
Block Diagram of SOC (Example 2)
Off-Chip Off-Chip Off-Chip Off-Chip
SRAM 2 SDRAM 2 SDRAM 1 SRAM 1
SRAM SDRAM 2 SDRAM 1 SRAM 1
Controller Controller Controller Controller
# SRAM (0..2) # SDRAM (0..3)
Show how your new SDRAM Free
component connects to the List Manager
rest of the system on chip SDRAM
Free pointers
Content- Flow
My p
p Buffer p
New based Expanded
Component Match CAM-based Head Tail
p (regex) p Pointers Pointers
Firewall
(MP1) Queue
(MP2) Manager Scheduler
(RR, DRR, 3DQ)
(MP 3)
Match Flow#
vector from CAM
Layered Protocol Wrappers
= Available Interface = New Component = New Connectivity
CS/CoE 536 : Lockwood 9
Block Diagram of SOC (Example 3)
Off-Chip Off-Chip Off-Chip Off-Chip
SDRAM 2 SDRAM 1 SRAM 1 SRAM 2
SDRAM 2 SDRAM 1 SRAM 1 SRAM
Controller Controller Controller Controller
# SDRAM (0..3) # SRAM
SDRAM Free
List Manager
SDRAM
Free pointers
Content- Flow
p p Buffer p p
based Expanded
Match Head Tail My
CAM-based New
(regex) p Pointers Pointers
Firewall Component
(MP1) Queue
(MP2) Manager Scheduler
(RR, DRR, 3DQ)
(MP 3)
Match Flow#
vector from CAM
Layered Protocol Wrappers
= Available Interface = New Component = New Connectivity
CS/CoE 536 : Lockwood 10
Implementation Plan
• Describe the Major Tasks
– Describe the Minor Tasks
CS/CoE 536 : Lockwood 11
