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VIEWS: 11 PAGES: 61

									    assembly
    language
    source
    code                                             assembler




                                  "machine code"


1
    These slides may be freely used, distributed, and incorporated into other works.
    To execute a program:
    1 put the "machine code" into memory
    2 jal __start (the OS does this)



                                                                         memory




        "machine code"



2
         These slides may be freely used, distributed, and incorporated into other works.
                               assembler's task

    1.   assign addresses
    2.   generate "machine code
    3.   (architecture dependent)
         further translation of assembly language
         source code




3
           These slides may be freely used, distributed, and incorporated into other works.
    previous architectures

    1 assembly                                        1 machine
    language                                          code
    instruction                                       instruction


     MIPS architecture

    1 assembly                                         1 or more
    language                                           machine code
    instruction                                        instructions



4
       These slides may be freely used, distributed, and incorporated into other works.
    This further translation is also called
     synthesis.



    MIPS example of synthesis:

    add       $8, $9, -16
     becomes
    addi $8, $9, -16


5
          These slides may be freely used, distributed, and incorporated into other works.
    Two operands in the source code

       add             $8, $9

    are expanded back out to become

       add             $8, $8, $9




6
         These slides may be freely used, distributed, and incorporated into other works.
    integer multiplication and division each
      produce 2 32-bit results

    integer division produces
         quotient
         remainder


    integer multiplication of 2 32-bit operands
      produces a 64-bit result



7
            These slides may be freely used, distributed, and incorporated into other works.
    MIPS hardware implements 2 extra registers
     (called HI and LO) to hold these results.

    Here are 4 more MIPS instructions:
    mflo R
    mtlo R
    mfhi R
    mthi R

       m move                                 lo register LO
       f from
                                              hi register HI
       t to
8
         These slides may be freely used, distributed, and incorporated into other works.
                                 multiplication

      mult            $8, $9, $10
    becomes
       mult           $9, $10
       mflo           $8


                            X




                                HI                        LO

9
        These slides may be freely used, distributed, and incorporated into other works.
                                          division
        div            $8, $9, $10
     becomes
        div            $9, $10
        mflo           $8      # quotient in LO



        rem         $12, $13, $14
     becomes
        div $13, $14
        mfhi $12     # remainder in HI
10
         These slides may be freely used, distributed, and incorporated into other works.
     puts, putc, getc, and done are not TAL !

     I/O is accomplished by requesting service
       from the operating system (OS).

     All architectures do this with a single
      instruction.
     On MIPS, this instruction is
                       syscall
                                  (no operands)


11
           These slides may be freely used, distributed, and incorporated into other works.
     (note that this is specific to our simulator)
     To help the OS distinguish what service is
       required, $v0 ($2) is set:

                      $v0                              I/O operation

                        11                                      putc

                        12                                      getc

                         4                                      puts

                        10                                      done


12
           These slides may be freely used, distributed, and incorporated into other works.
     synthesis of
       puts     $8



        first pass                                    final synthesis
        li        $2, 4                               addi               $2, $0, 4
        move $4, $8                                   add                $4, $8, $0
        syscall                                       syscall



13
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        lw           $8, X
     becomes
        la              $8, X
        lw              $8, 0($8)




     Oops! la must be synthesized.



14
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     synthesis of
         la    $8, my_label

        requires the address assigned for
         my_label
        every address is assigned by the assembler


                       MS part                          LS part

                                 16                               16

                                                 32
15
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       la           $8, my_label
     becomes
        lui $8, 0xMS part
        ori $8, $8, 0xLS part




16
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     after lui       $8, 0xMS part

          $8        MS part               000 . . . 0



     this is then logically ORed with

                  000 . . . 0                  LS part


      due to the instruction ori $8, $8, 0xLS part

      resulting contents of $8:

          $8        MS part                    LS part

17
           These slides may be freely used, distributed, and incorporated into other works.
     Synthesize lw $8, X
     Assume X is assigned address 0xaaee0018.

     first try:
         la     $8, X
         lw     $8, 0($8)

     with synthesis of the la instruction:
         lui $8, 0xaaee
         ori $8, $8, 0x0018
         lw    $8, 0($8)
18
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     Synthesize sb $12, X
     Assume X is assigned address 0x080001a0.




19
          These slides may be freely used, distributed, and incorporated into other works.
     Generate machine code for
       addi $8, $20, 15
     From the TAL table:
     addi Rt, Rs, I
        Rt is $8
        Rs is $20
        I is 0000 0000 0000 1111
     0010 00ss ssst tttt ii .. ii
      op code                                              16 bits
        sssss is 10100 (for $20)
                                 value 15
        ttttt is 01000 (for $8)
     0010 0010 1000 1000 0000 0000 0000 1111
     in hex   0x2288000f
20
            These slides may be freely used, distributed, and incorporated into other works.
     Generate machine code for
       lw    $8, 12($sp)

     lw  Rt, I(Rb)
        Rt is $8
        Rb is $sp (which is $29)
        I is 12
     1000 11bb bbbt tttt ii .. ii
      op code                                              16
        bbbbb is 11101
                                value 12
        ttttt is 01000
     1000 1111 1010 1000 0000 0000 0000 1100
     in hex   0x8fa8000c
21
            These slides may be freely used, distributed, and incorporated into other works.
     assembly
     language                                     assembler
     source
     code                                     assign addresses

                                         produce machine code




                                   memory image


22
     These slides may be freely used, distributed, and incorporated into other works.
             Problem: forward references
     .text

        beq         $8, $11, later_in_code


     later_in_code:
        lw   $20, X


     .data
     X:   .word                 16
23
         These slides may be freely used, distributed, and incorporated into other works.
     Simple solution: 2-pass assembler
      first pass:
            (MIPS-only) MAL  TAL synthesis
            assign all addresses
        second pass:
            produce all machine code
     More complex and more efficient:
       1-pass assembler
      Keep a list of instructions that cannot be
       completed due to yet-to-be-assigned
       addresses. As addresses are assigned,
       check the list and complete instructions.

24
               These slides may be freely used, distributed, and incorporated into other works.
     assign all addresses
        (and remember them)

     implies the use of a table holding
     the mapping of addresses to labels

     called a symbol table




25
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        As the assembler works on the source
         code, it scans the characters in the file.
        Scanner (a SW module)
            breaks a set of characters into significant
             groups known as tokens
            often, tokens are separated by white space or
             special punctuation
             .data

             a1:         .word                3

             loop:             lw          $7, 4($6)

26
              These slides may be freely used, distributed, and incorporated into other works.
     .data
     a1: .word 3
     a2: .word 16:4
     a3: .word 5
     .text
     __start: la   $6, a2
     loop:    lw   $7, 4($6)
              mult $9, $10
              b    loop
              done

27
         These slides may be freely used, distributed, and incorporated into other works.
     2 segments: code and data
      The assembler places items into these 2
       segments. So, it needs addresses.
      Use starting addresses of

        data 0x0040 0000
        code 0x0080 0000
      The variable internal to the assembler that
       represents the next address to be
       assigned is the location counter.



28
          These slides may be freely used, distributed, and incorporated into other works.
     TAL equivalent of code:
     .text
     __start:
        lui $6, 0x0040       # la $6, a2
        ori $6, $6, 0x0004
     loop:
        lw    $7, 4($6)
        mult $9, $10
        beq $0, $0, loop # b       loop
        ori $2, $0, 10       # done
        syscall
29
         These slides may be freely used, distributed, and incorporated into other works.
     As a result of processing the entire .data
       section, the memory image will be
     address           contents
     0x0040 0000       0x0000 0003
     0x0040 0004       0x0000 0010
     0x0040 0008       0x0000 0010
     0x0040 000c       0x0000 0010
     0x0040 0010       0x0000 0010
     0x0040 0014       0x0000 0005


30
           These slides may be freely used, distributed, and incorporated into other works.
     Machine code for la $6, a2
     Synthesized:
       lui $6, 0x0040       (address from symbol table)
       ori $6, $6, 0x0004

     lui Rt, I
        Rt is $6
        0011 1100 000t tttt ii .. ii
        op code                                                   16
         ttttt is 00110
     0011 1100 0000 0110 0000 0000 0100 0000
     in hex   0x3c060040


31
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     Add to the memory image
     address         contents
     0x0080 0000     0x3c06 0040




32
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     Machine code for ori $6, $6, 0x0004



     ori Rt, Rs, I
        Rt is $6
        Rs is $6
        0011 11ss ssst tttt ii .. ii
          op code                                                 16
         ttttt is 00110
         sssss is 00110
     0011 1100 0000 0110 0000 0000 0100 0000
     in hex   0x34c60004

33
           These slides may be freely used, distributed, and incorporated into other works.
     Add it to the memory image as well, updating
       the location counter
     address           contents
     0x0080 0000       0x3c06 0040
     0x0080 0004       0x34c6 0004




34
           These slides may be freely used, distributed, and incorporated into other works.
     Scanning on, machine code for
       lw $7, 4($6)

     lb    Rt, I(Rb)
          Rt is $7
          Rb is $6
          I is 4
          1000 11bb bbbt tttt ii .. ii

          op code                                                 16

     1000 1100 1100 0111 0000 0000 0000 0100
     in hex  0x8cc70004

35
            These slides may be freely used, distributed, and incorporated into other works.
     Add it to the memory image as well, updating
       the location counter
     address           contents
     0x0080 0000       0x3c06 0040 (lui)
     0x0080 0004       0x34c6 0004 (ori)
     0x0080 0008       0x8cc7 0040 (lw)




36
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     next comes
       mult $9, $10
                        Rs            Rt
                     01001          01010

      op code                                         Rd

     0000 00ss ssst tttt 0000 0000 0001 1000

     0000 0001 0010 1010 0000 0000 0001 1000




     in hex            0x012a0018

37
              These slides may be freely used, distributed, and incorporated into other works.
     op code 000000 is used for
       any arithmetic or logical instruction with 3
       register operands



     0000 00ss ssst tttt dddd d??? ???? ????

                                                                         which
                                                                         operation




38
           These slides may be freely used, distributed, and incorporated into other works.
     Add mult to the memory image as well,
       updating the location counter
     address           contents
     0x0080 0000       0x3c06 0040 (lui)
     0x0080 0004       0x34c6 0004 (ori)
     0x0080 0008       0x8cc7 0040 (lw)
     0x0080 000c       0x012a 0018 (mult)




39
          These slides may be freely used, distributed, and incorporated into other works.
     b loop
     is a pseudoinstruction (must be synthesized)

     Many translations:
     beq $0, $0, loop
     bgez $0, loop
     blez $0, loop
     j     loop




40
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      beq           $0, $0, loop
                     Rs             Rt
                  00000          00000
      op code                                                       I


     0001 00ss ssst tttt iii ... ii



         I is a derivation of an offset.



41
           These slides may be freely used, distributed, and incorporated into other works.
     At run (execution) time,
     for a taken branch
            I (from instruction)
            I || 00 (concatenate)
            I || 00 (sign extend to 32 bits)


                     + PC  PC


42
           These slides may be freely used, distributed, and incorporated into other works.
     I computed by the assembler relies on

       byte                           target                          branch
                            =                                  -
       difference                     address                         address


     except, when the PC (the branch address!) is
       used (at execution time),
     the PC update step (of the fetch and
       execute cycle) has already been completed.
     So,
       byte                           target                          branch + 4
                            =                              -
       difference                     address                         address

43
           These slides may be freely used, distributed, and incorporated into other works.
     from the symbol table
       target is loop 0x0080 0008
       beq is at 0x0080 0010

      byte offset = 0x00800008 – ( 0x00800010 + 4 )

       0000 0000 1000 0000 0000 0000 0000 1000
     - 0000 0000 1000 0000 0000 0000 0001 1000

       (can't do this in unsigned, so convert to 2's complement)


       1111 1111 0111 1111 1111 1111 1110 1100
                                                     additive inverse of
44
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       0000 0000 1000 0000 0000 0000 0000 1000
     + 1111 1111 0111 1111 1111 1111 1110 1100
       1111 1111 1111 1111 1111 1111 1111 0100


           this represents -12


        -12 is the byte offset to be added
        to the PC to form the new (correct)
        target PC




45
           These slides may be freely used, distributed, and incorporated into other works.
     Recall that
     At run (execution) time,
     for a taken branch
             I (from instruction)
             I || 00 (concatenate)

             I || 00 (sign extend to 32 bits)


                     + PC  PC
46
           These slides may be freely used, distributed, and incorporated into other works.
     instructions are all 32 bits
       = 4 bytes
     addresses of all instructions
       xx ... xx00
       for example, 0, 4, 8, 12, 16 ...

     So, remove the zeros at assembly time
      and put them back in at execution time.

     18 bits of offset
       for 16 bits of instruction space

47
           These slides may be freely used, distributed, and incorporated into other works.
     back to the beq instruction:
     -12 is
       1111 1111 1111 1111 1111 0100
                                                                                 eliminated

       1111 1111 1111 1111 1111 01
                                                       16 bit I field of instruction

     0001 00ss ssst tttt ii ... ii
            00 000 0 0000 1111 1111 1111 1101


     in hex 0x1000 fffd

48
          These slides may be freely used, distributed, and incorporated into other works.
     If the I field is a 2's complement value,
       it is
     1111 1101  0000 0010 + 1 =
       0000 0011 (+3)
     So, -3 is represented.

     The TAL code
     loop: lw
            mult
            beq                                                      -3 instructions
            next instr

49
           These slides may be freely used, distributed, and incorporated into other works.
     Add beq to the memory image,
       updating the location counter
     address           contents
     0x0080 0000       0x3c06 0040                                         (lui)
     0x0080 0004       0x34c6 0004                                         (ori)
     0x0080 0008       0x8cc7 0040                                         (lw)
     0x0080 000c       0x012a 0018                                         (mult)
     0x0080 0010       0x1000 fffd                                         (beq)




50
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     done is a pseudoinstruction

     in TAL,
         ori $2, $0, 10
         syscall




51
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      ori           $2, $0, 10
                     Rt            Rs           I
                  00010          00000

      op code                                                         16


     0011 01ss ssst tttt ii                                           ...            ii

     0011 0100 0000 0010 0000 0000 0000 1010




     in hex            0x3402000a
52
           These slides may be freely used, distributed, and incorporated into other works.
     Add ori to the memory image,
       updating the location counter
     address           contents
     0x0080 0000       0x3c06 0040                                         (lui)
     0x0080 0004       0x34c6 0004                                         (ori)
     0x0080 0008       0x8cc7 0040                                         (lw)
     0x0080 000c       0x012a 0018                                         (mult)
     0x0080 0010       0x1000 fffd                                         (beq)
     0x0080 0014       0x3402 000a                                         (ori)


53
          These slides may be freely used, distributed, and incorporated into other works.
     syscall is the easiest instruction of all
       (all bits are defined)

     0000 0000 0000 0000 0000 0000 0000 1100


     in hex        0x0000000c




54
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     The complete memory image (of the code)

     address                          contents
     0x0080     0000                  0x3c06 0040                          (lui)
     0x0080     0004                  0x34c6 0004                          (ori)
     0x0080     0008                  0x8cc7 0040                          (lw)
     0x0080     000c                  0x012a 0018                          (mult)
     0x0080     0010                  0x1000 fffd                          (beq)
     0x0080     0014                  0x3402 000a                          (ori)
     0x0080     0018                  0x0000 000c                          (syscall)

55
          These slides may be freely used, distributed, and incorporated into other works.
        j L1
        .
        .
        .
     L1: # more code here

     machine code for j
        0000 10               most of an address

        6 bits                            26 bits




56
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     target address calculation at run time
        0000 10               most of an address


                                               26 bits



         PC 31..28 || 26 bits || 00

                      32-bit target address


57
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                            memory




                        ●●●
                                              1
                                                  th of memory
                                             16



                        ●●●




                                    1
     addresses to that                  th of memory are all of the form
                                   16

           XXXX?? ● ● ● ??00
            fixed                  26 bits
58
            These slides may be freely used, distributed, and incorporated into other works.
                        1
     How big is        16
                             th of memory                 ?

     228 bytes or 226 words
     is 64 M words

     Is it big enough?




59
           These slides may be freely used, distributed, and incorporated into other works.
     So, if we have address L1:
          31   28
                        26 bits of L1                                 00




     If L1 is assigned address 0xa460 005c,
     L1 in binary:
     1010 0100 0110 0000 0000 0000 0101 1100

     Then machine code for j L1 is
     000001 0100 0110 0000 0000 0000 0101 11
       in hex 0x09180017
60
          These slides may be freely used, distributed, and incorporated into other works.
     On the MIPS architecture:

     branch instructions
       use an offset from the current PC at
       execution time to calculate the target
       address for a taken branch

     jump instructions
       use part of an address together with
       implied other bits to form an address


61
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