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(IJCSIS) International Journal of Computer Science and Information Security,
Vol. 9, No. 6, June 2011
A Low-Power CMOS Implementation of a Cellular
Neural Network for Connected Component Detection.
M. El-Sayed Ragab
S. El-Din, A. K. Abol Seoud, and A. El-Fahar School of Electronics, Comm. and Computer Eng.
Electrical Engineering Department E-JUST.
University of Alexandria Alexandria, Egypt.
Alexandria, Egypt. E-mail: m.ragab@ejust.edu.eg
E-mail: eng_salah_alx@yahoo.com
in the ( i , j ) position of a two-dimensional regular array of
ABSTRACT- In this paper, we describe an analog VISI
implementation of a Cellular Neural Network (CNN) for
M N cells. The r-neighborhood N i, j
r
of a typical
Connected Component Detector (CCD) applications. In this cell C i, j is defined as:
N i, j Ck , l , max k i , l j r (integer )
implementation, a novel compact network architecture based on
a low-power CMOS realization has been employed. The r
(1)
functionality of the proposed network has been verified through An r =1 neighborhood of a cell within a cell array consists of
SPICE simulations for 1-D vectors of arbitrary black-and-white
all those cells shown shaded in Fig.1(c).
pixels.
Keywords: Cellular Neural Network, Low-power CMOS, Connected
Component Detector.
I. INTRODUCTION
The connected component detector (CCD) (alternatively
called connected component analysis, blob extraction, blob
discovery, region labeling, or region extraction) is an
algorithmic application of graph theory, where subsets of
connected components are uniquely labeled based on a given (a)
heuristic. The CCD is used in computer vision to detect
connected regions in binary digital images, although color
images and data with higher-dimensionality can also be
processed [1, 2]. When integrated into an image recognition
system or human-computer interaction interface, the CCD can
operate on a variety of information [3, 4]. Blob extraction is
generally performed on the resulting binary image from a
threshold step. Blobs may be counted, filtered, and tracked. (b) (c)
Blob extraction is related to but distinct from blob detection Figure 1. The cell circuit model and its neighborhood in a cell array. (a) The
[5]. In this paper, starting from the function of Connected cell circuit model (b) The characteristics of the single nonlinear element of the
Component Detection [6], and through the proposed low- cell (a voltage-controlled current source). (c) An r =1 neighborhood in a part
of a cell array.
power CNN cell circuit with opposite-sign templates [7, 8], we
can realize a complete pattern for VLSI CCD. By using a The dynamical system equations describing the Chua-Yang
bipolar pattern [9], we can represent the transient behavior. CNN model shown in Fig. 1, are expressed as:
Performance of the transient behavior is evaluated using 1) State equation:
PSPICE simulation.
dV 1
(t )
xij
C V xij
A(i, j; k , l ) V ykl (t )
II. CONNECTED COMPONENT DETECTION dt R x C ( k ,l )
N r (i , j ) (2)
FUNCTIONALITY
For VLSI implementation of CNNs, it is usual to consider
C ( k ,l )
B(i, j; k , l )V ukl (t ) I
simplified versions of the Chua-Yang model in order to reduce N r (i , j )
circuit complexity [10]. A cellular system was defined as a where 1 i M; 1 j N.
structured collection of identical elements called cells.
Consider the analog processing cell circuit, henceforth called a 2) Output equation:
cell, as shown in Fig.1(a), with only one nonlinear element
whose characteristics is shown in Fig.1(b). This cell is located V (t ) 0.5
V (t ) 1 V (t ) 1
(3)
yij
xij xij
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(IJCSIS) International Journal of Computer Science and Information Security,
Vol. 9, No. 6, June 2011
3) Constraint conditions:
initial pattern
V (0) 1; and V 1.
xij uij
where u, x and y refer to the input, state, and output, final pattern
respectively. (a)
It is noted that the network defined by the above set of
equations is completely stable if the self-feedback coefficient
A (i, j ) 1 and the symmetry conditions nitial pattern
A (i, j; k , l ) A (k , l; i, j ) are satisfied [10]. However, from
an applications point of view, nonsymmetrical templates are final pattern
also of interest and the associated stability properties have to (b)
be considered. An interesting class of CNN with opposite-sign Figure 2. The initial states and final states of a CCD
1, 1 1, 1
templates is defined by the A-template values satisfying the 12 25
following structures and sign conditions: (a) for cell chain.(b) for cell chain.
0 0 0
A s p s
(4) III. Low-Power CMOS Implementation of a CNN cell.
In this section, a practical low power VLSI implementation of
0 0 0
a simplified version of the CNN model is presented, together
where p 1 and s 0 . Moreover, because the stability of with simulation results. Fig. 3 shows a block diagram for the
CNN cell model.
the network is controlled by matrix A, the part of state
equation (2), given by
B (i, j; k , l ) ukl(t ) I , is
c ( k ,l )
V
N r (i , j )
not of interest and can be taken equal to zero. In such a type of
networks, three important sub-classes have been investigated
depending on the relationship between the coefficients p and s
[6]:
i) If s > p-1, the network will have no stable equilibrium
states.
ii) If s < (p-1)/2, the network is completely stable.
iii) If s is in the interval ((p-1)/2,(p-1)), the complete stability
is strongly conjectured because in some saturation regions, in
which V xij
1, there exists no equilibrium states. Figure 3. Block diagram of CNN cell.
The network sub-class (iii) has led to an interesting application It includes an integrator that has as inputs weighted
in digital image processing, the connected component contributions of the outputs and inputs of the set of m cells in a
detection (CCD), in which the dynamics of a cell chain neighborhood of cell c. Vxij is the state of cell Cij, with an
consisting of black (V xi 1) and white (V xi 1) initial condition Vxij(0), RxC conforms the integration time
constant of the system. The cell output is Vyij (t) = f (Vxij (t)),
pixels, with an initial pattern, will converge to a final pattern where f can be any convenient non-linear function. The block
having the CCD properties. To be specific, we consider the A can be implemented using a set of four quadrant multipliers
following two basic combinations in the cell chain: whose inputs are the outputs of the cells within the assumed
the combination tends toward ; and neighborhood and the template A values. Similarly, block B
the combination tends toward . can be implemented using a set of four quadrant multipliers
In fact, the natural results of this dynamical behavior have led whose inputs are the inputs of the cells within the assumed
to the functionality of the CCD, as follows neighborhood and the template B values. The outputs of
Each one-colored connected region of cells will be shifted to
the right and finally compressed into a single cell with this
blocks A and B are (in the current form) xy
and xu , I I
same color. Then these compressed cells will line up at the respectively. Those currents are summed with the bias current
right hand end of the cell chain. Finally the one –colored I of the cell and then integrated in the RxC circuit, to result in
leftmost region will expand to the alternating-colored cells at the cell state voltage Vxij. The output voltage of the cell Vyij is
the right. obtained through the limiting transfer function f(Vxij).
Fig. 2 shows two examples of two CCD operations in two Alternatively, the nonlinear transfer function f(Vxij) can be
different cell chain 1,1 , and 1,1
12 25
.
incorporated in the multiplier circuits themselves, resulting in
a small area CNN cell. This can be realized using low-power
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(IJCSIS) International Journal of Computer Science and Information Security,
Vol. 9, No. 6, June 2011
CMOS four quadrant multipliers operating in weak inversion
regime. The basic difference with respect to the original Chua-
Yang model is that a sigmoid-like function, instead of the
conventional piecewise-linear function, is used to generate the
cell output.
The proposed circuit of a programmable low-power CMOS
four quadrant multiplier and its circuit symbol are shown in
Fig. 4 [11]. It is composed of registers which store the weight
values, a linear DAC, and a tranconductance amplifier. The
cell has five bits. Each bit is controlled by a pass transistor.
Assuming weak inversion operation for all MOS devices in the
multiplier circuit, it can be shown that the output current Io is
expressed as:
I b tanh(k (
V 1 V 2 )) if (5)
2 V 3
is high and V 4 is low
I o I1 I 2 V 2
tanh(k (V 1 Figure 5. The transfer function of the proposed circuit
Ib
2
)) if V 3
is low and V 4 is high
where k 1 , with n is a slope factor ( in practice it lies
nU T
Fig. 6 shows a complete implementation of a CNN cell using
between 1 and 2 and is close to 1 for high values of gate the proposed multiplier circuit. The sets of multipliers in the
voltage), and UT is the thermal voltage whose value is 26mV lower and upper parts of Fig.3 represent the second and third
at room temperature. Current switching logic controlled by V 3 terms in the left hand side of equation (2), respectively. Each
and V4 enables the output to change sign. It is noted that the multiplier in the lower set accepts one of the cells' outputs
output current is linearly proportional to one of the multiplier within the given neighborhood, as one input, and the
inputs, Ib, and varies nonlinearly with the other input, (V1-V2). corresponding template value A () as the other input. The A-
The transfer characteristic of the multiplier circuit is shown in template values are determined by the programmable tail
Fig. 5 current sources Ib,y and their signs are controlled by the
Vdd Vdd
multiplier control inputs V3's and V4's. On the other hand, each
I1 Io
multiplier in the upper set accepts one of the cell's inputs
Vdd Vdd
I2
within the given neighborhood as one input, and the
corresponding template value B () as the other input. Also,
V3 V3
those B- template values are determined by the programmable
Va V4
tail current source, Ib,u and their signs are controlled by the
corresponding multiplier control inputs V3's and V4's. The
V1 V2 output currents of the two multiplier sets are summed together
B
Ib and applied to the RxC current integrator. The resistor Rx is
Vdd
B0 B1 B2 B3 B4
implemented using the diode-connected transistor Mr.
Vgg
I0 I0 I1 I2 I3 I4
V3,u1 V4,u1
Vcom
Vu1 Io,u1
Vcom
Ib,u1
Cells’ inputs V3,u2 V4,u2
u(Nr) Vcom
Io,u2
Vu2
(a) Vcom Vdd
Ib,u2
I
V3 V4
Vun Vx
Vyn
Mr C
V1 Io V3,y2 V4,y2
Vcom
Vy2 Io,y2
V2 Cells’ outputs
y(Nr) Vcom
Ib Ib,y2
V3,y1 V4,y1
Vcom
Vy1 Io,y1
Vcom
Ib,y1
(b)
Figure 4. (a) circuit diagram of programmable low-power CMOS four
quadrant multiplier and (b) its circuit symbol. Figure 6. Complete CNN cell.
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(IJCSIS) International Journal of Computer Science and Information Security,
Vol. 9, No. 6, June 2011
IV. SIMULATION EXAMPLE: The network of Fig.8 has been employed to function as a
Fig. 7 shows three adjacent cells
CNN with opposite-sign templates.
i 1
, i, C C C i 1
in a 1-D
CCD for the 1, 1 12
cell chain of Fig. 2(a). The
template a , a and a values are taken as [6,12]:
i 1 i i 1
a i 1
, a , a 1 2 1
i i 1
(7)
which correspond to the stability criterion (iii) discussed in
section 2. The initial state condition of each cell is set by
adjusting the initial voltage of the capacitor at the cell output.
Figure 7. Three adjacent cells in a 1-D CNN with opposite-sign template.
The cells" inputs and their bias terms are set to zero. The state
equations of the cell C can be described by:
i
x x s f (x
i i i 1
) p f ( xi ) s f ( xi 1) (5)
Fig 8. shows a complete implementation of 1-D opposite-sign
template CNN of 12 cells. Note that in such an architecture the
cell's state voltage V xi1
,V xi , and V xi 1
are directly
fedback to their cells and the nonlinear
functions f ( xi 1), f ( xi ), and f ( xi 1) are already
embedded in the multipliers' transfer characteristics. As
previously stated, this would guarantee compact CNN design
architectures. The state equations resulting from such an
implementation are then expressed as:
d V xi 1 (6)
C V xi
ai 1 I bo f (V xi 1) ai I bo f (V xi ) ai 1 I bo f (V xi 1)
dt R x
where, R x
is the resistance of the diode-connected transistor,
KV x
f (V x) tanh ( ) , and i1 , a a , and a i i 1
represent
2
the template-A values of the network.
Figure 9. Transient Behavior of the 1,1 12
cell chain of Fig. 2 (a).
Note that a "High" voltage corresponds to a "black" pixel and
a "Low" voltage corresponds to a "white" pixel. Fig.9 shows
the transient response of the cells' states obtained from SPICE
simulations. It is clear that the steady state behavior of the
cells conforms the expected CCD behavior of the example
shown in Fig. 2(a).
IV. Conclusion
Cellular neural networks (CNN's) with opposite-sign templates
have been successfully applied in connected component
detection (CCD). A novel circuit architecture based on low-
power CMOS four-quadrant multipliers has been employed to
realize such a type of networks. The proposed architecture has
been applied to the case of 1-D CNN functioning as a CCD.
The CCD functionality of the network has been verified
through SPICE simulations.
Figure 8. Complete circuit of 12 cells 1-D opposite-sign template CNN.
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