CMOS Layout/Verification with LASI Contents PART A: DOWNLOADING, INSTALLING, AND STARTING LASI .................................................. 1 1 INSTALLING LASI (FROM LASI HELP) ................................................................................................... 1 2 UNINSTALLING LASI .............................................................................................................................. 2 PART B: BACKGROUND INFORMATION ........................................................................................... 2 Part A: Downloading, Installing, and Starting LASI This section replicates what was on Homework 4The LASI software (for Windows only) is available at http://cmosedu.com. You will be downloading the LASI 7 version. LASI (LAyout System for Individuals, pronounced "LAZY") was written by Dr. David E. Boyce. The basic download steps are as follows. Create two folders: C:\Lasi7 and C:\Lasi7\Zips Download the LASI installation file (Lasi7xxx.exe) to C:\Lasi7 from the LASI Home Site (http://members.aol.com/lasicad/) or at (http://cmosedu.com/cmos1/winlasi/lasi7017.exe). Download the following design files into the C:\Lasi7\Zips folder: mosis.zip Contains the setups for the MOSIS Scalable CMOS design rules (SCMOS) 2uchip.zip An (old) chip design using the MOSIS design rules. See also here for additional examples. Optional. clib2.zip Mississippi State's standard cell library in SCMOS. Recommended clib2s.zip Mississippi State’s library redrawn to be compatible with the MOSIS submicron design rules. Optional clib.chm (~1,800k) clib documentation (optional but very useful). The following instructions will be found in the LASI Help menu once the software is installed. They are basically reproduced here to get you started. 1 Installing LASI (From LASI Help) The following information outlines the installation procedures for installing LASI on most any PC. If you are reading this, you probably have done most of the installation already. The information is given here so that you can verify that installation has been done correctly. LASI should install and run on any of the Windows operating systems. You should also have the Internet Explorer 4.0 or higher as part of your operating system. The Internet Explorer addon contains an HTML reader named HH.EXE which is used to read the LASI help files. Early versions of Windows 95 and NT 4.0 may not have this program without the Explorer. LASI will be ready to run with just the basic installation. When you are more familiar with LASI's workings you can do more advanced things. If you downloaded from the Internet, LASI should be in a single Zip file LASI7XXX.ZIP. Where the "XXX" indicates the version number. We now supply the download as a Zip because many ISP block executables because of viruses and a Zip gives an extra degree of protection. Unzip LASI7XXX.EXE from LASI7XXX.ZIP and run this executable from any folder. LASI should be installed. The \LASI7 folder and its subfolders should be created. The system and any extra files should be decompressed into these folders. Start Menu items should also be created under the "Programs" item "Lasi 7". Note: LASI7XXX.EXE incorporates a file length check which reduces tampering with LASI7XXX.EXE, possibly by a virus. If the file length is wrong, an failure message will appear. You can continue the installation by holding down the CTRL key, but expect errors. 2 Uninstalling LASI All LASI system files go into the \LASI7 folder and its subfolders. Drawings and shortcuts to drawings can be placed almost anywhere. For this reason there is no particular Uninstall program. To remove LASI remove files in this order: If a shortcut link to a drawing exists, delete it If a drawing folder exists, delete it. If "Lasi 7" is in the Start Menu, delete the "Lasi 7" menu item. To remove LASI system files just delete the \Lasi7 folder. LASI does nothing to the Windows registry, other than the usual Windows system bookkeeping, so you should not have any strange behavior caused by registry information errors. Tip: It is usually easier to delete all drawing folders if the are under one master folder, instead of scattering them all over your hard drive. Part B: Background Information The Part summarizes some general information that will be helpful as you complete the circuit layouts.. For this purpose, I recommend that you set up your design folder (placed in c:\Lasi7) as follows. In c:\Lasi7 create a folder called “MyCircuit” Copy all the files in c:\Lasi7\Edulib into your “MyCircuit” folder. Create a shortcut (right click on the desktop screen of your computer, select “New”, and select “Shortcut”). Set the “Target” to be C:\Lasi7\Lasi7.exe. Set the “Start in” folder to be C:\Lasi7\MyCircuit. Name the shortcut “MyCircuit”. A shortcut icon should appear on your desktop. Double click the “MyCircuit” desktop shortcut icon. The LASI7 window should appear with a text box asking for a “Cellname”. Enter the name “MyFirstTry”. Click “OK”. Another window appears asking for the “New Cell Rank”. Select “1” and then click “OK”. A blank LASI window should appear. A complex design would be hierarchically organized (bottom-to-top) in increasing ranks. Rank 1 is the lowest level of the design, where you create the basic logic cells that you will be using. Having created the Rank 1 cells, you will find them included in your “MyCircuit” folder. If you were to save the Rank 1 circuit design and then exit LASI7, you can restart LASI7 by clicking on the desktop icon to MyCircuit. You can then enter a different name for the “Cellname” and select rank 2. You are now able to enter your Rank 1 circuit designs as components to be interconnected in your higher level Rank 2 circuit cell. Saving it, you can then move to Rank 3 cells using the Rank 2 and Rank 1 cells as elements. Follow the instructions in the LASI tutorial linked on the homework’s Webpage to set up and see the grid. The spacing between dots is lambda and the gate length is typically 2 times lambda. Design rules are given as multiples of lambda. In the lower left hand corner of the LASI7 display, you will see “Wgrd” and “Dgrd” set to some value in “lam” (lambda). On the right side of your screen, under “Menu 1” (If the menu says “Menu 2”, simply click on it to switch to “Menu 1”), you will see about half way down buttons for “Wgrd” and “Dgrd”. Click on the “Wgrd” button until the bottom left side of your screen says “Wgrd = 1 lam. Then click on the “Dgrd” button until the bottom left side of your screen says “Dgrd = 1 lam.” Next, click on the “Layr” button about a third of the way down in “Menu 1”. A window showing small labeled boxes (with different color patterns will appear). These represent various physical layers defined by masks during the fabrication of the CMOS circuits. You will not be using all of them. o To draw boxes representing the area taken up by a transistor (NMOS or PMOS), you will be selecting and using the “ACTV” layer (“Active layer”). o Once you draw a rectangle representing the “active layer, you will need to specify whether this is the active area for an NMOS transistor or for a PMOS transistor. For NMOS transistors, you will use the “NSEL” (N select) layer, drawn around and at least two lambda outside the ACTV layer. For PMOS, use the “PSEL” layer (also around and at least two lambda outside the ACTV layer. o To draw the polysilicon regions that overlay the gate region, you will be selecting the “Poly1” layer. o The create contact holes for contact of the metal layer to source/drain regions, the polysilicon gate layer, or the Well layer, use the “CONT” (contact) layer. o You can assume that you are using a P-type substrate, the type required for simple fabrication of NMOS transistors (which require a P-Type substrate). However, when defining PMOS transistors, you will need to use an N-Type Well implanted in the P-Type substrate where the PMOS transistors are located. For this purpose, around each PMOS transistor you will need to add the layer “NWEL” (N-type well). This N-type well serves as a localized “substrate” for the PMOS transistors and must be connected to Vdd for the PMOS transistors to operate correctly. You will therefore need to made a metal connection, through a contact hole, to the NWEL region, connecting that metal also to the Vdd power line. You will need to play with the above when creating your circuit since there are requirements related to minimum size of some of the regions and minimum distances from the edge of one region to another. For example, contact holes MUST BE PRECISELY 2 lambda by 2 lambda in size. These are the infamous DESIGN RULES. The hardest problem you will encounter is in understanding what the design rules are. When you downloaded the LASI7 software, one of the .zip files was “Mosis_rules”. Unzip this and a folder C:\Lasi7\Mosis_rules will appear. This is a set of pictures (drawn using LASI) showing all the detailed rules. I will put together an overview of the design rules that will be applying to your design. If you are looking at the information in the “Mosis_rules” folder, the rules that apply are the “SCMOS” rules. For now, go into the C:\Lasi7\Mosis_rules” directory and look at the files there. One will be called “Allmosis”. Double click on “Allmosis” and Lasi7 will start. The first window will give the cell name as “Allmosis”. Leave this name unchanged and click “OK”. Next, click “Fit” (appears at the top right of the Lasi7 window) and you will see the overall collection of pieces. Click on “Zoom” at the top right of the Lasi window and then draw a box around the square with some stuff inside that appears at the left top side of the “cell”. This will expand it so that it fills the screen. The caption for this window is “26. METALS (SUBM and DEEP)”. This is “Rule 26”, which will be checked when you run the design rule check later. The rules are organized by number starting at the lower left of the overall “MOSIS_rules” window, increasing to the right and then moving to the next row above. Find rule “1. Well” at the bottom left of the overall “Mosis_rules” window and zoom in on it. You will find four distinct rules. 1.1 is for the minimum width (10 lambda for SCMOS). 1.2 is the minimum spacing between wells at different potentials. 1.3 is the minimum distance between two wells at the same potential (e.g., two N-wells or two P-wells). 1.4 is the minimum spacing between wells of different types. You can “see” what these mean by looking at the picture shown When you run the design rule checker, it will locate all design rule violations and report the “rule number” of each. The rule number will correspond to the rule numbers discussed above. Figure A After you have completed some of your drawing, it is useful to check whether the design rules have been satisfied. Click on the “System” menu item at the top left of the Lasi7 window. A new window entitled “System Mode” appears. Click on the button for “LasiDrc” (Lasi Design rule Check). A small window appears with Help, Run, Map, Setup, and Go pull-down menus. Click on the “Setup” pull-down menu and the “DRC Setup” window appears, with the name of the cell. NOTE: The design rule check will be done on THE LAST SAVED VERSION OF THE CIRCUIT, not the version that is displayed if not saved. The DRC File Name when I run this was set to “Mosis-deep.drc”. The “Check Start” was set at “1” (i.e., checking starts at rule 1) and the “Finish” was set at “115” (i.e., in steps through the rules until it reaches rule 115). You should change settings as needed to match those in the Figure A above. I set “Enable SCPY”, “Enable PAUSE”, “Erase Old PCX File”, and “Erase Old Report File.” The DRC report file name (has a “.rpt” extension) was “LasiDrc.rpt”. After filling in the “DRC Setup” information, click “OK” and then click the “Go” button on the small “LasiDrc7” window. The design rule checks are now being performed. The checking will halt for a while whenever it finds that the design rule being checked has been violated. Be patient until the final window appears giving the total number of design rule checks violated.