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(IJCSIS) International Journal of Computer Science and Information Security, Vol. 9, No. 5, May 2011 A Low-Power CMOS Programmable CNN Cell and its Application to Stability of CNN with Opposite- Sign Templates S. El-Din, A. K. Abol Seoud, and A. El-Fahar M. El-Sayed Ragab Electrical Engineering Department School of Electronics, Comm. and Computer Eng. University of Alexandria E-JUST. Alexandria, Egypt. Alexandria, Egypt. E-mail: eng_salah_alx@yahoo.com E-mail: m.ragab@ejust.edu.eg Abstract--In this paper, a novel VLSI architecture adaptation of power four quadrant multipliers using MOSFET's operating in the Cellular Neural Network (CNN) paradigm is described. It is the weak inversion regime, where the small currents based on a combination of MOS transistors operating in weak contribute to the low- power consumption [13]. The multiplier inversion regime. This combination has enabled a CMOS also has a variable transconductance characteristic for the implementation of a simplified version of the original CNN programmability of the CNN structure. The proposed cell has model with the main characteristics of low-power consumption. Digitally selectable template coefficients are employed and a been applied to study the stability [14, 15], and oscillation of a local logic and memory are added into each cell providing a CNN paradigm [16, 17]. The performance of the proposed simple dual computing structure (analog and digital). A four- circuit has been evaluated using PSPICE simulations. quadrant analog multiplier is used as a voltage controlled current source which is feeding from the weighting factors of the II. The General Framework template elements. The main feature of the multiplier is the high A cellular neural network [1] is a special type of neural value of the weight voltage range which varies between the networks, where the analog processing elements on one layer ground voltage and the supply voltage. A simulation example for are arranged in a two-dimensional grid having cell stability of a class of nonreciprocal cellular neural network with interconnections with nearest neighbors only. Consider the opposite-sign template is presented. analog processing cell circuit, henceforth called a cell, as Keywords: Cellular Neural Network, Low-power CNN, Opposite- shown in Fig.1(a), with only one nonlinear element whose Sign Template. characteristics is shown in Fig.1(b). This cell is located in the ( i , j ) position of a two-dimensional regular array of M N N i, j of a typical cell Ci, j I. INTRODUCTION cells. The r-neighborhood Cellular Neural Networks (CNNs), introduced by Chua and r Yang in 1988 [1], have been extensively studied in the past is defined as: two decade [2, 3, 4]. All such studies have been focused on four special topics: 1) the CNN functions; 2) hardware N i, j Ck , l , max k i , l j r (integer ) r (1) An r =1 neighborhood of a cell within a cell array consists of implementation; 3) software systems; and 4) various all those cells shown shaded in Fig.1(c). engineering and scientific applications [5]. CNNs have been successfully applied to signal processing systems, especially in static image treatment [3], and to solve nonlinear algebraic equations [6]. It has also been shown that the process of moving images requires the introduction of time delays in the signals transmitted through the network [7,8,9].Through VLSI technology and using switching circuit techniques such delays can be introduce in the interaction between neurons [8]. To realize the CNN on a silicon chip, the CNN cell is required to have low power consumption. Various analog VLSI (a) implementations of CNN building locks have been previously implemented and tested [10, 11]. Such implementations have served to build CNNs under different constraints concerning the size of the network, the kind of cell input and state (analog/digital), the power consumption, and the programmability features of the network allowing more compact VLSI implementations [12]. The aim of this paper is to design and implement a new low-power CMOS CNN cell. The circuit employs low- (b) 43 http://sites.google.com/site/ijcsis/ ISSN 1947-5500 (IJCSIS) International Journal of Computer Science and Information Security, Vol. 9, No. 5, May 2011 is assured even if the symmetry condition is not met. In [15] a through stability analysis of cellular neural networks with opposite-sign templates has been presented. In this analysis, the dependence of complete stability on the template values, and the parameter regions for complete stability and instability have been determined. This class is defined by the template values which satisfy the following structures and sign conditions [14]: 0 0 0 A s p s (c) (9) Figure 1. The cell circuit model and its neighborhood in a cell array. (a) The cell circuit model (b) The characteristics of the single nonlinear element of the cell (a voltage-controlled current source). (c) An r =1 neighborhood in a 0 0 0 part of a cell array. 1 where p and s0 The dynamical system equations describing a cellular neural network consist of the following equations and constraints: R x The complete stability of the system defined by (2) has been (1) State Equation: proven to be strongly conjectural if [15]: dV 1 ( p 1) (t ) xij C V xij A(i, j; k , l )V ykl (t ) (2) i) B0 ii ) s ( p 1) (10) dt R x C ( k ,l ) Nr (i , j ) 2 B(i, j; k , l )V ukl (t ) I Also, the network will oscillate periodically if [16]: C ( k ,l ) N r (i , j ) i) B 0 ii ) s p 1 (11) where 1 i M; 1 j N IV. Low-Power CMOS Programmable CNN Cell (2) Output Equation: The block diagram of a continuous time CNN cell is shown V yij (t ) 0.5 V xij (t ) 1 V xij (t ) 1 f (V xij ). (3) in Fig.2. (3) Input Equation: V uij Eij . (4) (4) Constraint Equations: V xij (0) 1 (5) V uij 1. (6) (5) Parameter Assumptions: A(i, j; k , l ) A(k , l; i, j ) Symmetry condition (7) Figure2. Block diagram of CNN cell. C 0, Rx 0. (8) Vxij is the state of cell Cij, with an initial condition Vxij(0), RxC conforms the integration time constant of the system. The III. Stability of Cellular Neural Networks cell output is Vyij (t) = f (Vxij (t)), where f can be any A necessary condition for the proper operation of a cellular convenient non-linear function. The block A can be neural network is that it be completely stable within the implemented using a set of four quadrant multipliers whose dynamic range of prescribed inputs. A circuit is said to be inputs are the outputs of the cells within the assumed completely stable if every trajectory tends to an equilibrium neighborhood and the template A values. Similarly, block B state. The complete stability of a subclass of cellular neural can be implemented using a set of four quadrant multipliers networks is defined by symmetric templates [1]. The whose inputs are the inputs of the cells within the assumed symmetry condition means that the feedback values between neighborhood and the template B values. The outputs of any two cells are reciprocal in the sense that corresponding blocks A and B are (in the current form) Ixy and Ixu, values are the same; i.e., A(i, j; k , l ) A(k , l; i, j ) . The respectively. Those currents are summed with the bias current assumption ( 7 ) implies the perfect symmetry of the I of the cell and then integrated in the RxC circuit, to result in feedback-template values between any two cells within a the cell state voltage Vxij. The output voltage of the cell Vyij is neighborhood. From theorem 4 in [1], if the parameters satisfy obtained through the limiting transfer function f(Vxij). the symmetry condition, the circuit will be completely stable. Alternatively, the nonlinear transfer function f(Vxij) can be But many unsymmetrical templates have been found for some incorporated in the multiplier circuits themselves, resulting in important applications [3]. In [14] it has been shown that for a a small area CNN cell. This can be realized using low-power class of practically important templates (positive / negative CMOS four quadrant multipliers operating in weak inversion and opposite-sign templates), the complete stability property regime. 44 http://sites.google.com/site/ijcsis/ ISSN 1947-5500 (IJCSIS) International Journal of Computer Science and Information Security, Vol. 9, No. 5, May 2011 I b tanh(k ( V 1 V 2 )) if (12) 2 V 3 is high and V 4 is low A. Programmable Low-power CMOS four quadrant I o I1 I 2 multiplier tanh(k (V 1 V 2 )) if Ib 2 V 3 is low and V 4 is high Fig. 3 shows the proposed programmable low-power CMOS four quadrant multiplier circuit and its sub-circuit where k 1 , with n is a slope factor ( in practice it representation. nU T Vdd Vdd lies between 1 and 2 and is close to 1 for high values of gate voltage), and UT is the thermal voltage whose value is 26mv at I1 Io room temperature. Current switching logic controlled by V3 I2 and V4 enables the output to change sign. The transfer Vdd Vdd characteristic of the multiplier circuit is shown in figure 4. It is noted that the output transfer characteristic is linearly V3 V3 proportional to one of the multiplier inputs, I b, and varies Va V4 nonlinearly with the other input, (V1-V2). V1 V2 B Ib Vdd B0 B1 B2 B3 B4 Vgg I0 I0 I1 I2 I3 I4 (a) V3 V4 V1 Io Figure 4. Transfer characteristic of the proposed four quadrant multiplier. V2 Ib B. Complete CNN CMOS Implementation Fig. 5 shows a complete implementation of a CNN cell using the proposed multiplier circuit. V3,u1 V4,u1 Vcom (b) Vu1 Io,u1 Vcom Figure 3. (a) Four quadrant multiplier schematic (b) Multiplier sub-circuit Ib,u1 representation Cells’ inputs V3,u2 V4,u2 This circuit represents a trade-off between digital and analog u(Nr) Vu2 Vcom Io,u2 techniques. It is composed of registers which store the weight Vcom Ib,u2 Vdd values, a linear DAC and a tranconductance multiplier. The I DAC has five bits plus sign weight storage which sets the tail Vun Vx bias current Ib. The least significant bit bias current has been Vyn set to 40 pA. The DAC has shown good monotonicity in the Mr C weak inversion regime. Each bit (B0-B4) of the DAC is Vcom V3,y2 V4,y2 Vy2 Io,y2 controlled by a pass transistor which can be turned on or off Cells’ outputs y(Nr) Vcom Ib,y2 depending on the value stored in the corresponding CMOS latch.I0-I4 are the current sources which contribute to the bias current Ib in a successive power of two fashion. The DAC is Vcom V3,y1 V4,y1 Io,y1 connected to a transconductance amplifier to form a four Vy1 Vcom quadrant multiplier. Assuming weak inversion operation for Ib,y1 all MOS devices in the multiplier circuit, it can be shown that the output current Io is expressed as: Figure5. Complete CNN cell. 45 http://sites.google.com/site/ijcsis/ ISSN 1947-5500 (IJCSIS) International Journal of Computer Science and Information Security, Vol. 9, No. 5, May 2011 The sets of multipliers in the lower and upper parts of Fig.5 where Rx is the resistance of the diode-connected transistor, represent the second and third terms in the left hand side of equation (2), respectively. Each multiplier in the lower set f (V x) tanh ( kV x ) , accepts one of the cells' outputs within the given 2 neighborhood, as one input, and the corresponding template and a1 and a2 represent the template-A values of the network. value A ( ) as the other input. The A- template values are determined by the programmable tail current sources I b,y and their signs are controlled by the multiplier control inputs V 3's Vcom and V4's. On the other hand, each multiplier in the upper set accepts one of the cell's inputs within the given neighborhood Vcom as one input, and the corresponding template value B( ) as the other input. Also, those B- template values are determined by the programmable tail current source, Ib,u and their signs are Vx1 controlled by the corresponding multiplier control inputs V3's and V4's. The output currents of the two multiplier sets are Mr C Vcom summed together and applied to the RxC current integrator. The resistor Rx is implemented using the diode-connected transistor Mr. Vcom V. SIMULATION EXAMPLE To test the validity of the proposed CNN cell, a cellular neural network with two cells using an opposite-sign template is Vcom considered [15]. The network is shown in Fig.6. Vcom Vx2 Mr Vcom C Vcom Figure 6. CNN with opposite-sign template. Figure7. Low-power CMOS implementation of the CNN of Fig. 6 The cells" inputs and their bias terms are set to zero, in order AS mentioned previously, the network is considered to be to remove the possibility of forced stability. The state ( a 1) equations of the system can be described by: conjecturally stable if 1 ( a1 1) and will a x1 x1 p f ( x1) s f ( x2) 2 2 (13) oscillate periodically if a ( a1 1) 0 . Fig .8 shows the x x 2 2 s f ( x1) p f ( x2). 2 transient behavior of the network with a1= 2.0 and a2 = 0.99. Fig. 7 shows how the CNN of Fig.6 can be implemented using A complete stability is observed in such a case where state the proposed CNN cell. Note that in such an architecture the voltages Vx1 and Vx2 are converged to constant values. Fig. 9 cell's state voltages Vx1 and Vx2 are directly fedback to the Shows the transient behavior of the network with a1=2.0 and two cells and the nonlinear functions f (x1) and f(x2) are a2 =1.2. Periodic oscillations of state voltages Vx1 and Vx2 are already embedded in the multipliers' transfer characteristics. observed in this case. As previously stated, this would guarantee compact CNN design architectures. The state equations resulting from such an implementation are then expressed as: C dV x1 1 V x1 a1 I b0 f (V x1) a2 I b0 f (V x 2) (14) dt Rx and, C dV x 2 1 V a I f (V ) a I f (V ) (15) dt Rx x 2 1 b0 x 2 2 b0 x 2 Figure8. Transient behavior of the network with a1=2.0, a2=0.99. 46 http://sites.google.com/site/ijcsis/ ISSN 1947-5500 (IJCSIS) International Journal of Computer Science and Information Security, Vol. 9, No. 5, May 2011 [10] J.M.Cruz and L.O.Chua, "A CNN chip for connected component detection," IEEE Trans. Circuits Syst., Vol. 38, pp. 812-816, July 1991. [11] P.Kinget and M.S.J.Steyaert, "A programmable analog cellular neural network CMOS chip for high speed image processing," IEEE. J. Solid-State Circuits, Vol. 30, Mar. 1995. [12] Mancia Anguita, Francisco. J.Pelayo, Francisco J.Fernandez, and Alberto Prieto "A Low-Power CMOS Implementation of Programmable CNN's with Embedded Photo sensors" IEEE Transactions on circuits and systems: Fundamental theory and applications; Vol. 44, no. 2, Feb. 1997. [13] Salah el-Din "Design and Simulation of Compact Low- Figure 9. Transient behavior of the network with a1=2, a2= 1.2. Power CMOS Artificial Neural Networks" M.SC. dissertation, Alexandria University, Alex., Egypt, 2003. VI. Conclusion [14] L.O.Chua, Fellow, IEEE, and Tamas Roska, A modified low-power CMOS implementation of a cellular Member,IEEE, "Stability of a Class of Nonreciprocal Cellular neural network cell has been proposed. Instead of the Neural Networks," IEEE Trans. Circuits & Syst. vol., 37, no. conventional piecewise-linear transfer function used in the 12, December 1990. output stage of the standard CNN cell introduced by Chua and [15] Fan Zou and Josef A.Nossek "Stability of Cellular Neural Yang, a sigmoid-like transfer function is embedded in the Networks with Opposite-Sign Templates," IEEE Trans. transfer characteristic of the dependent current sources Circuits & Syst. vol. 38, mo. 6, June 1991. determining the state of the cell. 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