FLASH MEMORY INTRODUCTION
Flash memory is a non-volatile computer memory that can be electrically erased
and reprogrammed. It is a technology that is primarily used in memory cards and USB flash drives for general storage and transfer of data between computers and other digital products. It is a specific type of EEPROM (Electrically Erasable Programmable Read-Only
Memory) that is erased and programmed in large blocks; in early flash the entire chip had to be erased at once. Flash memory costs far less than byte-programmable EEPROM and therefore has
become the dominant technology wherever a significant amount of non-volatile, solid state storage is needed. Flash memory is non-volatile, which means that no power is needed to maintain the
information stored in the chip. In addition, flash memory offers fast read access times (although not as fast as volatile DRAM memory used for main memory in PCs) and better kinetic shock resistance than hard disks. These characteristics explain the popularity of flash memory in portable devices. Another feature of flash memory is that when packaged in a "memory card," it is
enormously durable, being able to withstand intense pressure, extremes of temperature, and even immersion in water. Although technically a type of EEPROM, the term "EEPROM" is generally used to
refer specifically to non-flash EEPROM which is erasable in small blocks, typically bytes. Because erase cycles are slow, the large block sizes used in flash memory erasing give it a significant speed advantage over old-style EEPROM when writing large amounts of data. Example applications include PDAs (personal digital assistants), laptop computers, digital audio players, digital cameras and USB’s.
FLASH MEMORY HISTORY
Flash memory (both NOR and NAND types) was invented by Dr. Fujio Masuoka
while working for Toshiba circa 1980. According to Toshiba, the name "flash" was suggested by Dr. Masuoka's colleague, Mr. Shoji Ariizumi, because the erasure process of the memory contents reminded him of a flash of a camera. Dr. Masuoka presented the invention at the IEEE 1984 International Electron Devices Meeting (IEDM) held in San Francisco, California. Intel saw the massive potential of the invention and introduced the first commercial NOR type flash chip in 1988. NOR-based flash has long erase and write times, but provides full address and data buses, allowing random access to any memory location. This makes it a suitable replacement for older ROM chips, which are used to store program code that rarely needs to be updated, such as a computer's BIOS or the firmware of set-top boxes. Toshiba announced NAND flash at the 1987 International Electron Devices Meeting.
It has faster erase and write times, and requires a smaller chip area per cell, thus allowing greater storage densities and lower costs per bit than NOR flash; it also has up to ten times the endurance of NOR flash. However, the I/O interface of NAND flash does not provide a random-access external
address bus. Rather, data must be read on a block-wise basis, with typical block sizes of hundreds to thousands of bits. This made NAND flash unsuitable as a drop-in replacement for program ROM since
most microprocessors and microcontrollers required byte-level random access. In this regard NAND flash is similar to other secondary storage devices such as hard disks and optical media, and is thus very suitable for use in mass-storage devices such as memory cards. The first NAND-based removable media format was SmartMedia, and many others
have followed, including MultiMediaCard, Secure Digital, Memory Stick and xDPicture Card.
FLASH MEMORY PRINCIPLE OF FLASH MEMORY
Flash memory stores information in an array of memory cells made from floating-gate transistors. In traditional single-level cell (SLC) devices, each cell stores only one bit of information. Some newer flash memory, known as multi-level cell (MLC) devices, can store more than one bit per cell by choosing between multiple levels of electrical charge to apply to the floating gates of its cells.
In NOR gate flash, each cell resembles a standard MOSFET, except the transistor has two gates instead of one. On top is the control gate (CG), as in other MOS transistors, but below this there is a floating gate (FG) insulated all around by an oxide layer. The FG is interposed between the CG and the MOSFET channel. Because the FG is electrically isolated by its insulating layer, any electrons placed on it are trapped there and, under normal conditions, will not discharge for many years When the FG holds a charge, it screens (partially cancels) the electric field from the CG, which modifies the threshold voltage (VT) of the cell. During read-out, a voltage is applied to the CG, and the MOSFET channel will become conducting or remain insulating, depending on the VT of the cell, which is in turn controlled by charge on the FG. The current flow through the MOSFET channel is sensed and forms a binary code, reproducing the stored data. In a multi-level cell device, which stores more than one bit per cell, the amount of current flow is sensed (rather than simply its presence or absence), in order to determine more precisely the level of charge on the FG.
A single-level NOR flash cell in its default state is logically equivalent to a binary "1" value, because current will flow through the channel under application of an appropriate voltage to the control gate. A NOR flash cell can be programmed, or set to a binary "0" value, by the following procedure:
An elevated on-voltage (typically >5 V) is applied to the CG
the channel is now turned on, so electrons can flow from the source to the drain
(assuming an NMOS transistor) the source-drain current is sufficiently high to cause some high energy electrons to
jump through the insulating layer onto the FG, via a process called hot-electron injection
To erase a NOR flash cell (resetting it to the "1" state), a large voltage of the opposite
polarity is applied between the CG and source, pulling the electrons off the FG through quantum tunneling. Modern NOR flash memory chips are divided into erase segments (often called
blocks or sectors). The erase operation can only be performed on a block-wise basis; all the cells in an erase segment must be erased together. Programming of NOR cells, however, can generally be performed one byte or word at a time.
Internal charge pumps
Despite the need for high programming and erasing voltages, virtually all flash chips
today require only a single supply voltage, and produce the high voltages via on-chip charge pumps.
NAND gate flash uses tunnel injection for writing and tunnel release for erasing.
NAND flash memory forms the core of the removable USB storage devices known as USB flash drives and most memory card formats available today.
A USB flash drive. The chip on the left is the flash memory. The microcontroller is on the right.
SanDisk’s USB drive provides a single-button backup, hardware encryption and password protection of critical files
Distinction between NOR and NAND flash
NOR and NAND flash differ in two important ways: 1. the connections of the individual memory cells are different 2. the interface provided for reading and writing the memory is different (NOR allows random-access for reading, NAND allows only page access) It is important to understand that these two are linked by the design choices made in the development of NAND flash. An important goal of NAND flash development was to reduce the chip area required to implement a given capacity of flash memory, and thereby to reduce cost per bit and increase maximum chip capacity so that flash memory could compete with magnetic storage devices like hard disks. NOR and NAND flash get their names from the structure of the interconnections between memory cells. In NOR flash, cells are connected in parallel to the bit lines, allowing cells to be read and programmed individually. The parallel connection of cells resembles the parallel connection of transistors in a CMOS NOR gate. In NAND flash, cells are connected in series, resembling a NAND gate, and preventing cells from being read and programmed individually: the cells connected in series must be read in series. When NOR flash was developed, it was envisioned as a more economical and conveniently rewritable ROM than contemporary EPROM, EAROM, and EEPROM memories. Thus random-access reading circuitry was necessary. However, it was expected that NOR flash ROM would be read much more often than
written, so the write circuitry included was fairly slow and could only erase in a blockwise fashion; random-access write circuitry would add to the complexity and cost unnecessarily. Because of the series connection and removal of wordline contacts, a large grid of NAND flash memory cells will occupy perhaps only 60% of the area of equivalent NOR cells(assuming the same CMOS process resolution, e.g. 130 nm, 90 nm, 65 nm).
NAND flash's designers realized that the area of a NAND chip, and thus the cost,
could be further reduced by removing the external address and data bus circuitry. Instead, external devices could communicate with NAND flash via sequential-accessed command and data registers, which would internally retrieve and output the necessary data. This design choice made random-access of NAND flash memory impossible, but the goal of NAND flash was to replace hard disks, not to replace ROMs. The write endurance of SLC Floating Gate NOR flash is typically equal or greater
than that of NAND flash, while MLC NOR & NAND Flash have similar Endurance capabilities
FLASH MEMORY WORKING OF FLASH MEMORY
Flash memory stores information in an array of floating gate transistors, called
"cells", each of which traditionally stores one bit of information. Flash memory devices, sometimes referred to as multi-level cell devices, can store
more than 1 bit per cell, by using more than two levels of electrical charge, placed on the floating gate of a cell. In NOR gate flash, each cell looks similar to a standard MOSFET, except that it has
two gates instead of just one.
circuit of flash memory
The FG is between the CG and the substrate. Because the FG is isolated by its electrons placed on it get trapped there and thus store the
insulating oxide layer, any
information. When electrons are on the FG, they modify (partially cancel out) the electric field coming from the CG, which modifies the threshold voltage (Vt) of the cell. Thus, when the cell is "read" by placing a specific voltage on the CG, electrical current will either flow or not flow, depending on the Vt of the cell, which is controlled by the number of electrons on the FG. This presence or absence of current is sensed and translated into 1s and 0s, reproducing the stored data.
In a multi-level cell device, which stores more than 1 bit of information per cell, the
amount of current flow will be sensed, rather than simply detecting presence or absence of current, in order to determine the number of electrons stored on the FG.
A NOR flash cell is programmed (set to a specified data value) by starting up
electrons flowing from the source to the drain, then a large voltage placed on the CG provides a strong enough electric field to suck them up onto the FG, a process called hotelectron injection. To erase (reset to all 1s, in preparation for reprogramming) a NOR flash cell, a large voltage differential is placed between the CG and source, which pulls the electrons off through quantum tunneling.
In single-voltage devices (virtually all chips available today), this high voltage is
generated by an on-chip charge pump. Most modern NOR flash memory components are divided into erase segments, usually called either blocks or sectors. All of the memory cells in a block must be erased at the same time. NOR programming, however, can generally be performed one byte or word at a time.
NAND gate flash uses tunnel injection for writing and tunnel release for erasing.
NAND flash memory forms the core of the removable USB interface storage devices known as USB flash drives.
How flash memory works—the simple explanation
Flash works using an entirely different kind of transistor that stays switched on (or switched off) even when the power is turned off. A normal transistor has three connections (wires that control it) called the source, drain, and gate.
Think of a transistor as a pipe through which electricity can flow like water. One end of the pipe is called the source—think of that as a tap or faucet. The other end of the pipe is called the drain—where the water drains into and flows away. In between the source and drain, blocking the pipe, there's a gate. When the gate is closed, the pipe is shut off, no electricity can flow and the transistor is off. In this state, the transistor stores a zero. When the gate is opened, electricity flows, the transistor is on, and it stores a one. But when the power is turned off, the transistor switches off too. When you switch
the power back on, the transistor is still off, and since you can't know whether it was on or off before the power was removed, you can see why we say it "forgets" any information it stores.
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A flash transistor has a second gate above the first one. When the gate opens, some electricity leaks up the first gate and stays there, in between the first gate and the second one, recording a number one. Even if the power is turned off, the electricity is still there between the two gates. That's how the transistor stores its information whether the power is on or off. The information can be erased by making the "trapped electricity" drain back down again
How flash memory works—a more complex explanation
The transistors in flash memory are like MOSFETs only they have two gates on top instead of one. This is what a flash transistor looks like inside. You can see it's an n-p-n sandwich with two gates on top, one called a control gate and one called a floating gate. The two gates are separated by oxide layers through which current cannot normally pass:
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The transistor is switched off—and effectively storing a zero. Source and the drain regions are rich in electrons (because they're made of n-type silicon), but electrons cannot flow from source to drain because of the electron deficient, p-type material between them. But if we apply a positive voltage to the transistor's two contacts, called the bitline and the wordline, electrons get pulled in a rush from source to drain. A few also manage to wriggle through the oxide layer by a process called tunnelling and get stuck between the two gates.
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The presence of electrons between the gates is how a flash transistor stores a one.
The electrons will stay there indefinitely, even when the positive voltages are removed and whether there is power supplied to the circuit or not. The electrons can be flushed out by putting a negative voltage on the wordline—which repels the electrons back the way they came, clearing the space between the gates and making the transistor store a zero again.
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FLASH MEMORY APPLICATION OF FLASH MEMORY
Serial flash is a small, low-power flash memory that uses a serial interface, typically SPI, for sequential data access. When incorporated into an embedded system, serial flash requires fewer wires on the Many ASICs are pad-limited, meaning that the size of the die is constrained by the number of wire bond pads, rather than the complexity and number of gates used for the device logic. Eliminating bond pads thus permits a more compact integrated circuit, on a smaller die; this increases the number of dies that may be fabricated on a wafer, and thus reduces the cost per die. This may permit a reduction in board space, power consumption, and total system cost. Applications for serial flash include storing firmware for hard drives, Ethernet controllers, DSL modems, wireless network devices, etc.
There are several reasons why a serial device, with fewer external pins than a parallel device, can significantly reduce overall cost:
Many ASICs are pad-limited, meaning that the size of the die is constrained by the number of wire bond pads, rather than the complexity and number of gates used for the device logic. Eliminating bond pads thus permits a more compact integrated circuit, on a smaller die; this increases the number of dies that may be fabricated on a wafer, and thus reduces the cost per die. Reducing the number of external pins also reduces assembly and packaging costs. A serial device may be packaged in a smaller and simpler package than a parallel device. Smaller and lower pin-count packages occupy reduced PCB area. Lower pin-count devices simplify PCB routing. Flash memory is used for easy and fast information storage in computers, digital cameras and home video game consoles It is used more like a hard drive than as RAM. In fact, flash memory is known as a solid state storage device, meaning there are no moving parts -- everything is electronic instead of mechanical.
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Few examples of flash memory: BIOS chip Compact Flash (most often found in digital cameras) Smart Media (most often found in digital cameras) Memory Stick (most often found in digital cameras)
PCMCIA Type I and Type II memory cards (used as solid-state disks in laptops)
Samsung's Spinpoint A1 40 GB hard drives comes in the Compact Flash II card form factor. It measures 1.7x1.4 inches and is 5 millimeters thick and can store up to 40GB of information. Samsung expects this form factor to take off with MP3 players, other portable media players, digital cameras, ultramobile PCs, and smartphones.
LIMITATION OF FLASH MEMORY
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One limitation of flash memory is that although it can be read or programmed a byte
or a word at a time in a random access fashion, it must be erased a "block" at a time. This generally sets all bits in the block to 1. Starting with a freshly erased block, any location within that block can be
programmed. However, once a bit has been set to 0, only by erasing the entire block can it be changed back to 1. In other words, flash memory (specifically NOR flash) offers random-access read and
programming operations, but cannot offer arbitrary random-access rewrite or erase operations. A location can, however, be rewritten as long as the new value's 0 bits are a superset of the over-written value's For example, a nibble value may be erased to 1111, then written as 1110. Successive
writes to that nibble can change it to 1010, then 0010, and finally 0000. In practice few algorithms take advantage of this successive write capability and in general the entire block is erased and rewritten at once. Although data structures in flash memory cannot be updated in completely general
ways, this allows members to be "removed" by marking them as invalid.
Another limitation is that flash memory has a finite number of erase-write cycles. Most commercially available flash products are guaranteed to withstand around 100,000 writeerase-cycles, before the wear begins to deteriorate the integrity of the storage. The guaranteed cycle count may apply only to block zero (as is the case with TSOP NAND parts), or to all blocks (as in NOR). This effect is partially offset in some chip firmware or file system drivers by counting the writes and dynamically remapping blocks in order to spread write operations between sectors; this technique is called wear levelling. For high reliability data storage, however, it is not advisable to use flash memory that would have to go through a large number of programming cycles. This limitation is meaningless for 'read-only' applications such as thin clients and routers, which are only programmed once or at most a few times during their lifetime.
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While NOR memory provides an external address bus for read and program operations (and thus supports random-access); unlocking and erasing NOR memory must proceed on a block-by-block basis. With NAND flash memory, read and programming operations must be performed page-at-a-time while unlocking and erasing must happen in blockwise fashion.
Reading from NOR flash is similar to reading from random-access memory, provided the address and data bus are mapped correctly. Because of this, most microprocessors can use NOR flash memory as execute in place (XIP) memory, meaning that programs stored in NOR flash can be executed directly without the need to first copy the program into RAM. NOR flash may be programmed in a random-access manner similar to reading. Programming changes bits from a logical one to a zero. Bits that are already zero are left unchanged. Erasure must happen a block at a time, and resets all the bits in the erased block back to one. Typical block sizes are 64, 128, or 256 KB. Bad block management is a relatively new feature in NOR chips. In older NOR devices not supporting bad block management, the software or device driver controlling the memory chip must correct for blocks that wear out, or the device will cease to work reliably. The specific commands used to lock, unlock, program, or erase NOR memories differ for each manufacturer. To avoid needing unique driver software for every device made, a special set of CFI commands allow the device to identify itself and its critical operating parameters. Apart from being used as random-access ROM, NOR memories can also be used as storage devices by taking advantage of random-access programming. Some devices offer read-while-write functionality so that code continues to execute even while a program or erase operation is occurring in the background.
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For sequential data writes, NOR flash chips typically have slow write speeds compared with NAND flash.
NAND flash architecture was introduced by Toshiba in 1989. These memories are accessed much like block devices such as hard disks or memory cards. Each block consists of a number of pages. The pages are typically 512 or 2,048 or 4,096 bytes in size. Another limitation of NAND flash is data in a block can only be written sequentially. Number of Operations (NOPs) is the number of times the sectors can be programmed. So far this number for MLC flash is always one whereas for SLC flash it is four. NAND devices also require bad block management by the device driver software, or by a separate controller chip. SD cards, for example, includes controller circuitry to perform bad block management and wear leveling. When a logical block is accessed by high-level software, it is mapped to a physical block by the device driver or controller. NAND relies on ECC to compensate for bits that may spontaneously fail during normal device operation. This ECC may correct as little as one bit error in each 2048 bits, or up to 22 bits in each 2048 bits If ECC cannot correct the error during read, it may still detect the error. When doing erase or program operations, the device can detect blocks that fail to program or erase and mark them bad. The data is then written to a different, good block, and the bad block map is updated. When executing software from NAND memories, virtual memory strategies are often used: memory contents must first be paged or copied into memory-mapped RAM and executed there (leading to the common combination of NAND + RAM). A memory management unit (MMU) in the system is helpful, but this can also be accomplished with overlays. For this reason, some systems will use a combination of NOR and NAND memories, where a smaller NOR memory is used as software ROM and
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a larger NAND memory is partitioned with a file system for use as a nonvolatile data storage area.
NAND is best suited to systems requiring high capacity data storage. This type of flash architecture offers higher densities and larger capacities at lower cost with faster erase, sequential write, and sequential read speeds, sacrificing the random-access and execute in place advantage of the NOR architecture.
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FLASH MEMORY CAPACITY OF FLASH MEMORY
The capacity of flash chips generally follows Moore's Law because they are manufactured with many of the same integrated circuits techniques and equipment. Consumer flash drives typically have sizes measured in powers of two (e.g. 512 MB, 8 GB). This includes SSDs as hard drive replacements, even though traditional hard drives tend to use decimal units. Thus, a 64 GB SSD is actually 64 × 10243 bytes. In reality, most users will have slightly less capacity than this available, due to the space taken by file system metadata. In 2005, Toshiba and SanDisk developed a NAND flash chip capable of storing 1 GB of data using Multi-level Cell (MLC) technology, capable of storing 2 bits of data per cell. In September 2005, Samsung Electronics announced that it had developed the world’s first 2 GB chip. In March 2006, Samsung announced flash hard drives with a capacity of 4 GB, essentially the same order of magnitude as smaller laptop hard drives, and in September 2006, Samsung announced an 8 GB chip produced using a 40 nanometer manufacturing process. In January 2008 Sandisk announced availability of their 16 GB MicroSDHC and 32 GB SDHC Plus cards. But there are still flash-chips manufactured with low capacities like 1 MB, e.g., for BIOS-ROMs.
NAND flash memory cards are much faster at reading than writing. As a chip gets
worn out, its erase/program operations slow down considerably, requiring more retries and bad block remapping.
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Transferring multiple small files, smaller than the chip specific block size, could lead
to much lower rate The speed is sometimes quoted in MB/s (megabytes per second), or as a multiple of
that of a legacy single speed CD-ROM, such as 60x, 100x or 150x. Here 1x is equivalent to 150 kilobytes per second. For example, a 100x memory card
gives 150 KB x 100 = 15,000 KB/s = 14.65 MB/s.
64 GB Samsung Flash SSD drive
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FLASH MEMORY FUTURE OF FLASH MEMORY
The SD (Secure Digital) Memory Card
The next generation of flash memory storage - the SD (Secure Digital) Memory Card - is not only revolutionary, but will help dispel the confusion and make things easier for everyone.
The SD Memory Card will not just create a new industry standard, but will also
enable a whole new generation of consumer devices. The card is being jointly developed by Matsushita (best known for its Panasonic brand), SanDisk and Toshiba, leaders in consumer electronics and flash memory data storage products.
Flash storage technologies from Toshiba and SanDisk (Compact Flash and
Multimedia) already dominate the industry, making the SD Memory Card alliance a giant step towards a standard format for the future.
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What is it?
The SD Memory Card is a significantly improved upgrade to the existing Multimedia Card (see box-out for more details on uses and benefits). Weighing just 2 grams and no bigger than a postage stamp, it has been designed with security, data protection, and expandability in mind.
A 32 MB SD Memory Card can store up to 23,250 double-spaced pages of text or over seven hours of voice messages. The 64 MB SD Memory Card will store over one hour of MP3 music.
Application of SD memory Using SD Memory Card devices, users will be able to securely download and pay for
music from the Internet.
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Also, because the card uses solid-state flash memory, music players will never suffer sound deterioration or skip like CD players.
Cell phones and Smart Phones
Major telecom companies are expected to support SD Memory Card as it offers both mobile phones and the coming generation of Smart Phones PDA and mobile phone facilities) much greater performance, capacity and security. For instance, the extra capacity will allow phones to be equipped with Global Positioning Software (GPS), letting users find their way around any city and also locate any number of amenities. Computer World is running a story about the future of laptops. Apparently, both Apple and LG are planning to release laptops using flash memory devices instead of hard drives.
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FLASH MEMORY CONCLUSION
1. Flash memory is a non-volatile computer memory that can be electrically erased
and reprogrammed. It is a technology that is primarily used in memory cards and USB flash drives for general storage and transfer of data between computers and other digital products.
No power is needed to maintain the information stored in the chip. In addition, flash
memory offers fast read access times and better kinetic shock resistance than hard disks.
Flash memory is used for easy and fast information storage in computers, digital
cameras and home video game consoles. It is used more like a hard drive than as RAM. In fact, flash memory is known as a solid state storage device, meaning there are no moving parts -- everything is electronic instead of mechanical.
Ordinary transistors are electronic switches turned on or off by electricity—and that's
both their strength and their weakness. It's a strength, because it means a computer can store information simply by passing patterns of electricity through its memory circuits.
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BIBLIOGRAPHY 1. How stuff works 2. Wikipedia 3. Microcontroller based books 4. Digital electronics(A. Anand Kumar)
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