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					                 LHCb RICH L0 Production Readiness Review



                        Analogue Pilot Testing

                                   Andrew S. Powell

                  Sub-Department of Particle Physics, University of Oxford

                             Email: a.powell1@physics.ox.ac.uk

                                       June 2005




1    Introduction
The LHCBPIX1 chip, or Pixel chip, incorporates 42 8-bit internal DACs which provide
a variety of voltage and current biases to the analogue and digital circuitry within the
chip [1]. All of these DACs are configurable via the chips JTAG interface and must be
biased externally with two precise and stable voltage references, which are referred to as
DAC REF VDD and DAC REF MID. In addition, two more pairs of external reference
voltages are needed to provide full functionality to the Pixel chip. The second pair of
reference voltages, GTL REFa and GTL REF, are necessary to set the thresholds for
the GTL logic I/O pads on the Pixel chip; two separate references are required such
that one can be supplied to the analogue and the other to the digital section of the
chip. For test purposes, the Pixel chip is capable of injecting a small test pulse into the
pre-amplifier of the analogue front-end for each of its 8192 pixel cells. The test pulse is
generated by a voltage step applied across an internal capacitor. The size of the voltage
step is controlled by the final pair of external reference voltages, analogue test hi and
analogue test lo.

    For the 2 Pixel chips connected to each of the RICH Level 0 front-end boards, the
external references are supplied by 6 8-bit DACs located on a CERN developed ASIC
called the Analogue Pilot chip. The Analogue Pilot is a mixed-mode IC developed with
Hardening By Design (HBD) techniques to improve radiation tolerance. It is designed for
use explicitly with the LHCbPIX1 chip or the ALICE1LHCb chip which will be used in
the ALICE experiment. The chip contains, as shown in Figure 1, the following circuitry
blocks:

    - 6 8-bit DACs to provide the reference voltages mentioned above for the Pixel chip

    - A 16-input analogue multiplexer followed by a 10-bit JTAG controllable ADC

    - A band-gap reference which provides a reference voltage to the other on-chip ref-
      erence circuits, independent of temperature and power supply variations

    - A reference circuit which provides the necessary references to the 6 DACs

    - A reference circuit which provides the necessary references to the on-chip ADC


                                             1
- 4 current sources; 2 for Alice mode and 2 for LHCb mode. These are used for
  temperature monitoring with a Resistive Temperature Device (RTD) such as the
  PT1000 . The current sources are designed to be independent of temperature and
  and power supply variations

- A current sensing stage which has the aim of reading out the Pixel chips current
  DAC outputs

- A JTAG-controlled digital block [2] which provides all the necessary digital signals
  to the other blocks




                Figure 1: Block Diagram of the Analogue Pilot




                                        2
    The 6 Pixel chip reference voltages are supplied by the following Analogue Pilot DACs
listed in Table 1.


    Table 1: An overview of the 6 Analogue Pilot DACs detailing their correspond-
    ing Pixel Chip Input and their dynamic ranges

                                                 DAC Property
                          Corresponding         Nominala      Minimumb      Maximumc
    Pilot DAC            Pixel Chip Input      Voltage (V)    Voltage (V)   Voltage (V)
    DRHI                 DAC REF VDD                1.77         1.52          2.10
    DRMID                DAC REF MID                0.97         0.83          1.13
    GTLA                    GTL REFa                0.78         0.64          0.92
    GTLD                     GTL REF                1.04         0.88          1.21
    TESTHI               analogue test hi           1.16         1.00          1.35
    TESTLOW               analogue test lo          0.97         0.82          1.14
      a Corresponding to a JTAG register code of 10000000
                                                          2
      b Corresponding to a JTAG register code of 00000000
                                                          2
      c Corresponding to a JTAG register code of 11111111
                                                          2




    The chips internal ADC is a 10-bit successive approximation ADC used for the conver-
sion of DC or slow-varying signals. As shown in Figure (1) a 16-to-1 analogue multiplexer
and buffer sit in front of the ADC. This then enables 16 different signals to read; the 6
on-chip DACs, the digital and analogue power supplies of the Pixel chip, the output of
the Pixel Chip voltage (DACPCV) and current (DACPCI) DACs, the two temperature
sensing elements and four other possible signals.




                                                3
2     Chip Testing
2.1     Diagnostic & Characterisation Tests
The two RICH sub-detectors are designed such that the upstream detector, RICH1, will
use 196 HPDs whilst the downstream detector, RICH2, will have 288. This, therefore,
means there will be a total of 242 Level 0 front-end boards needed in the experiment,
each using a single Analogue Pilot chip. Since it is inevitably that some of the chips pro-
duced will not be fully functional, a batch of approximately 500 radiation hard packaged
chips were manufactured. Assuming a standard yield of roughly 60%, one would expect
to have about 300 fully functional chips from this batch. It is obvious that some form of
test is necessary to identify the ‘bad’ chips and insure only fully functioning Analogue
Pilots are populated on to the final RICH Level 0 front-end boards.

    Tests performed on prototypes of the Analogue Pilot demonstrated that the behav-
iour of the DAC outputs were very similar to the simulated behaviour. However, it was
discovered that the absolute spread from chip to chip, for a given DAC register value, was
between 10 and 20mV for all DACs except DRHI. DRHI had a larger absolute spread
of 47mV[3]. Since the bias voltages supplied by the Analogue Pilot DACs need to be
precisely known to ensure accurate operation of the Pixel chip, it was deemed necessary
to characterise each chip. This characterisation data can then be stored in a calibration
database where the voltage output for each DAC at a given register value is known.

    Since the 6 DAC output signals can be measured internally by the chips ADC, it
should be possible in theory to perform an auto-calibration of the DACs on-chip. The
prototype testing showed that this can indeed be done although only up to an accuracy
of several millivolts. Again, since the voltages supplied by the DACs needs to be precisely
known, a chararcterisation test on each chip needed to be performed.


Thus, the two main requirements of the test were:

    1. Identify chips that are not fully functional

    2. Test all functionality of working chips and characterise all signals

2.1.1     Test Set-Up
2.1.1.1    Test Board
In order to test all 500 Analogue Pilot chips, a purpose built readout board was
required that enabled a chip to be easily seated and removed between tests. The board
needed to allow all the Pilot’s analogue I/O signals to be either supplied or read by an
external device, such as a Digital Multi-Meter (DMM), as well as provide access to the
chips digital JTAG interface. Such a readout board was designed and built by the HEP
Electronics Group at Imperial College London. It features an Evertech Chip socket
which provides the facility to mount and remove a chip by hand, and a series of 3 plugs
which provide access to all the chip’s analogue and digital signals.

2.1.1.2    DMM
The DMM used to read and supply all the necessary analogue signals was the Agilent
34970A Data Acquisition/Switch Unit. It is a very versatile device since it can take
direct measurements of many quantities, but the only ones used in this application were
DC voltages, resistances and voltages across thermocouples. It is also capable of

                                              4
outputting voltages between 0 and +12V. This DMM was particularly useful since it
could be programmed remotely from a PC via a GPIB Interface. This then enabled a
complete computer run Data Acquisition System (DAQ) to be designed for the testing
routine of the Analogue Pilot chip.

2.1.1.3    JTAG Controller Box
The digital signals controlling the chips JTAG interface were generated by a controller
box manufactured by JTAG Technologies. C++ libraries which are part of the product,
enable high level commands controlling the JTAG signals to be made in standard C++
programs run on a PC. Communication between the PC and the controller box is
performed over the PC’s printer port using standard parallel port protocol.

2.1.2     DAQ Software
The entire DAQ was centrally controlled by a PC running Object Orientated (OO)
software written in C++. The program run to test the entire functionality of the
Analogue Pilot performed the following tasks:

   - Read the chips JTAG ID code (0x12011973)

   - Measure the ambient temperature via a thermocouple connected to the DMM

   - Measure the voltage of the internal ADC’s references, the Band Gap and the four
     temperature lines

   - Measure the resistance of the trans-impedance resistor within the current sensing
     stage

   - Measure the chips DAC bias voltages and the three power supply voltages; vdd,
     vddd and avdd

   - Perform a scan of the chips DAC JTAG registers and record the analogue values
     driven off chip and the digital values stored by the ADC after each increment

   - Increment the input current DACPCI onto the chip from -40µA to +40µA in
     increments of 20µA and record the value of the converted voltage measured by
     the ADC after each increment

   - Record the ADC output values for all 16 multiplexed inputs whilst the DAC
     registers are set to zero.

   - Increment the input voltage DACPCV onto the chip from approximately 0.5V to
     1.9V in increments of 0.16V and record the value measured by the ADC after
     each increment

NB. All measurements of the chips ADC values involved performing at least 5 repeat
measurements and then taking the average value as the result.

2.1.3     Analysis Software
In order to determine if a chip was fully functional, the data generated during the test
routines needed to be converted into graphical plots. This was achieved by developing
macros to run under ROOT, the OO data analysis environment. For each chip, 4 sets
of linearity plots were generated with corresponding best fit lines. The plots were:



                                           5
                - A set of 6 graphs, one for each DAC, displaying the analogue voltage profiles
                  recorded by the DMM during the complete scan of the DAC registers

                - A set of 6 graphs, one for each DAC, displaying the corresponding analogue
                  voltage profiles recorded by the on-chip ADC during a complete scan of the DAC
                  registers

                - A graph displaying the corresponding analogue voltages as recorded by the
                  on-chip ADC for the 5 different DACPCI currents supplied during the test

                - A graph displaying the ADC count as recorded by the on-chip ADC for the 10
                  different DACPCV voltages supplied during the test

Chips which demonstrate extreme non-linear behaviour in any of these plots are defined
as non-functioning and rejected. An example of such behaviour is shown in Figure 8 on
page 11. However, ‘dead’ chips are generally immediately identifiable by not having a
working JTAG interface, i.e. the chips JTAG ID number can not be read back.

2.1.4                        Results
Typical examples of the 4 sets of linearity plots are shown in Figures 2, 3 and 4.

            TESTLOW                              χ 2 / ndf        0.07377 / 254        TESTHI                                   χ 2 / ndf       0.008916 / 254      GTLA                                      χ2 / ndf     0.0007702 / 254

                                                 Gradient0.001156 ± 1.444e-05                                                   Gradient0.001333 ± 5.021e-06                                                  Gradient0.001038 ± 1.476e-06

                      1.15                       Offset      0.8342 ± 0.002128                                                  Offset      1.005 ± 0.0007399                                                 Offset     0.643 ± 0.0002175
                                                                                                     1.35
                                                                                                                                                                                     0.9
                       1.1
                                                                                                      1.3
                                                                                                                                                                                    0.85
                      1.05
   Output Voltage V




                                                                                  Output Voltage V




                                                                                                                                                                 Output Voltage V



                                                                                                     1.25

                                                                                                      1.2                                                                            0.8
                         1


                      0.95                                                                           1.15                                                                           0.75

                                                                                                      1.1
                       0.9                                                                                                                                                           0.7
                                                                                                     1.05
                      0.85
                                                                                                                                                                                    0.65
                                                                                                        1
                         0    50    100    150     200         250                                      0    50    100    150     200         250                                      0   50    100    150     200       250
                                   DAC Register Value                                                             DAC Register Value                                                            DAC Register Value
      GTLD                                       χ / ndf
                                                  2
                                                                 0.001944 / 254          DRMID                                  χ / ndf
                                                                                                                                 2
                                                                                                                                                0.001233 / 254       DRHI                                     χ / ndf
                                                                                                                                                                                                               2
                                                                                                                                                                                                                             0.03782 / 254

                                                        0.001218 ± 2.344e-06
                                                 Gradient                                                                       Gradient0.001196 ± 1.867e-06                                                  Gradient0.002227 ± 1.034e-05

                                                 Offset      0.8942 ± 0.0003455
                                                                                                     1.15                       Offset      0.8176 ± 0.0002751                                                Offset      1.508 ± 0.001524

                       1.2                                                                                                                                                           2.1
                                                                                                      1.1
                      1.15                                                                                                                                                            2
                                                                                                     1.05
   Output Voltage V




                                                                                  Output Voltage V




                                                                                                                                                                 Output Voltage V




                       1.1                                                                                                                                                           1.9
                                                                                                        1
                      1.05                                                                                                                                                           1.8
                                                                                                     0.95
                         1
                                                                                                                                                                                     1.7
                                                                                                      0.9
                      0.95
                                                                                                                                                                                     1.6
                                                                                                     0.85
                       0.9
                                                                                                      0.8                                                                            1.5
                         0    50    100    150     200         250                                       0   50    100    150     200         250                                      0   50    100    150     200       250
                                   DAC Register Value                                                             DAC Register Value                                                            DAC Register Value




                                    Figure 2: Output voltage scans of the 6 Analogue Pilot DACs




                                                                                                                        6
            TESTLOW                                                χ 2 / ndf       0.002845 / 254         TESTHI                                                                    2
                                                                                                                                                                                   χ / ndf       0.005519 / 254      GTLA                                         χ2 / ndf      0.006491 / 254

                                                                   Gradient0.001171 ± 2.836e-06                                                                                    Gradient 0.001344 ± 3.95e-06                                                   Gradient 0.001221± 4.284e-06
                         1.15                                      Offset        0.831 ± 0.000418                                                                                  Offset     1.003 ± 0.0005821                                                   Offset     0.894 ± 0.0006313
                                                                                                                        1.35                                                                                                          1.2
                                    1.1
                                                                                                                         1.3
                                                                                                                                                                                                                                     1.15
                         1.05
   Output Voltage V




                                                                                                     Output Voltage V




                                                                                                                                                                                                                  Output Voltage V
                                                                                                                        1.25
                                                                                                                                                                                                                                      1.1
                                      1                                                                                  1.2
                                                                                                                                                                                                                                     1.05
                         0.95                                                                                           1.15
                                                                                                                                                                                                                                        1
                                                                                                                         1.1
                                    0.9
                                                                                                                                                                                                                                     0.95
                                                                                                                        1.05
                         0.85
                                                                                                                                                                                                                                      0.9
                                                                                                                           1

                                      0         50    100    150     200          250                                      0         50     100    150     200                                  250                                     0    50    100    150     200         250
                                                     DAC Register Value                                                                    DAC Register Value                                                                                     DAC Register Value
      GTLD                                                         χ / ndf
                                                                    2
                                                                                   0.005101 / 254           DRMID                                                                  χ / ndf
                                                                                                                                                                                    2
                                                                                                                                                                                                 0.003697 / 254       DRHI                                        χ / ndf
                                                                                                                                                                                                                                                                   2
                                                                                                                                                                                                                                                                                 0.00418 / 179

                                                                          0.001038 ± 3.798e-06
                                                                   Gradient                                                                                                        Gradient0.001197 ± 3.233e-06                                                   Gradient0.002047 ± 6.894e-06
                                                                                                                        1.15
                                                                   Offset      0.6436 ± 0.0005596                                                                                  Offset    0.8163 ± 0.0004764                                                   Offset     1.523 ± 0.0007174
                                                                                                                                                                                                                                      1.9
                                    0.9
                                                                                                                         1.1
                                                                                                                                                                                                                                     1.85
                         0.85                                                                                           1.05
                                                                                                                                                                                                                                      1.8
   Output Voltage V




                                                                                                     Output Voltage V




                                                                                                                                                                                                                  Output Voltage V
                                    0.8                                                                                    1                                                                                                         1.75

                                                                                                                        0.95                                                                                                          1.7
                         0.75
                                                                                                                                                                                                                                     1.65
                                                                                                                         0.9
                                    0.7                                                                                                                                                                                               1.6
                                                                                                                        0.85
                                                                                                                                                                                                                                     1.55
                         0.65
                                                                                                                         0.8
                                                                                                                                                                                                                                      1.5
                                      0         50    100    150     200          250                                      0         50     100    150     200                                  250                                      0   50    100    150     200         250
                                                     DAC Register Value                                                                    DAC Register Value                                                                                     DAC Register Value




Figure 3: Output voltage scans of the 6 Analogue Pilot DACs read back by the on-chip
ADC




                      DACPCI                                                                    χ2 / ndf                           6.189e-06 / 3                 DACPCV                                                                                χ2 / ndf              30.08 / 8
                                                                                                Gradient -0.008908 ± 2.822e-05                                                                                                                         Gradient 733.8 ± 1.521
                                          1.7                                                   Offset                         1.302 ± 0.0007867                                                                                                       Offset      -374.7 ± 1.958
                                                                                                                                                                                  1000
                                      1.6
                                                                                                                                                       ADC Digital Output Value
          Voltage Output of ADC V




                                      1.5                                                                                                                                          800

                                      1.4
                                                                                                                                                                                   600
                                          1.3

                                          1.2                                                                                                                                      400

                                          1.1
                                                                                                                                                                                   200
                                           1

                                          0.9                                                                                                                                           0
                                                -40 -30 -20 -10 0 10 20 30 40                                                                                                                      0.6 0.8  1   1.2 1.4 1.6 1.8                                                  2
                                                  DACPCI Analogue Input Current uA                                                                                                                  DACPCV Analogue Input Voltage V


              Figure 4: The DACPCI and DACPCV signals as measured by the on-chip ADC


As Figure 3 shows, the DAC signals read back via the on-chip ADC incorporate some
degree of noise. After a thorough investigation, this noise was deduced to be a result of
a bad digital grounding plane on the readout board and not a problem with the
Analogue Pilot. This was confirmed by performing the same test on the Analogue Pilot
when it was mounted on the Level 0 board. As shown in Figure 5, the DAC signals
read back by the ADC for the same chip that the plots in Figures 2 and 3 were
generated from are now noise free and in good agreement with the analogue profiles
read off chip in Figure 2.


                                                                                                                                                   7
                 TESTLOW                                 χ 2 / ndf   5.7e+04 / 254           TESTHI                                        χ2 / ndf   1.358e+05 / 254       GTLA                                             χ2 / ndf   8.223e+04 / 254

                                                         Gradient 0.872 ± 0.01277                                                          Gradient 0.9889 ± 0.01971                                                         Gradient 0.8993 ± 0.01534
                                                         Offset      233.5 ± 1.886                                                         Offset        362.9 ± 2.91                                                        Offset         282 ± 2.265

                              450                                                                                                                                                                  500
                                                                                                                 600

   ADC Digital Output Value




                                                                                      ADC Digital Output Value




                                                                                                                                                                        ADC Digital Output Value
                              400                                                                                550                                                                               450


                              350                                                                                500                                                                               400


                                                                                                                 450
                              300                                                                                                                                                                  350

                                                                                                                 400
                              250                                                                                                                                                                  300

                                                                                                                 350
                                0     50    100    150     200       250                                            0   50    100    150     200       250                                            0   50    100    150     200       250
                                           DAC Register Value                                                                DAC Register Value                                                                DAC Register Value
        GTLD                                             χ / ndf
                                                          2
                                                                     1.01e+04 / 254              DRMID                                     χ / ndf
                                                                                                                                            2
                                                                                                                                                      5.211e+04 / 254         DRHI                                           χ / ndf
                                                                                                                                                                                                                              2
                                                                                                                                                                                                                                         5.61e+05 / 179

                                                         Gradient0.7699 ± 0.005374                                                         Gradient 0.8809 ± 0.01221                                                         Gradient   1.454 ± 0.08053
                                                                                                                                                                                                   1050
                                                         Offset      95.86 ± 0.7936                                                        Offset       222.9 ± 1.803                                                        Offset         739 ± 8.404
                              300
                                                                                                                 450
                                                                                                                                                                                                   1000
   ADC Digital Output Value




                                                                                      ADC Digital Output Value




                                                                                                                                                                        ADC Digital Output Value
                              250                                                                                400
                                                                                                                                                                                                   950


                                                                                                                 350                                                                               900
                              200

                                                                                                                                                                                                   850
                                                                                                                 300
                              150
                                                                                                                                                                                                   800
                                                                                                                 250
                              100                                                                                                                                                                  750

                                0     50    100    150     200       250                                           0    50    100    150     200       250                                            0   50    100    150     200       250
                                           DAC Register Value                                                                DAC Register Value                                                                DAC Register Value




Figure 5: A repeat of the DAC scan shown in Figure 3 but performed on the L0 board


2.2                                 Temperature Behaviour
As mentioned in section 1 the Analogue Pilot incorporates current sources that, when
used with a PT1000 RTD, enables the device to monitor temperature through the
on-chip ADC. In LHCb mode the nominal value for the current is 1.3 mA although this
value can vary between chips due to process variations. This again means that this
feature needs to be calibrated for each chip. Demonstrations that this chip feature
works had previously only been performed by simulating the varying PT1000 resistance
by connecting resistances of known values to the temperature sensing lines. As part of
these investigations in Oxford, a PT1000 sensor was connected on to the readout board
used through out these tests and the entire board was placed in an environmental
control chamber. The temperature within the chamber was then incremented in steps
of 2 ◦ C from 20 to 40 ◦ C. At each 2 degree interval, the test routine stated in section
2.1.1 was run on the chip with a slight modification to the reading of the temperature
line through the ADC; 30 repeat measurements of the PT1000 line were performed by
the on-chip ADC but only mean values with standard deviations less than 2 would be
acceptable. If a mean ADC count was recorded with a standard deviation greater than
2, then the test routine would take another 30 repeat measurements until the standard
deviation was acceptable. An acceptable standard deviation was generally obtained
within 10-20 iterations.




                                                                                                                                   8
     PT1000 Line Read by Pilot ADC                     χ2 / ndf         35.22 / 21
                                                       Gradient   3.052 ± 0.05011
                                                       Offset       678.1 ± 1.414
                800

                790

                780
    ADC Value




                770

                760

                750

                740

                730
                      20      25          30           35               40
                               Temperature / degrees C

Figure 6: The measurements of the on-chip ADCs conversion of the PT1000 line at
elevated temperatures


Figure 6 shows the mean ADC value and its standard deviation for the 30 repeat
measurements at temperatures between 20 and 40 ◦ C. It should be noted that the error
within the temperature is too small to be seen. The plot demonstrates that it should
be possible to measure the temperature accurately to within 1 ◦ C using the Analogue
Pilot/PT1000 combination.

A reassuring thing to note about the fitted straight line is that the offset of 678 ADC
counts, equal to the extrapolated number of ADC counts at 0 ◦ C, is equivalent to 1.43V.
Since in LHCB mode the current source for this line 1.3mA, it predicts the PT1000
resistance to be 1100 Ω. This is close to the devices actual calibrated value of 1000 Ω.

In addition to testing the performance of the Analogue Pilot with the PT1000, the
testing of the chip at elevated temperatures is also necessary to determine any
temperature dependence in the chips I/O signals. This is especially important for the
output voltages of the DACs which control the reference levels of the Pixel chip. Such
tests had been performed on un-packaged prototypes of the chip [4] but no such tests
had been performed on the packaged chips intended for use on the Level 0 boards.
Therefore, as part of this investigation, these tests were performed as well and are
displayed in Figure 7.




                                           9
Figure 7: The variation in DAC output voltages at a constant DAC register value of 125
with temperature


Figure 7 demonstrates that at the 0.1V range there is very little variation in any of the
DACs outputs with temperatures. The absolute variation in these lines is summarised
in Table 2.


                        DAC Name        Voltage Change (mV)
                           DRHI                  14.890
                          DRMID                   5.784


                           GTLA                   2.654
                           GTLD                   3.930


                         TESTHI                   5.880
                        TESTLOW                   5.059

Table 2: The voltage change seen in the DACs for a register value of 125 and between
22.2 and 39.2 ◦ C

These results show a slightly smaller variation than was seen in the original tests
mentioned in [4], but both sets of results agree that DRHI has the greatest variation
with a voltage decrease of approximately 15mV over a temperature difference of 20 ◦ C.
Since the Pixel chip reference voltages need to be accurately known for optimal
operation of the Pixel chip, it was a concern that this variation in DRHI with
temperature might be problematic. However, a test has been performed to simulate
this variation in the Pixel chips reference lines DAC REF VDD and DAC REF MID
which are supplied by the Analogue Pilot DACs DRHI and DRMID. It transpires that


                                           10
the critical quantity for the Pixel chip is the difference between these two references
which means the effect on the chips operation is not as troublesome as first thought.
The variation in this differential signal is then only of the order of 9mV. The simulation
showed that the resulting change in the Pixel chip’s pixel threshold, due to this 9mV
variation, was well accommodated within the safety margin already imposed on this
quantity. It is therefore agreed that there will be no degradation in performance of the
Pixel chip due to the temperature variations of the Analogue Pilot’s DAC outputs.

So far only one Analogue Pilot chip has been thoroughly tested in the manner described
above. However, it is intended that 5 chips in total (10% of batch) will be tested in this
way to hopefully confirm the temperature behaviour between chips is identical.


3                       Situation So Far
So far, 23 Analogue Pilot chips have undergone the test described in section 2.1.1 at
constant room temperature. Three of these chips were identified as not fully functional;
two chips had dis-functional JTAG interfaces whilst the other displayed extreme
non-linearity in two of its DAC signals as shown in Figure 8 . It is intended in the next
few weeks to begin testing of the remaining 500 chips.

             TESTLOW                             χ2 / ndf         0.002144 / 254         TESTHI                                   χ2 / ndf          0.02272 / 254      GTLA                                      χ2 / ndf          0.1254 / 254

                                                 Gradient   7.968e-05 ± 2.462e-06                                                 Gradient -0.0002352 ± 8.015e-06                                                Gradient 0.0007182 ± 1.883e-05
                                                                                                                                                                                          1
                                                 Offset       0.8633 ± 0.0003628                                                  Offset        0.9437 ± 0.001181                                                Offset       0.7776 ± 0.002775
                       0.88
                                                                                                       0.96

                 0.875                                                                                                                                                                 0.95
                                                                                                       0.95
    Output Voltage V




                                                                                    Output Voltage V




                                                                                                                                                                    Output Voltage V



                                                                                                       0.94
                       0.87
                                                                                                                                                                                        0.9
                                                                                                       0.93
                 0.865
                                                                                                       0.92
                                                                                                                                                                                       0.85
                       0.86                                                                            0.91

                                                                                                        0.9                                                                             0.8
                 0.855
                                                                                                       0.89
                          0   50    100    150     200         250                                         0   50    100    150     200         250                                       0   50    100    150     200        250
                                   DAC Register Value                                                               DAC Register Value                                                             DAC Register Value
       GTLD                                      χ / ndf
                                                  2
                                                                 0.001408 / 254            DRMID                                  χ / ndf
                                                                                                                                   2
                                                                                                                                                  0.001113 / 254        DRHI                                      2
                                                                                                                                                                                                                 χ / ndf         0.04843 / 254

                                                        0.001229 ± 1.995e-06
                                                 Gradient                                                                         Gradient0.001168 ± 1.774e-06                                                   Gradient 0.002355 ± 1.17e-05

                                                 Offset      0.8814 ± 0.000294                                                    Offset     0.8002 ± 0.0002615                         2.2                      Offset       1.539 ± 0.001724
                        1.2                                                                             1.1

                                                                                                                                                                                        2.1
                       1.15                                                                            1.05

                                                                                                                                                                                         2
    Output Voltage V




                                                                                    Output Voltage V




                                                                                                                                                                    Output Voltage V




                        1.1
                                                                                                          1

                       1.05                                                                                                                                                             1.9
                                                                                                       0.95

                          1                                                                                                                                                             1.8
                                                                                                        0.9

                       0.95                                                                                                                                                             1.7
                                                                                                       0.85
                        0.9                                                                                                                                                             1.6
                                                                                                        0.8

                          0   50    100    150     200         250                                        0    50    100    150     200         250                                       0   50    100    150     200        250
                                   DAC Register Value                                                               DAC Register Value                                                             DAC Register Value




Figure 8: Output voltage scans of the 6 Analogue Pilot DACs for a chip demonstrating
extreme non-linear behaviour for DACs TESTLOW and TESTHI




                                                                                                                         11
References
[1] LHCBPIX1 Documentation: Draft 2
    Ken Wyllie, CERN, Oct 2002
    Website:
    http://kwyllie.home.cern.ch/kwyllie/LHCBPIX1 doc/LHCBPIX1 manual.pdf

[2] Specification of the digital control part of the analog pilot chip
    Alex Kluge, CERN, April 2002

[3] Roberto Dinapoli’s Thesis

[4] Charlotte Newby’s Prototype Tests
    Website: http://cnewby.home.cern.ch/cnewby/analogue pilot tests.htm




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