Semiconductor Modeling An Introduction Ryan McKenzie Hui Tan Ben Pullen Lei You Semiconductor Modeling Motivations Basic Procedure Example Simulations Available Tools and Services Resources List Motivation : It’s all about industry. The intent of integrated circuit fabrication is to produce a wafer with specific electrical and mechanical characteristics, usually in the form of electronic circuits or chips, via some number of processing transformations. Accurate Modeling does the following: Cuts Cost Cuts Development Time Allows Producers to Compete on the “Cutting Edge” Procedure: How the real work gets done. Pick Appropriate Conduction Equations Augment With Conductor Property Data Isolate “Interesting” Variables Discretize Resultant System Apply Schrödinger-Poisson Cycle Use Converged Resultant Data to: PlotRelevant Data Points (2D or 3D) Produce Visual Representation Summary of Basic Semiconductor Equations Discretization Select Points to Populate Fine Grid System Solving Points All Points within Range Space and Appropriate Boundary Conditions Reduce the Grid Resolution for Courser Sub-Grids if Necessary Schrödinger-Poisson Cycle Solve Current Grid with Schrödinger Equations Apply a Poisson Solution to Resultant Grid Having a Decomposed Domain Continue Until Convergence is Achieved Example Simulation Gate-All-Around Transistor – a base level electronic device that is useful for its ability to collect an electrical signal and output an amplified version of that signal. Optimum Thickness ( 2D ) The goal of this simulation is to map the relationship between conductive film thickness of the device to electron concentration at the output region. The simulation is done in a software package called ATLAS, so the appropriate equations are automatically selected based on the desired output variables you chose. Device Characteristics Substrate = Silicone Dioxide Conductor = Graphite (Carbon) ATLAS substitutes in appropriate constants for electric permeativity and relative conductivity. More Device Characteristics Gate Thickness: 25nm Silicon Film Thickness: 1.5nm to 20nm Doping: 1x10^18 cm^-3 Schrödinger-Poisson Steps: Automatic in ATLAS (OH YEAH!!!) ATLAS solves the one dimensional Schrödinger's equation along a series of slices across the device. Each slice is taken along an existing set of grid points in the device mesh. Carrier concentrations calculated from this are substituted into the charge part of the Poisson's equation. The potential derived from this is substituted back to Schrödinger's equation. This solution process continued until a self-consistent solution of Schrödinger's and Poisson's equation is obtained. What Does it All Mean? The Domain of Possible Solutions are Cyclically Decomposed Until the Unique and Continuous solution is determined. Think of it as a Glorified Process of Elimination. The Pretty Results Electron Concentration with base device characteristics. The Pretty Results Continued Electron Concentration with variable silicone sheet thickness. Some Other Pretty Results Random Examples of Semiconductor Modeling Results Potential Difference Around a Parallel Plate Capacitor Electrostatic Difference in a Conductive Box (3 sides grounded, 1 side charged) Heat Diffusion Along a Finned Box Containing a Specified Circuit Device Electron Diffusion Into a Substrate Resources http://www.cae.wisc.edu/~hitchon/ http://www-mtl.mit.edu/CIDM/papers/generic-process- model/generic-process-model.html http://www.sauna.com/ http://www.celestry.com/ http://www.semiseek.com/Pag00011.htm http://www.ecse.rpi.edu/homepages/shur/1.3/1-3.html http://www.cerfacs.fr/algor/reports/2001/TR_PA_01_51. pdf http://www.scicomp.ucsd.edu/~mholst/codes/pmg/ http://nina.ecse.rpi.edu/shur/SDM1/Notes/Index.htm http://www.britneyspears.ac/ (NOT A JOKE) Integrated Circuit Etching IC Etching Topics What is it? How was it done? How is it done? How does it relate to CS521? IC Etching Integrated circuit starts as a wafer of silicon (picture on the left.) We want to etch a trench into the wafer to create a transistor. IC Etching A mask is placed over the silicon to act as a stencil for our etching technique. The desired effect is a square, uniform trench. IC Etching Foryears, etching was done with liquid chemicals. This process is "directionally blind" -- that is, when liquids move on a surface, their direction cannot be controlled. IC Etching As chip architectures were reduced in size, gate and trench sizes had to be reduced to match. As the trenches are reduced in size, the importance of precise, uniform, and square etching grows dramatically. IC Etching accomplished Modern silicon etching is through a technique known as “Plasma Etching.” Plasma-based etching is done in plasma chemical reactors consisting of a vacuum chamber, power supply, and gas handling system. IC Etching The gas-phase chemical compounds are separated into neutral fragments, positive and negative ions, and electrons. Some of the neutral fragments of the plasma react with the material in the trench to produce a protective film. Ions bombard the wafer surface vertically -- thus removing the protective film on the horizontal surface, but not on the sidewall. IC Etching A short film: http://www.nas.nasa.gov/Main/Features/2 000/Fall/plasma_flash.html IC Etching Problems with this model? IC Etching Cost, It is very expensive to slowly etch a perfectly square trench. We need a techniques that produce quality results quickly. IC Etching And Us A software package entitled SPELS has been developed to aid in the modeling of the etching process on high performance computers. IC Etching Trench etching is done in a machine called a reactor; etch rates depend on reactor conditions such as operating power and gas pressure, as well as material properties of the wafer and reacting gases used. IC Etching Using theSPELS code, scientists can manipulate these factors to find the best conditions for creating ideal etch profiles. Etching References http://www.nas.nasa.gov/Main/Features/ 2000/Fall/plasma.html http://www.nas.nasa.gov/Main/Features/ 2000/Fall/plasma_flash.html http://www.che.caltech.edu/faculty/kpg/k pg.html http://www.aip.org/tip/INPHFA/vol-2/iss- 1/p26.pdf SEMICONDUCTOR PROCESS MODELING Why need semiconductor modeling? It’s a computational modeling. What is computational modeling? Evaluation and optimization of various design is possible, without resorting to costly and time-consuming trial fabrication and measurement steps. Provides valuable insight into important physical quantities. Shortened development cycles. Reduced cost. Increased quality and reliability of final products. A important field of computational modeling related to semiconductor manufacturing belongs to process modeling. Semiconductor Modeling Process Modeling -- In technology development phase -- In technology characterization phase Device Modeling Circuit Modeling Semiconductor Process Modeling The aim of process modeling: Predict geometries and material properties of the wafer structures and semiconductor devices as they result from the manufacturing process. Semiconductor Process Modeling … Two traditional branches Wafer to’pography modeling Bulk process modeling Semiconductor Process Modeling … Two steps Physical Modeling Discrete Modeling Physical Modeling What is the physical modeling? A hierarchy of physical model -- Bottom: derived from principles using mechanisms of atomic level or fundamental laws -- Top: simple analytical models -- Middle: allow a tradeoff of model generality for their simplicity Mathematical form: systems of non- linear PDEs or by algorithms Sub-models of Physical Model Photolithography Etching and Deposition Ion Implantation Bulk Particle Transport Mechanical Deformation Photolithography Lithography process Photolithography technology Factors that the model must account for -- light intensity distribution in the photoresist film -- chemical reaction that changes photoresist etching properties -- resulting photoresist profile after dvelopment Etching and Deposition The formation of multilayer wafer structure The role of physical model in this process is to relate the propagation velocity of the surface to material properties and processing conditions. Process techniques used for Etching and Deposition range from isotropic chemical process to directional physical process. Most important model parameters Ion Implantation The Ion Implantation process The process model concerns the distributions of stopped particles, the produced damage, and the energy The produced damage occurs when ions collide with a lattice atom and when they cause it to leave its original site in the lattice. Bulk Particle Transport One of the most important group of physical models is related to the transport of particles within the bulk region. The principal physical mechanism for particle transport is diffusion. But the governing equations for particle transport should also account for advection due to electric field and various chemical reactions among particles. Hierarchically organization: range from single species diffusion equations to complex coupled systems of diffusion-drift-reaction PDEs. Mechanical Deformation The models for mechanical deformation follows the evolution of the stress field in different material layers during manufacturing. Generally, the cumulative mechanical stress represents an important factor that could affect the reliability of semiconductor devices and the interconnection system. Discrete Modeling Principal task: generation and control of appropriate grid structures for arbitrarily shaped multilayer material domains and the derivation of the discrete analog of the governing mathematical description. The practical application of process modeling is enabled by simulation tools that integrate various physical and discrete models. Issues in Discrete Modeling the complete physical Subdivision of domain into small subdomains (cells). Two phases: discretization and solution of algebraic problem. Choosing Cells Methods of choosing structured and unstructured meshes Finite-Difference Method (FD) Finite-Volume Discretization (FV) Finite-Element Method (FE) How to select discretization method The final selection of the grid and the discretization method should depend on: Geometry of the domain The PDE (including boundary conditions) to be solved The coordinate system used to describe the continuous problem Grid-generation Technique Any grid-generation technique has to take care of problems arising from: strongly varying quantities multilayer devices geometrical singularities time-dependent structures These typical problems for process simulation and the desired efficiency automatically lead to the requirement of grid adaptation. Grid-generation Technique … As the mesh size cannot be determined in advance, the solution process on a given relatively coarse mesh has to provide the information about where to refine the mesh. Two ways of improving the accuracy -- increase the order of approximation -- decrease the local mesh size Within practically used design environments, the steps of grid generation, grid adaptation, and solution of the resulting systems of equations have to be performed automatically and without an interaction from outside. This is mandatory for technology computer-aided design (TCAD) where complete processing sequences are intended to be simulated. References 1. Semiconductor Process Modeling Wolfgang Joppich Wiley Encyclopedia of Electrical and Electronics Engineering 2. A General Semiconductor Process Modeling Framework Duane S. Boning, Michael B. McIlrath, Paul Penfield, Jr., and Emanuel M. Sachs Semiconductor Process Modeling in Future Trends State of technology the Semiconductor Industry Association Roadmap Monte Carlo simulation algorithms Interconnections The lack of accurate experimental verification The trends towards 3D The object-oriented programming approach The next-generation process simulation software State of technology Role: Semiconductor process modeling has become an essential technology in semiconductor industry. Impressive progress in process modeling has been achieved,but there is still much more potential to be exploited. State of technology Lack of predictive capabilities. The improved models, required for a new technology, usually are not available before the technology itself. The process modeling is required accelerate so that the application is more effective than at present . State of technology and future trends Process modeling has to provide general concepts, guidance,and insights at a very early stage of process or technology development for the engineers. The most important needs for future processing modeling is the Semiconductor Industry Association Roadmap. Semiconducter Industry Assosiation Roadmap the Semiconductor Industry Association Roadmap’s priorities are: -automatic grid-generation and adaptation algorithms. -Defect-mediated dopant profile evolution. -combined equipment and feature scale topography models. -2D and 3D doping profile measurement tools. -etch model predict ability . -Silicidation models. Great effect is directed towards 3D process simulation tools. Monte Carlo simulation algorithms Defect-based dopant models for implantation, diffusion,and activation must start with underlying first-principle calculation and characterization methods. Monte Carlo simulation algorithms will become increasingly important.because Monte Carlo method are inherently three- dimensional. Interconnections For the determination of the overall chip performance, interconnections have become as important as the active semiconductor devices. Interconnection technology includes dielectric and metal-film formation as well as the etch process. Interconnections The accurate evaluation of -the process variation, -their effects on the performance, -their effects on the reliability of interconnection. depends on : the integration of equipment ,feature-scale topography modeling of deposition,lithography,and etching. Interconnections Thisincludes a critical need for improved physical modeling of topography processes. The formulation of predictive models for deposition and etching is essential for the interconnect modeling These models are expected to have more improved statistical analysis methods and tools. The lack of accurate experimental verification The lack of accurate experimental verification is a important obstacle for process model development and model calibration that should be overcome in the future. The problem is even more emphasized with damage distribution that are induced by implantation and their evolution during subsequent annealing processes. (this phenomenon can’t be measured directly and is only verified indirectly by its effect on dopant distribution.) The lack of accurate experimental verification A better understanding of the physics of buck particle transport increasingly demands further improvements in metrology. The limitation in measurement technology severely hampers the development of accurate multi-domain process modeling tools. The trends towards 3D The trends towards 3D with more complex models leads to : -larger systems of coupled PDEs, -to more complex topologies, -to multilayer structures. This requires computing power provided in a ideal way by scalable parallel architecture. The trends towards 3D Parallelization is innovative technique ,it can be used for new algorithmic developments. A straightforward loop parallelization of initially sequential programs will be made on shared-memory machines. Grid partitioning is a typical approach to parallelize grid oriented PDE application. This technique is independent of the particular partial differential equation or system to be solved. The trends towards 3D Load balancing and locality should be taken into account for an efficient parallelization. All processors are responsible for approximately the same number of discrete equations and variables. The data structure should be more regular. For low communication cost the algorithm should offer a large amount of locality. The next-generation process simulation software Many improvements both on the physical and on the discrete approximation level can be expect in the near future. The combination of these improvements requires flexible and reliable software. The next-generation process simulation tools have to be designed to be modular in such a way that innovative models or algorithms can easily be added. The object-oriented programming approach The object-oriented programming approach significantly simplifies the tool development by providing a simple and unified access mechanism to objects . These objects represent wafer and device structure without going into details of the data structures used. This approach provides the possibility for code structuring that may allow an active participation of a large community in the development of widely used software packages. The next-generation process simulation software Due to below become more complex: - model development, - automatic grid generations, - adaptive meshing, - regridding of time-dependent domain, - search for optimal solvers, - parallel programming, - pre and post processing of single simulation step - approximately complete simulation of processing step. Theseposes new challenges to the developers of software tools The next-generation process simulation software Apart from the need of portability with respect to parallel programming,It also needs: - separate modeling, - discrete description, - solving from one another. A parallel programming environment keeps the formulation of the application, and away from particular solver. This idea represents the approach of the future.