developers presentations pres Kole by mikesanye

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									               Electrical Detail
                      Marq Kole
               Royal Philips Electronics

                      Jon Lueker
                   Intel Corporation



May 17, 2000                               2
         Speed Detection, Reset,
         and Suspend / Resume
               in USB 2.0



May 17, 2000                       3
               Contents

  High-speed Capability Detection
  Reset
  Suspend
  Reset from suspend
  Resume




May 17, 2000                         4
               High-Speed Capability
               Detection

  High-speed capability detection is performed
   during the reset period
  All high-speed capable devices initially
   connect at full-speed
       – The rest of the system may not be
         high-speed capable




May 17, 2000                                      5
               Reset

  USB 1.1 Reset protocol is extended with reset
   signaling for high-speed hubs and devices
  Extensions are compatible with USB 1.1:
       – Any USB 1.1 host/hub is able to reset any
         USB 2.0 hub/device
       – Additional Speed Detection Mechanism does not
         confuse a USB 1.1 hub/device
   Reset of a high-speed device takes the same
    10 ms minimum duration as USB 1.1 devices

May 17, 2000                                             6
               Reset Handshake

  High-speed capable hubs and devices perform
   a handshake to detect each others high-speed
   capabilities;
  A High-speed Capable Device will initiate the
   handshake (“Hello, I can do High-speed”);
  A High-speed Capable Hub responds to the
   handshake (“Great, I can do High-speed, too”);
  After the handshake, both will communicate in
   High-speed mode.
  Reference implementation in Appendix C
May 17, 2000                                        7
                      Timeline for Reset
         Start of                                                      Start of            End of     End of
          Reset                                                       Hub Chirp           Hub Chirp   Reset
                                                        > 10 ms
Hub




                                                                  < 100 μs                    100-500 μs



 D+

         μSOF                 SE0                      Device Chirp SE0       Hub Chirp       SE0 HS idle μSOF

 D–
Device




                    3.0-3.125 ms        100-875 μs       > 1.0 ms                         < 500 μs
                                         < 7.0 ms
         Start of                  Device         Start of       End of            Device       Device
          Reset                    reverts      Device Chirp   Device Chirp        detects      reverts
                                    to FS                                         Hub Chirp      to HS

 May 17, 2000                                                                                                    8
                   Reset State Diagrams
                          !Resetting                            HS Default
                                                                HS Address
                                SetPortFeature(PORT_RESET)     HS Configured
                          Resetting
  Hub                                                        idle          !idle
                                                               Start timer T0
                                                                                     Device
                          Drive SE0                                    T0  TWTREV
                        Start timer T0
                                                              Remove HS term.
                                                             Connect D+ pull-up
                        Clear timer T1                         Start timer T1
                                                                       SE0 & T1  TWTRSTHS
                    !HS K &                                    Drive Chirp K
                                 HS K &
                T1 < TFILT &                                   Start timer T2
                                 PORT_LOW_SPEED = 0
               T0 < TDETUCH
                                                                       T2  TUCH

                        Run timer T1                            Stop Chirp K
                                                              Clear counter C0
                                                               Start timer T3
                               !HS K & T1  TFILT
May 17, 2000                                                                                  9
                 Reset State Diagrams (cont.)
                            !HS K & T1  TFILT                            Clear timer T4
                    Drive Chirp K                                        HS K       !HS K & T4 < TFILT
                    Start timer T2
  Hub                                                                      Run timer T4

          T2  TDCHBIT &
                                                                                  T4  TFILT   Device
                             T2  TDCHBIT &                C0 < 3 &
     T0 < TDRST - TDCHSE0    T0 < TDRST - TDCHSE0                         Clear timer T4
                                                          T3 < TWTFS
                                                                         HS J       !HS J & T4 < TFILT
                   Drive Chirp J
                   Start timer T2                                          Run timer T4
                                                                                  T4  TFILT
          T2  TDCHBIT &                 T2  TDCHBIT &
     T0  TDRST - TDCHSE0          T0  TDRST - TDCHSE0                    Increase C0
                                                                                   C0  3
                     Drive SE0
                                                                          Enable HS term.
                                                                       Disconnect D+ pull-up
                            T0  TDRST


                      HS Default                                            HS Default
May 17, 2000                                                                                             10
                 Reset State Diagrams (cont.)
                            !HS K & T1  TFILT                            Clear timer T4
                    Drive Chirp K                                        HS K       !HS K & T4 < TFILT
                    Start timer T2
  Hub                                                                      Run timer T4

          T2  TDCHBIT &
                                                                                   T4  TFILT   Device
                             T2  TDCHBIT &                C0 < 3 &
     T0 < TDRST - TDCHSE0    T0 < TDRST - TDCHSE0                         Clear timer T4
                                                          T3 < TWTFS
                                                                         HS J        !HS J & T4 < TFILT
                   Drive Chirp J
                   Start timer T2                                          Run timer T4
                                                                                   T4  TFILT
          T2  TDCHBIT &                 T2  TDCHBIT &
     T0  TDRST - TDCHSE0          T0  TDRST - TDCHSE0                    Increase C0
                                                                                   C0  3
                     Drive SE0
                                                                          Enable HS term.
                                                                       Disconnect D+ pull-up
                            T0  TDRST


                      HS Default                                            HS Default
May 17, 2000                                                                                              11
                 Reset State Diagrams (cont.)
                            !HS K & T1  TFILT                            Clear timer T4
                    Drive Chirp K                                        HS K       !HS K & T4 < TFILT
                    Start timer T2
  Hub                                                                      Run timer T4

          T2  TDCHBIT &
                                                                                   T4  TFILT   Device
                             T2  TDCHBIT &                C0 < 3 &
     T0 < TDRST - TDCHSE0    T0 < TDRST - TDCHSE0                         Clear timer T4
                                                          T3 < TWTFS
                                                                         HS J        !HS J & T4 < TFILT
                   Drive Chirp J
                   Start timer T2                                          Run timer T4
                                                                                   T4  TFILT
          T2  TDCHBIT &                 T2  TDCHBIT &
     T0  TDRST - TDCHSE0          T0  TDRST - TDCHSE0                    Increase C0
                                                                                   C0  3
                      Drive SE0
                                                                          Enable HS term.
                                                                       Disconnect D+ pull-up
                            T0  TDRST


                      HS Default                                            HS Default
May 17, 2000                                                                                              12
                 Speed Detection Signaling

  Signaling during reset with the high-speed
   driver in a full-speed configuration
  Chirp K/J to distinguish from
   normal HS/FS/LS signaling            R   PU




                                                       Device
                                D+

                   RS
                        Chirp K Generated
           Hub




                          by HS Device
                   RS                            IHS

                                D-

May 17, 2000                                                    13
                 Speed Detection Signaling
                 (cont.)

  Chirp K : -0.9 – -0.5 V (differential)
  Chirp J : 0.7 – 1.1 V (differential)
                                                RPU


                                    D+
           Hub




                       RS
                            Chirp K Generated




                                                      Device
                                by HS Hub
                 IHS   RS

                                    D-

May 17, 2000                                                   14
               Implementation

  Implementation of Reset Protocol:
       – Requires very few additional gates
       – Has very loose timing requirements
         (system clock not required!)
       – Does not require logic at serial clock rate
         (possible at parallel interface)
  Result: Reset Protocol can be implemented
   in many different ways
       – Hardware, software, firmware, digital, analog, etc.

May 17, 2000                                                   15
               Suspend

  High-speed idle is identical to SE0
       – Suspend initially indistinguishable from reset
  Only after reverting to full-speed a HS device
   can make the distinction between idle and SE0




May 17, 2000                                              16
                      Timeline for Suspend

                                  Start of
                                 Suspend
               HS Hub

                                 Signaling




                     D+

                            μSOF                SE0                          FS idle

                     D–
               HS Device




                                             3.0-3.125 ms          100-875 μs
                            Start of                        Device        Device goes
                           Inactivity                       reverts      into suspend
                                                             to HS


May 17, 2000                                                                            17
               Reset from Suspend

  Reset of a suspended device should wake up
   that device from suspend
  Low-power consumption makes fast start-up
   from suspend a challenge
       – No HS clock, no current reference
  Reset protocol designed to do all handshake
   signaling without a stable clock
       – Very relaxed timing and voltage specs
  Do not use the single-ended FS receivers for this!
May 17, 2000                                            18
                       Timeline for Reset
                       from Suspend
                            Start of                        Start of            End of     End of
                             Reset                         Hub Chirp           Hub Chirp   Reset
           HS Hub


                                                            > 10 ms
                                                        < 100 μs                    100-500 μs



               D+

                       FS idle     SE0      Device Chirp SE0       Hub Chirp       SE0 HS idle μSOF

               D–
           HS Device




                                 > 2.5 μs    > 1.0 ms                          < 500 μs
                                         < 7.0 ms
                            Start of                  End of            Device       Device
                             Reset Start of         Device Chirp        detects      reverts
                                   Device Chirp                        Hub Chirp      to HS
May 17, 2000                                                                                          19
               Resume

  High-speed devices that were suspended from
   high-speed operation resume to high-speed
  No need for high-speed capability detection
   during resume signaling




May 17, 2000                                     20
                       Timeline for Resume
                               Start of              End of
                              Resume                Resume
               HS Hub

                              Signaling             Signaling
                                          > 20 ms               < 3.0 ms


                     D+

                           FS idle           FS K                HS idle       μSOF

                     D–
               HS Device




                                                    < 1.33 μs
                               Start of                    Device          Device sees
                              Resume                     Resumed           first activity
                              Signaling


May 17, 2000                                                                                21
        USB 2.0 High-Speed Eye
          Pattern Templates




May 17, 2000                     22
                  Transmitter Eye
                  Pattern Templates
   These templates govern the output waveforms at
    various test planes
   Waveforms are specified for a transmitter driving
    a reference test fixture
   Waveforms do not specify actual signals observed
    on a USB link               15.8 Ohms         +
                  Vbus                         50 Ohm     To 50 Ohm Inputs of a
                         N.C.
                                                Coax     High Speed Differential
           “A”    D+
           Plug                                          Oscilloscope, or 50 Ohm
                  D-               15.8 Ohms             Outputs of a High Speed
                  Gnd                          50 Ohm
                                                        Differential Data Generator
                                                Coax
                                                                     -

                          143         143
                         Ohms        Ohms

May 17, 2000                                                                          23
               Three Transmitter
               Templates are Specified
   At the pins of the transmitter (Tightest specification,
    guideline only)
   At the connector nearest the transmitter (Only applies
    when there isn’t a captive cable)
   At the “far end” of a captive cable (Loosest
    specification, applies when there is a captive cable)
                       TP4             TP3                   TP2            TP1




                              Traces          USB Cable            Traces


                Transceiver          B                       A               Transceiver
                                  Connector               Connector



May 17, 2000      Device Circuit Board                         Hub Circuit Board           24
               Example of a “Passing”
               Transmitter Waveform

  Note that higher level of overshoot is allowed in
   the unit interval following a transition




May 17, 2000                                           25
               Failing Transmitter
               Waveform

  Waveform is required to transition monotonically
   through range defined by the minimum
   eye opening




May 17, 2000                                          26
               Failing Transmitter
               Waveform

  Higher level of overshoot is only allowed in the
   unit interval following a transition




May 17, 2000                                          27
               Narrow/Wide Symbols are Allowed as
               Long as they Conform to the Template




May 17, 2000                                          28
               Receiver Sensitivity
               Templates

  Receiver templates are never actually measured
  These templates define the worst case allowable
   waveforms that a receiver is required to recover
  Actual waveforms at specified planes will be
   better than the receiver templates




May 17, 2000                                          29
               Three Receiver Templates
               are Specified

  At the pins of the receiver (Tightest specification,
   guideline only)
  At the connector nearest the receiver (Only applies
   when there isn’t a captive cable)
  At the “far end” of a captive cable (Loosest
   specification, applies when there is a captive cable)
  In compliance testing, worst case waveforms are
   generated with test equipment and applied through
   test fixture

May 17, 2000                                           30
               How Is an Eye Pattern
               Measured?

  1. The entire Test Packet waveform is captured
     with a single-shot transient capture instrument
  2. The “best fit” frequency and delay are computed
     for the zero crossings in the record (bounded by
     the allowed frequency range of +/- 500 ppm)
  3. The record is scanned for overshoot and
     monotonicity violations



May 17, 2000                                            31
               How Is an Eye Pattern
               Measured? (cont.)

  1. The unit intervals are “cut” and “superimposed”
     to produce the aggregate eye pattern
  2. The aggregate pattern is examined for
     template violations




May 17, 2000                                           32

								
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