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# sheet_1_ Operational Amplifier

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```									                         Electronic Circuits (3rd year)                     Zagazig University
Faculty of Engineering
Sheet (1)                Electronics and Communications Department

Operational Amplifier
1.    Use the circuit in fig(2-1) to design an inverting amplifier having a gain of (-10) and an input
resistance of 100k.Give the values of R1 and R2.

Figure (2-1)
2. The circuit shown in fig. (2-2) (a) can be used to implement a trans-resistance amplifier. Find
the value of the input resistance Ri, the trans-resistance Rm, and the output resistance Ro of
the trans-resistance amplifier. If the signal source shown in fig(2-2) (b) is connected to the
input of the trans-resistance amplifier , find its output voltage.

(a)                                    (b)
Figure (2-2)

3. If in the circuit of fig.(2-3) the 1 k resistor is
disconnected from ground and connected to a third signal
source V3, use superposition to determine Vo in terms of
V1,V2 and V3.

Figure (2-3)
4. a) Show that if the op amp in the circuit of fig(2-4) has a finite open-loop gain A, then the
V        1  ( R2 / R1 )
closed-loop gain is given by G  O                        .
VI 1  1  ( R2 / R1 )
A

Page 1 of 6
Electronic Circuits (3rd year)                     Zagazig University
Faculty of Engineering
Sheet (1)                 Electronics and Communications Department

b) For R1=1K and R2= 9K, find the percentage deviation  of the closed-loop gain from
the ideal value of (1+(R2/R1)) for the cases A=103,104 and 105. In each cases find the voltage
between the two input terminals of the op amp assuming that V1=1volt.

Figure (2-4)

5. Analyze the circuit shown in fig(2-5) to determine VO as a function of V1 and V2 then
determine the differential gain. Find the input resistance. Design the circuit to provide a gain
that can be varied over the range 2 to 1000 utilizing a 100K variable resistance.

Figure (2-5)

6. Consider an inverting amplifier with a nominal gain of 1000 constructed from an op-amp
with an input offset voltage of 3mv and with output saturation levels of 10v.
a) what is (approximately) the peak sine wave input signal that can be applied without output
clipping?
b) If the effect of VOS is nulled at room temperature(25oC) how large an input can one now apply
if : i) the circuit is to operate at constant temperature?
ii) the circuit is to operate at a temperature in the range 0oC to 75oC and the temperature
coefficient of VOS is 10 V/oC?

Page 2 of 6
Electronic Circuits (3rd year)                      Zagazig University
Faculty of Engineering
Sheet (1)                Electronics and Communications Department

7. Assuming an ideal op amps, find the voltage gain Vo/Vi and input resistance Rin of each of
the circuits in fig (2-6).

(a)                                                  (b)

(c)                                                  (d)

(e)                                                  (f)
Figure (2-6)

8. The circuit in fig (2-7) is frequently used to provide an output voltage Vo proportional to an
input signal current Ii. Derive expressions for the trans-resistance ( Rm=Vo/Ii ) and the input
resistance Ri=Vi/Ii for the two cases:
a) A is infinite and
b) A is finite.

Figure (2-7)

Page 3 of 6
Electronic Circuits (3rd year)                     Zagazig University
Faculty of Engineering
Sheet (1)                 Electronics and Communications Department

9. Consider a Miller integrator having a time constant of 1ms,and whose output is initially zero,
when fed with a string of pulses of 10 -s duration and 1-V amplitude rising from 0 V ( see
fig(2-8) ). Sketch and label the output waveform resulting. How many pulses are required for
an output voltage change of 1 V?

Figure (2-8)

10. a) Use superposition to show that the output of the circuit in fig. (2-9) is given by:
 Rf           Rf                   Rf      
V 0        VN 1       VN 2  ........     VNn 
 RN 1        RN 2                  RNn     
 R f   RP            R                   R      
 1           VP1  P VP 2  ........ P VPn 
 RN   RP1           RP 2                 RPn    
Where RN=RN1 RN1 ……. //RNn and
RP=RP1 RP1 ……. //RPn

b) Design a circuit to obtain Vo =-2 VN1 +VP1 + 2VP2 , the smallest resistor should be 10K.

Figure (2-9)

Page 4 of 6
Electronic Circuits (3rd year)                     Zagazig University
Faculty of Engineering
Sheet (1)                 Electronics and Communications Department

11. Fig. (2-10) shows a modified version of the difference amplifier. this modified circuit
includes a resistor RG, which can be used to vary the gain. Show that the differential voltage
gain is given by
VO      R  R 
 2 2 1  2 
Vi      R1  RG 
Hint: The virtual short circuit at the op amp input causes the current through the R1 resistors to
be Vd / 2R1.

Figure (2-10)
12. The circuit shown in fig. (2-11) uses an op amp having a  5mv offset. What is its output
offset voltage? What does the output offset become with the input ac coupled through a
capacitor C? If, instead, the 1K resistor is capacitively coupled to ground, what does the
output offset become?

Figure (2-11)

13. An op amp is connected in a closed loop with gain of +100 utilizing a feedback resistor of
1M.
a) If the input bias current is 100nA, what output voltage results with the input grounded?
b) If the input offset voltage is 1mV, and the input bias current as in (a), what is the largest
possible output that can be observed with the input grounded?
c) If bias-current compensation is used, what is the value of the required resistor? If the offset
current is no more than one tenth the bias current, what is the resulting output offset voltage
(due to the offset current alone) ?
d) With bias current compensation, as in (c), in place what is the largest dc voltage at the
output due to the combined effect of offset voltage and offset current?

Page 5 of 6
Electronic Circuits (3rd year)                 Zagazig University
Faculty of Engineering
Sheet (1)              Electronics and Communications Department

14. Design a log-antilog multiplier ( Vo=K V1 V2 ), where the constant K is independent
on Io.

15. Design Op-Amp log circuit to realize the following relationships. Draw the circuit in
detail and find all the important relations describing the circuit behavior :
(a) Vo=K V1 V2 V3.
(b) Vo=K V2 .
(c) Vo=K V .

Page 6 of 6

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