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   Semiconductor                                          1
   Current injection technique                            9
   Airgap (microelectronics)                             10
   Anomalous photovoltaic effect                         11
   Carbon nanofoam                                       13
   Weili Dai                                             14
   Deathnium                                             15
   Die shrink                                            15
   Diffusion capacitance                                 16
   Electron mobility                                     17
   Equivalent oxide thickness                            25
   Etch pit density                                      25
   EV Group                                              25
   Floating body effect                                  27
   Haynes–Shockley experiment                            28
   Hot carriers injection                                30
   Impact ionization                                     32
   International Electron Devices Meeting                33
   International Technology Roadmap for Semiconductors   36
   Isobutylgermane                                       38
   Isotropic etching                                     40
   Johnson's Figure of Merit                             41
   Junction temperature                                  41
   Low level injection                                   42
   Luttinger parameter                                   42
   Metalorganics                                         44
   Moisture Sensitivity Level                            44
   Negative luminescence                                 45
   On-die termination                                    46
   Overdrive voltage                                     48
   Photo-Dember                                          49
   Photoelectrochemical processes                        50
   Proximity communication                               55
   Random logic                                          56
   Reliability (semiconductor)                56
   Reverse leakage current                    58
   Roll-to-roll processing                    59
   Semiconductor device                       60
   Sheet resistance                           66
   Solid state (electronics)                  68
   STEC, Inc.                                 69
   Strain engineering                         72
   Thermal copper pillar bump                 73
   Thin-film transistor                       78
   Transistor channel                         80
   Transmission line measurement              85
   Triethylgallium                            86
   Trimethylgallium                           87
   Trimethylindium                            89
   Tunnel injection                           91
   Voltage reference                          91

   Article Sources and Contributors           93
   Image Sources, Licenses and Contributors   95

Article Licenses
   License                                    96
Semiconductor                                                                                                                     1

    A semiconductor is a material with electrical conductivity due to electron flow (as opposed to ionic conductivity)
    intermediate in magnitude between that of a conductor and an insulator. This means a conductivity roughly in the
    range of 103 to 10−8 siemens per centimeter. Semiconductor materials are the foundation of modern electronics,
    including radio, computers, telephones, and many other devices. Such devices include transistors, solar cells, many
    kinds of diodes including the light-emitting diode, the silicon controlled rectifier, and digital and analog integrated
    circuits. Similarly, semiconductor solar photovoltaic panels directly convert light energy into electrical energy. In a
    metallic conductor, current is carried by the flow of electrons. In semiconductors, current is often schematized as
    being carried either by the flow of electrons or by the flow of positively charged "holes" in the electron structure of
    the material. Actually, however, in both cases only electron movements are involved.
    Common semiconducting materials are crystalline solids, but amorphous and liquid semiconductors are known.
    These include hydrogenated amorphous silicon and mixtures of arsenic, selenium and tellurium in a variety of
    proportions. Such compounds share with better known semiconductors intermediate conductivity and a rapid
    variation of conductivity with temperature, as well as occasional negative resistance. Such disordered materials lack
    the rigid crystalline structure of conventional semiconductors such as silicon and are generally used in thin film
    structures, which are less demanding for as concerns the electronic quality of the material and thus are relatively
    insensitive to impurities and radiation damage. Organic semiconductors, that is, organic materials with properties
    resembling conventional semiconductors, are also known.
    Silicon is used to create most semiconductors commercially. Dozens of other materials are used, including
    germanium, gallium arsenide, and silicon carbide. A pure semiconductor is often called an “intrinsic” semiconductor.
    The electronic properties and the conductivity of a semiconductor can be changed in a controlled manner by adding
    very small quantities of other elements, called “dopants”, to the intrinsic material. In crystalline silicon typically this
    is achieved by adding impurities of boron or phosphorus to the melt and then allowing the melt to solidify into the
    crystal. This process is called "doping".[1]

    Explaining semiconductor energy bands
    There are three popular ways to classify the electronic structure of a crystal.
    • Band structure

                                                 atoms – crystal – vacuum
Semiconductor                                                                                                                      2

          In a single           Putting two atoms       This can be continued        Continuing to add creates         For this
          H-atom an              together leads to      with more atoms. Note:       a crystal, which may then     regular solid
            electron           delocalized orbitals      This picture shows a          be cut into a tape and         the band
           resides in           across two atoms,        metal, not an actual        fused together at the ends    structure can
         well known         yielding a covalent bond.       semiconductor.           to allow circular currents.         be
            orbitals.            Due to the Pauli                                                                  calculated or
         Note that the         exclusion principle,                                                                 measured.
         orbitals are        every state can contain
         called s,p,d           only one electron.
          in order of

          Integrating                After the                An alternative             A third alternative
        over the k axis                band             description, which does           description uses
            gives the              structure is         not really appreciate the        strongly localized
           bands of a              determined                strong Coulomb            unpaired electrons in
        semiconductor             states can be          interaction, shoots free         chemical bonds,
        showing a full            combined to           electrons into the crystal      which looks almost
         valence band                generate                and looks at the          like a Mott insulator.
         and an empty                 wave                      scattering.
          conduction               packets. As
              band.                   this is
           Generally              analogous to
        stopping at the               wave
         vacuum level             packages in
        is undesirable,            free space,
         because some               the results
        people want to             are similar.

    Energy bands and electrical conduction
    In classic crystalline semiconductors, the electrons can have energies only within certain bands (i.e. ranges of levels
    of energy). Energetically, these bands are located between the energy of the ground state, corresponding to electrons
    tightly bound to the atomic nuclei of the material, and the free electron energy. The latter is the energy required for
    an electron to escape entirely from the material. The energy bands each correspond to a large number of discrete
    quantum states of the electrons, and most of the states with low energy (closer to the nucleus) are full, up to a
    particular band called the valence band. Semiconductors and insulators are distinguished from metals because the
    valence band in them is nearly filled with electrons under usual operating conditions, while very few
    (semiconductor) or virtually none (insulator) of them are available in the conduction band, the band immediately
    above the valence band.
Semiconductor                                                                                                                  3

    The ease with which electrons in a semiconductor can be excited from the valence band to the conduction band
    depends on the band gap between the bands. The size of this energy bandgap serves as an arbitrary dividing line
    (roughly 4 eV) between semiconductors and insulators.
    With covalent bonds, an electron moves by hopping to a neighboring bond. The Pauli exclusion principle requires
    the electron to be lifted into the higher anti-bonding state of that bond. For delocalized states, for example in one
    dimension – that is in a nanowire, for every energy there is a state with electrons flowing in one direction and
    another state with the electrons flowing in the other. For a net current to flow, more states for one direction than for
    the other direction must be occupied. For this to occur, energy is required, as in the semiconductor the next higher
    states lie above the band gap. Often this is stated as: full bands do not contribute to the electrical conductivity.
    However, as the temperature of a semiconductor rises above absolute zero, there is more energy in the
    semiconductor to spend on lattice vibration and — more importantly for us — on lifting some electrons into an
    energy states of the conduction band. The current-carrying electrons in the conduction band are known as "free
    electrons", although they are often simply called "electrons" if context allows this usage to be clear.
    Electrons excited to the conduction band also leave behind electron holes, or unoccupied states in the valence band.
    Both the conduction band electrons and the valence band holes contribute to electrical conductivity. The holes
    themselves don't actually move, but a neighboring electron can move to fill the hole, leaving a hole at the place it has
    just come from, and in this way the holes appear to move, and the holes behave as if they were actual positively
    charged particles.
    One covalent bond between neighboring atoms in the solid is ten times stronger than the binding of the single
    electron to the atom, so freeing the electron does not imply destruction of the crystal structure.

    Holes: electron absence as a charge carrier
    The concept of holes can also be applied to metals, where the Fermi level lies within the conduction band. With most
    metals the Hall effect indicates electrons are the charge carriers. However, some metals have a mostly filled
    conduction band. In these, the Hall effect reveals positive charge carriers, which are not the ion-cores, but holes. In
    the case of a metal, only a small amount of energy is needed for the electrons to find other unoccupied states to move
    into, and hence for current to flow. Sometimes even in this case it may be said that a hole was left behind, to explain
    why the electron does not fall back to lower energies: It cannot find a hole. In the end in both materials
    electron-phonon scattering and defects are the dominant causes for resistance.
Semiconductor                                                                                                                              4

    The energy distribution of the electrons
    determines which of the states are
    filled and which are empty. This
    distribution     is    described      by
    Fermi-Dirac statistics. The distribution
    is characterized by the temperature of
    the electrons, and the Fermi energy or
    Fermi level. Under absolute zero
    conditions the Fermi energy can be
    thought of as the energy up to which
    available electron states are occupied.
    At higher temperatures, the Fermi
    energy is the energy at which the
    probability of a state being occupied
    has fallen to 0.5.

    The dependence of the electron energy
    distribution on temperature also
    explains why the conductivity of a
    semiconductor      has     a     strong
    temperature     dependency,     as    a         Fermi-Dirac distribution. States with energy ε below the Fermi energy, here µ, have
    semiconductor operating at lower                higher probability n to be occupied, and those above are less likely to be occupied.
    temperatures will have fewer available                       Smearing of the distribution increases with temperature.

    free electrons and holes able to do the

    Energy–momentum dispersion
    In the preceding description an important fact is ignored for the sake of simplicity: the dispersion of the energy. The
    reason that the energies of the states are broadened into a band is that the energy depends on the value of the wave
    vector, or k-vector, of the electron. The k-vector, in quantum mechanics, is the representation of the momentum of a
    The dispersion relationship determines the effective mass, m*, of electrons or holes in the semiconductor, according
    to the formula:

    The effective mass is important as it affects many of the electrical properties of the semiconductor, such as the
    electron or hole mobility, which in turn influences the diffusivity of the charge carriers and the electrical conductivity
    of the semiconductor.
    Typically the effective mass of electrons and holes are different. This affects the relative performance of p-channel
    and n-channel IGFETs.[2]
    The top of the valence band and the bottom of the conduction band might not occur at that same value of k. Materials
    with this situation, such as silicon and germanium, are known as indirect bandgap materials. Materials in which the
    band extrema are aligned in k, for example gallium arsenide, are called direct bandgap semiconductors. Direct gap
    semiconductors are particularly important in optoelectronics because they are much more efficient as light emitters
    than indirect gap materials.
Semiconductor                                                                                                                 5

    Carrier generation and recombination
    When ionizing radiation strikes a semiconductor, it may excite an electron out of its energy level and consequently
    leave a hole. This process is known as electron–hole pair generation. Electron-hole pairs are constantly generated
    from thermal energy as well, in the absence of any external energy source.
    Electron-hole pairs are also apt to recombine. Conservation of energy demands that these recombination events, in
    which an electron loses an amount of energy larger than the band gap, be accompanied by the emission of thermal
    energy (in the form of phonons) or radiation (in the form of photons).
    In some states, the generation and recombination of electron–hole pairs are in equipoise. The number of
    electron-hole pairs in the steady state at a given temperature is determined by quantum statistical mechanics. The
    precise quantum mechanical mechanisms of generation and recombination are governed by conservation of energy
    and conservation of momentum.
    As the probability that electrons and holes meet together is proportional to the product of their amounts, the product
    is in steady state nearly constant at a given temperature, providing that there is no significant electric field (which
    might "flush" carriers of both types, or move them from neighbour regions containing more of them to meet
    together) or externally driven pair generation. The product is a function of the temperature, as the probability of
    getting enough thermal energy to produce a pair increases with temperature, being approximately exp(−EG/kT),
    where k is Boltzmann's constant, T is absolute temperature and EG is band gap.
    The probability of meeting is increased by carrier traps—impurities or dislocations which can trap an electron or
    hole and hold it until a pair is completed. Such carrier traps are sometimes purposely added to reduce the time
    needed to reach the steady state.

    Some materials are classified as semi-insulators. These have electrical conductivity nearer to that of electrical
    insulators. Semi-insulators find niche applications in micro-electronics, such as substrates for HEMT. An example of
    a common semi-insulator is gallium arsenide.[3]

    The property of semiconductors that makes them most useful for constructing electronic devices is that their
    conductivity may easily be modified by introducing impurities into their crystal lattice. The process of adding
    controlled impurities to a semiconductor is known as doping. The amount of impurity, or dopant, added to an
    intrinsic (pure) semiconductor varies its level of conductivity. Doped semiconductors are often referred to as
    extrinsic. By adding impurity to pure semiconductors, the electrical conductivity may be varied not only by the
    number of impurity atoms but also, by the type of impurity atom and the changes may be thousand folds and million
    folds. For example, 1 cm3 of a metal or semiconductor specimen has a number of atoms on the order of 1022. Since
    every atom in metal donates at least one free electron for conduction in metal, 1 cm3 of metal contains free electrons
    on the order of 1022. At the temperature close to 20 °C , 1 cm3 of pure germanium contains about 4.2×1022 atoms
    and 2.5×1013 free electrons and 2.5×1013 holes (empty spaces in crystal lattice having positive charge) The addition
    of 0.001% of arsenic (an impurity) donates an extra 1017 free electrons in the same volume and the electrical
    conductivity increases about 10,000 times."
Semiconductor                                                                                                                     6

    The materials chosen as suitable dopants depend on the atomic properties of both the dopant and the material to be
    doped. In general, dopants that produce the desired controlled changes are classified as either electron acceptors or
    donors. A donor atom that activates (that is, becomes incorporated into the crystal lattice) donates weakly bound
    valence electrons to the material, creating excess negative charge carriers. These weakly bound electrons can move
    about in the crystal lattice relatively freely and can facilitate conduction in the presence of an electric field. (The
    donor atoms introduce some states under, but very close to the conduction band edge. Electrons at these states can be
    easily excited to the conduction band, becoming free electrons, at room temperature.) Conversely, an activated
    acceptor produces a hole. Semiconductors doped with donor impurities are called n-type, while those doped with
    acceptor impurities are known as p-type. The n and p type designations indicate which charge carrier acts as the
    material's majority carrier. The opposite carrier is called the minority carrier, which exists due to thermal excitation
    at a much lower concentration compared to the majority carrier.
    For example, the pure semiconductor silicon has four valence electrons. In silicon, the most common dopants are
    IUPAC group 13 (commonly known as group III) and group 15 (commonly known as group V) elements. Group 13
    elements all contain three valence electrons, causing them to function as acceptors when used to dope silicon. Group
    15 elements have five valence electrons, which allows them to act as a donor. Therefore, a silicon crystal doped with
    boron creates a p-type semiconductor whereas one doped with phosphorus results in an n-type material.

    Carrier concentration
    The concentration of dopant introduced to an intrinsic semiconductor determines its concentration and indirectly
    affects many of its electrical properties. The most important factor that doping directly affects is the material's carrier
    concentration. In an intrinsic semiconductor under thermal equilibrium, the concentration of electrons and holes is
    equivalent. That is,

    If we have a non-intrinsic semiconductor in thermal equilibrium the relation becomes:

    where n0 is the concentration of conducting electrons, p0 is the electron hole concentration, and ni is the material's
    intrinsic carrier concentration. Intrinsic carrier concentration varies between materials and is dependent on
    temperature. Silicon's ni, for example, is roughly 1.08×1010 cm−3 at 300 kelvins (room temperature).[4]
    In general, an increase in doping concentration affords an increase in conductivity due to the higher concentration of
    carriers available for conduction. Degenerately (very highly) doped semiconductors have conductivity levels
    comparable to metals and are often used in modern integrated circuits as a replacement for metal. Often superscript
    plus and minus symbols are used to denote relative doping concentration in semiconductors. For example, n+ denotes
    an n-type semiconductor with a high, often degenerate, doping concentration. Similarly, p- would indicate a very
    lightly doped p-type material. It is useful to note that even degenerate levels of doping imply low concentrations of
    impurities with respect to the base semiconductor. In crystalline intrinsic silicon, there are approximately 5×1022
    atoms/cm³. Doping concentration for silicon semiconductors may range anywhere from 1013 cm−3 to 1018 cm−3.
    Doping concentration above about 1018 cm−3 is considered degenerate at room temperature. Degenerately doped
    silicon contains a proportion of impurity to silicon on the order of parts per thousand. This proportion may be
    reduced to parts per billion in very lightly doped silicon. Typical concentration values fall somewhere in this range
    and are tailored to produce the desired properties in the device that the semiconductor is intended for.
Semiconductor                                                                                                                               7

    Effect on band structure
    Doping a semiconductor crystal
    introduces allowed energy states
    within the band gap but very close to
    the energy band that corresponds to the
    dopant type. In other words, donor
    impurities create states near the
    conduction band while acceptors create
    states near the valence band. The gap
    between these energy states and the
    nearest energy band is usually referred
                                                Band diagram of PN junction operation in forward bias mode showing reducing depletion
    to as dopant-site bonding energy or EB
                                                  width. Both p and n junctions are doped at a 1e15/cm3 doping level, leading to built-in
    and is relatively small. For example,        potential of ~0.59V. Reducing depletion width can be inferred from the shrinking charge
    the EB for boron in silicon bulk is                    profile, as fewer dopants are exposed with increasing forward bias [5].
    0.045 eV, compared with silicon's
    band gap of about 1.12 eV. Because EB is so small, it takes little energy to ionize the dopant atoms and create free
    carriers in the conduction or valence bands. Usually the thermal energy available at room temperature is sufficient to
    ionize most of the dopant.

    Dopants also have the important effect of shifting the material's Fermi level towards the energy band that
    corresponds with the dopant with the greatest concentration. Since the Fermi level must remain constant in a system
    in thermodynamic equilibrium, stacking layers of materials with different properties leads to many useful electrical
    properties. For example, the p-n junction's properties are due to the energy band bending that happens as a result of
    lining up the Fermi levels in contacting regions of p-type and n-type material.
    This effect is shown in a band diagram. The band diagram typically indicates the variation in the valence band and
    conduction band edges versus some spatial dimension, often denoted x. The Fermi energy is also usually indicated in
    the diagram. Sometimes the intrinsic Fermi energy, Ei, which is the Fermi level in the absence of doping, is shown.
    These diagrams are useful in explaining the operation of many kinds of semiconductor devices.

    Preparation of semiconductor materials
    Semiconductors with predictable, reliable electronic properties are necessary for mass production. The level of
    chemical purity needed is extremely high because the presence of impurities even in very small proportions can have
    large effects on the properties of the material. A high degree of crystalline perfection is also required, since faults in
    crystal structure (such as dislocations, twins, and stacking faults) interfere with the semiconducting properties of the
    material. Crystalline faults are a major cause of defective semiconductor devices. The larger the crystal, the more
    difficult it is to achieve the necessary perfection. Current mass production processes use crystal ingots between
    100 mm and 300 mm (4–12 inches) in diameter which are grown as cylinders and sliced into wafers.
    Because of the required level of chemical purity and the perfection of the crystal structure which are needed to make
    semiconductor devices, special methods have been developed to produce the initial semiconductor material. A
    technique for achieving high purity includes growing the crystal using the Czochralski process. An additional step
    that can be used to further increase purity is known as zone refining. In zone refining, part of a solid crystal is
    melted. The impurities tend to concentrate in the melted region, while the desired material recrystalizes leaving the
    solid material more pure and with fewer crystalline faults.
    In manufacturing semiconductor devices involving heterojunctions between different semiconductor materials, the
    lattice constant, which is the length of the repeating element of the crystal structure, is important for determining the
    compatibility of materials.
Semiconductor                                                                                                                                       8

    [1] IUPAC, Compendium of Chemical Terminology, 2nd ed. (the "Gold Book") (1997). Online corrected version:  (2006-) " semiconductor (http:/
        / goldbook. iupac. org/ S05591. html)".
    [2] Muller, Richard S.; Theodore I. Kamins (1986). Device Electronics for Integrated Circuits (2d ed.). New York: Wiley. p. 427.
        ISBN 0-471-88758-7.
    [3] J. W. Allen (1960). "Gallium Arsenide as a semi-insulator". Nature 187: 403–405. doi:10.1038/187403b0.
    [4] A.B Sproul, M.A Green (1991). "Improved value for the silicon intrinsic carrier concentration from 275 to 375 K". J. Appl. Phys. 70: 846.
    [5] http:/ / www. nanohub. org

    Further reading
    • A. A. Balandin and K. L. Wang (2006). Handbook of Semiconductor Nanostructures and Nanodevices (5-Volume
      Set). American Scientific Publishers. ISBN 1-58883-073-X.
    • Sze, Simon M. (1981). Physics of Semiconductor Devices (2nd ed.). John Wiley and Sons (WIE).
      ISBN 0-471-05661-8.
    • Turley, Jim (2002). The Essential Guide to Semiconductors. Prentice Hall PTR. ISBN 0-13-046404-X.
    • Yu, Peter Y.; Cardona, Manuel (2004). Fundamentals of Semiconductors : Physics and Materials Properties.
      Springer. ISBN 3-540-41323-5.

    External links
    • Howstuffworks' semiconductor page (
    • Semiconductor Concepts at Hyperphysics (
    • Semiconductor OneSource Hall of Fame (, Glossary (http://www.
    • Principles of Semiconductor Devices ( by Bart Van
      Zeghbroeck, University of Colorado. An online textbook]
    • US Navy Electrical Engineering Training Series (
    • NSM-Archive ( Physical Properties of
    • Semiconductor Manufacturer List (
    • ABACUS ( : Introduction to Semiconductor Devices – by
      Gerhard Klimeck and Dragica Vasileska, online learning resource with simulation tools on nanoHUB
    • Organic Semiconductor page (
    • DoITPoMS Teaching and Learning Package- "Introduction to Semiconductors" (
Current injection technique                                                                                                     9

    Current injection technique
    The current injection technique is a technique developed to reduce the turn-OFF switching transient of power
    bipolar semiconductor devices. It was developed and published by Dr S. Eio of Staffordshire University (United
    Kingdom) in 2007.

    The Turn-OFF switching transient of silicon-based power bipolar semiconductor devices, caused by stored charge in
    the device during the forward conduction state, limits switching speed of the device, which in turn limits the
    efficiency of the application it is used within.
    Different techniques, such as carrier lifetime control, injection efficiency and buffer layer devices, have been used to
    minimize turn-OFF switching transient, but all result in a trade-off between the ON-state loss and switching speed.

    Details of the Technique
    The current injection technique examined in Dr Eio's publications optimize the switching transient of power diodes,
    thyristors and insulated gate bipolar transistors (IGBTs) without the need of changing the structure of these devices.
    To implement the current injection technique, current injection circuit was developed with results indicating that the
    injection of an additional current during its switching transient can reduce the reverse recovery charge of a given
    power diode and thyristor, and also reduce the tail current of insulated gate bipolar transistors.
    Practical experimental results on diodes and thyristors showed that the amplitude of the injected current required is
    proportional to the peak reverse recovery current and proved that these devices experience a momentary increase in
    recombination of current carriers during the injection of the additional current. This help to prevent the device from
    conducting large negative current, which in turn reduce its reverse recovery charge and reverse recovery time.
    Results obtained from experiments with insulated gate bipolar transistor showed a significant reduction in the time
    where current falls to zero when opposing current was injected into the device during its turn-off transient. Further
    simulation results from numerical modeling showed that the injected opposing current temporary increase
    recombination in the device and therefore reduce the extracted excess carriers that stored within the device.
    To prevent circuit commutation and bonding between the current injection circuit and the main test circuit where the
    device under test (DUT) is connected to, non-invasive circuit was developed to magnetically couple the two circuits.
    In summary, current injection technique makes it possible to use devices with low forward voltage drop for high
    frequency applications. This also imply cheaper cost of devices as less processing steps are required during the
    manufacturing stages where the need of carrier lifetime control techniques are reduced. This removed the need for
    the semiconductor device used in the current injection circuit to have high breakdown voltage rating and also
    provided electrical isolation. Typical application of this technique in an inductive load chopper circuit showed a
    significant reduction in the tail current of insulated gate bipolar transistors, and the reverse recovery time and charge
    of the freewheeling diode used.
Current injection technique                                                                                                   10

    1.S. Eio., N. Shammas., “IGBT Tail Current Reduction by Current Injection,” 43rd International Universities Power
    Engineering Conference, Padova, Italy,1 – 4 September 2008
    2.S. Eio., N. Shammas., “A chopper circuit with current injection technique for increasing operating frequency,” 9th
    International Seminar On Power Semiconductors, Prague, Czech Republic, 27–29 August 2008
    3.S. Eio., N. Shammas., “Switching Transient of Power Diode,” 41st International Universities Power Engineering
    Conference, Newcastle, United Kingdom, 6–8 September 2006, Volume 2, P. 564 – 568, Digital Object Identifier
    10.1109 / UPEC.2006.367541
    4.N. Shammas., S. Eio., “A Novel Technique to Reduce the Reverse Recovery Charge of a Power Diode,” 12th
    European Power Electronics and Applications, EPE 2007, Aalborg, Denmark, 2–5 September. 2007 P.1 – 8, Digital
    Object Identifier 10.1109 / EPE.2007.4417713
    5.N. Shammas., S. Eio., “A Novel Technique to Reduce the Reverse Recovery Charge of a Power Thyristor,” 42nd
    International Universities Power Engineering Conference, Brighton, United Kingdom, 4 – 6 September 2007,
    p. 1222–1227, Digital Object Identifier 10.1109 / UPEC.2007.4469126
    6.N. Shammas., S. Eio., D. Chamund., “Semiconductor Devices and Their Use in Power Electronic Applications,”
    World Scientific and Eng. Academy and Society, Venice, Italy, 21 -23 Nov 2007
    7.N.Shammas, S.Eio, S.Nathan, K.Shukry, D.Chamund., “Thermal Aspects of Power Semiconductor Devices and
    Systems,” VII Conference Thermal Problems in Electronics, MicroTherm’07, 24 – 28 June 2007, Lodz, Poland

    Airgap (microelectronics)
    Airgap is an invention in microelectronic fabrication by IBM.

    By insulating copper wires within a chip with vacuum holes, capacitance can be minimized enabling chips to work
    faster or draw less power. A vacuum is believed to be the ultimate insulator for what is known as wiring capacitance,
    which occurs when two adjacent wires on a chip draw electrical energy from one another, generating undesirable
    heat and slowing the speed at which data can move through a chip. IBM estimates that this technology alone can lead
    to 35% higher speeds in current flow or 15% lower power consumption.

    Fabrication techniques
    IBM researchers have figured out a way to manufacture these "airgaps" on a massive scale, using the self-assembly
    properties of certain polymers, and then combine this with regular CMOS manufacturing techniques, saving
    enormous resources since they don't have to retool the entire process. When making the chips the entire wafer is
    prepared with a polymer material that when removed at a later stage leaves trillions of holes, just 20 nanometers in
    diameter, evenly spaced. Even though the name suggests that the holes are filled with air, they are in fact filled with
    nothing, vacuum. IBM has already proven this technique in their labs, and is already deployed in their manufacturing
    plant in East Fishkill, New York where they have made prototype POWER6 processors using this technology. Full
    scale deployment is scheduled for IBM's 45 nm node in 2009 after which this technology will also be available to
    IBM's customers.
Airgap (microelectronics)                                                                                                     11

    Airgap was developed in a collaborative effort between IBM's Almaden Research Center and T.J. Watson Research
    Center, and the University of Albany, New York.

    • Snowflakes promise faster chips, BBC [1]
    • IBM Brings Nature to Computer Chip Manufacturing, IBM [2]
    • IBM's catches air, touts Top Ten list, Ars Technica [3]

    [1] http:/ / news. bbc. co. uk/ 2/ hi/ technology/ 6618919. stm
    [2] http:/ / www-03. ibm. com/ press/ us/ en/ pressrelease/ 21473. wss
    [3] http:/ / arstechnica. com/ news. ars/ post/ 20070503-ibms-catches-air-touts-top-ten-list. html

    Anomalous photovoltaic effect
    The anomalous photovoltaic effect (APE) is a type of a photovoltaic effect which occurs in semiconducting
    materials. The "anomalous" refers to those cases where the photovoltage is larger than the band gap of the
    corresponding semiconductor.
    This effect was discovered by Starkiewicz et al. in 1946 on PbS films[1] and was later observed on other
    semiconducting polycrystalline films including CdTe,[2] Silicon,[3] Germanium,[3] ZnTe[4] and InP,[5] as well as on
    amorphous silicon films [6] [7] and in nanocrystalline silicon systems.[8] Observed photovoltages were found to reach
    hundreds, and in some cases even thousands of volts. The films in which this effect was observed were generally thin
    semiconducting films that were deposited by vacuum evaporation onto a heated insulating substrate, held at an angle
    with respect to the direction of the incident vapor. However, the photovoltage was found to be very sensitive to the
    conditions and procedure at which the samples were prepared.[9] This made it difficult to get reproducible results
    which is probably the reason why no satisfactory model for it has been accepted thus far. Several models were,
    however, suggested to account for the extraordinary phenomenon and they are briefly outlined below.[10]

    Existing models
    The oblique deposition can lead to several structure asymmetries in the films. Among the first attempts to explain the
    APE were few that treated the film as a single entity, such as considering the variation of sample thickness along its
    length[11] or a non-uniform distribution of electron traps.[12] However, studies that followed generally supported
    models that explain the effect as resulting from a series of microelements contributing additively to the net
    photovoltage. The more popular models used to explain the photovoltage are reviewed below .

    The Dember effect
    When photogenerated electrons and holes have different mobilities, a potential difference can be created between the
    illuminated and non-illuminated faces of a semiconductor slab.[13] Generally this potential is created through the
    depth of the slab, whether it is a bulk semiconductor or a polycrystalline film. The difference between these cases is
    that in the latter, a photovoltage can be created in each one of the microcrystallites. As was mentioned above, in the
    oblique deposition process inclined crystallites are formed in which one face can absorb light more than the other.
    This may cause a photovoltage to be generated along the film, as well as through its depth. The transfer of carriers at
    the surface of crystallites is assumed to be hindered by the presence of some unspecified layer with different
Anomalous photovoltaic effect                                                                                                                12

    properties, thus cancellation of consecutive Dember voltages is being prevented. To explain the polarity of the PV
    which is independent of the illumination direction one must assume that there exists a large difference in
    recombination rates at opposite faces of a crystallite, which is a weakness of this model.

    The structure transition model
    This model suggests that when a material crystallizes both in cubic and hexagonal structures, an asymmetric barrier
    can be formed by a residual dipole layer at the interface between the two structures. A potential barrier is formed due
    to a combination of the band gap difference and the electric fields produced at the interface. One should remember
    that this model can be invoked to explain anomalous PV effect only in those materials that can demonstrate two
    types of crystal structure.

    The p-n junction model
    It was suggested by Starkiewicz [1] that the anomalous PV is developed due to a distribution gradient of positive and
    negative impurity ions through the microcrystallites, with an orientation such as to give a non-zero total
    photovoltage. This is equivalent to an array of p-n junctions. However, the mechanism by which such p-n junctions
    may be formed was not explained.

    The surface photovoltage model
    The interface between crystallites may contain traps for charge carriers. This may lead to a surface charge and an
    opposite space charge region in the crystallites[10] , in case that the crystallites are small enough. Under illumination
    of the inclined crystallites electron-hole pairs are generated and cause a compensation of the charge in the surface
    and within the crystallites. If it is assumed that the optical absorption depth is much less than the space charge region
    in the crystallites, then, because of their inclined shape more light is absorbed in one side than in the other. Thus a
    difference in the reduction of the charge is created between the two sides. This way a photovoltage parallel to the
    surface is developed in each crystallite.

    [1]  J. Starkiewicz, L. Sosnowski, and O. Simpson, Nature, Lond. 158, 28 (1946). Web link (http:/ / dx. doi. org/ 10. 1038/ 158028a0)
    [2]  B. Goldstein and L. Pensak, J. Appl. Phys. 30, 155 (1959). Web link (http:/ / dx. doi. org/ 10. 1063/ 1. 1735125)
    [3]  H. Kallmann, B. Kramer, E. Haidenmanakis, W. J. McAleer, H. Barkemeyer, and P. I. Pollak, J. Electrochem. Soc. 108, 247 (1961).
    [4]  U. Pal, S. Saha, A. K. Chaudhuri, and H. Banerjee, J. Appl. Phys. 69, 6547 (1991).
    [5]  M. D. Uspenskii, N. G. Ivanova, and I. E. Malkis, Sov. Phys.- Semicond. 1, 1059 (1968).
    [6]  E. I. Adirovich and L. M. Gol'Dshtein, Sov. Phys. Dokl. 9, 795 (1965).
    [7]  H. Reuter and H. Schmitt, J. Appl. Phys. 77, 3209 (1995). Web link (http:/ / dx. doi. org/ 10. 1063/ 1. 358674)
    [8]  Levi Aharoni, Hadar; Azulay, Doron; Millo, Oded; Balberg, Isaac (2008). "Anomalous photovoltaic effect in nanocrystalline Si/SiO2
        composites". Applied Physics Letters 92 (11): 112109. doi:10.1063/1.2897294. ISSN 0003-6951.
    [9] J. I. Pankove, Optical Processes in Semiconductors, (Dover Publications,New York, 1975).
    [10] H. R. Johnson, R. H. Williams, and C. H. B. Mee, and references therein, J. Phys. D Appl. Phys. 8, 1530 (1975). doi:
        10.1088/0022-3727/8/13/015 (http:/ / dx. doi. org/ 10. 1088/ 0022-3727/ 8/ 13/ 015)
    [11] V. M. Lyubin and G. A. Fedorova, Sov. Phys. Dokl. 135, 1343 (1960).
    [12] G. Brincourt and S. Martinuzzi, C. R. Acad. Sci. Paris 266, 1283 (1968).
    [13] S. M. Ryvkin, Photoelectric Effects in Semiconductors, page 296, (Consultants Bureau, New York, 1964).
Carbon nanofoam                                                                                                              13

    Carbon nanofoam
    Carbon nanofoam is an allotrope of carbon discovered in 1997 by Andrei V. Rode and co-workers at the Australian
    National University in Canberra.[1] It consists of a low-density cluster-assembly of carbon atoms strung together in a
    loose three-dimensional web.
    Each cluster is about 6 nanometers wide and consists of about 4000 carbon atoms linked in graphite-like sheets that
    are given negative curvature by the inclusion of heptagons among the regular hexagonal pattern. This is the opposite
    of what happens in the case of buckminsterfullerenes, in which carbon sheets are given positive curvature by the
    inclusion of pentagons.
    The large-scale structure of carbon nanofoam is similar to that of an aerogel, but with 1% of the density of
    previously produced carbon aerogels—or only a few times the density of air at sea level. Unlike carbon aerogels,
    carbon nanofoam is a poor electrical conductor. The nanofoam contains numerous unpaired electrons, which Rode
    and colleagues propose is due to carbon atoms with only three bonds that are found at topological and bonding
    defects. This gives rise to what is perhaps carbon nanofoam's most unusual feature: it is attracted to magnets, and
    below −183 °C can itself be made magnetic.

    Further reading
    • Rode, Andrei; Gamaly, Eugene; Luther-Davies, Barry. "Method for deposition of thin films", International Patent
      Application No. PCT/AU98/00739, priority date 11 September, 1997; "Method of deposition of thin films of
      amorphous and crystalline microstructures based on ultrafast pulsed laser deposition", US 6312760 [2] (2001).
    • Rode, A. V.; Gamaly, E. G.; Luther-Davies, B. (2000). "Formation of cluster-assembled carbon nano-foam by
      high-repetition-rate laser ablation". Applied Physics A: Materials Science & Processing 70 (2): 135–144.
    • Rode, A. V.; et al. (2002). "Electronic and magnetic properties of carbon nanofoam produced by
      high-repetition-rate laser ablation". Applied Surface Science 197–198: 644–649.
    • Rode, A. V.; et al. (2004). "Unconventional magnetism in all-carbon nanofoam" [3]. Phys. Rev. B 70 (5): 054407.
    • Gamaly, E. G.; Rode, A. V. (2004). "Nanostructures created by lasers" [4]. In Nalwa, H. S.. Encyclopaedia of
      Nanoscience and Nanotechnology. 7. Stevenson Range: American Scientific Publishers. pp. 783–809.
    • Rode, A. V.; et al. (2005). "Strong paramagnetism and possible ferromagnetism in pure carbon nanofoam
      produced by laser ablation" [5]. Journal of Magnetism and Magnetic Materials 290–291 (1): 298–301.
    • Arčon, D.; et al. (2006). "Origin of Magnetic Moments in Carbon Nanofoam" [6]. Phys. Rev. B 74 (1): 014438.
    • Blinc, R.; et al. (2006). "13C NMR and EPR of carbon nanofoam" [7]. Physica Status Solidi B 243 (13):
      3069–3072. doi:10.1002/pssb.200669152.
    • Rode, A. V.; et al. (2006). "Magnetic properties of novel carbon allotropes" [8]. In Makarova, Tatiana L.; Palacio,
      Fernando. Carbon-based magnetism: an overview of the magnetism of metal free carbon-based compounds and
      materials. Amsterdam: Elsevier. pp. 463–482. ISBN 0444519475.
    • Lau, D. W. M.; et al. (2007). "High-Temperature Formation of Carbon Onions within Nanofoam: An
      Experimental and Simulation Study" [9]. Phys. Rev. B 75 (23): 233408. doi:10.1103/PhysRevB.75.233408.
Carbon nanofoam                                                                                                                                         14

    [1] Rode, Andrei V.; et al. (1999). "Structural analysis of a carbon foam formed by high pulse-rate laser ablation". Applied Physics A: Materials
        Science & Processing 69 (7): S755–S758. doi:10.1007/s003390051522.
    [2] http:/ / v3. espacenet. com/ textdoc?DB=EPODOC& IDX=US6312760
    [3] http:/ / laserspark. anu. edu. au/ Pubs/ rode_04_unconventional. pdf
    [4] http:/ / laserspark. anu. edu. au/ Pubs/ gamaly_04_nanostructures. pdf
    [5] http:/ / laserspark. anu. edu. au/ Pubs/ rode_05_strong. pdf
    [6] http:/ / laserspark. anu. edu. au/ Pubs/ arcon_06_origin. pdf
    [7] http:/ / laserspark. anu. edu. au/ Pubs/ blinc_06_13c. pdf
    [8] http:/ / laserspark. anu. edu. au/ Pubs/ rode_06_magnetic. pdf
    [9] http:/ / laserspark. anu. edu. au/ Pubs/ lau_07_high. pdf

    Weili Dai
    Weili Dai (simplified Chinese: 戴伟立; traditional Chinese: 戴偉立; pinyin: Dài Wěilì) is co-founder and former
    Chief Operating Officer (COO) of Marvell Technology Group Ltd. She is married to Marvell CEO and co-founder
    Sehat Sutardja.[1]

    Life and work
    Dai received her Bachelor of Science in Computer Science from the University of California, Berkeley.
    Prior to founding Marvell, Ms. Dai was involved in software development and project management at Canon
    Research Center America, Inc.
    Since Marvell's founding in 1995, Dai has served variously as its Vice President, Corporate Secretary and a Director.
    Since 1999, she has been Executive Vice President and General Manager of the Communications Business Group. In
    this role, she is responsible for the Company’s communications product lines. Ms. Dai has also served as Executive
    Vice President and a Director of Marvell Semiconductor, Inc. since its inception until 2007.

    External links
    • An interview with Rory Moore [2] of CommNexus, from CTIA 2010
    • Pink Magazine interview [3], June 2009

    [1] Marvell Investor Information (http:/ / investor. marvell. com/ phoenix. zhtml?c=120802& p=irol-govmanage), retrieved May 26, 2010.
    [2] http:/ / vimeo. com/ 10412465
    [3] http:/ / www. pinkmagazine. com/ little_pink_book/ 2009/ june/ 03_dai_profile. html
Deathnium                                                                                                                    15

    Deathnium is a name given by early electronic engineers to a trap in semiconductors that reduced the lifetime of
    both electron and hole charge carriers.

    External links
    • Shockley's Nobel lecture [1]

    Transistor Electronics: Imperfections, Unipolar and Analog Transistors, Shockley, W., Bell Telephone Laboratories,
    Inc., Murray Hill, N.J.; Proceedings of the IRE Volume: 40, Issue: 11 pp: 1289-1313 (Nov. 1952)

    [1] http:/ / nobelprize. org/ nobel_prizes/ physics/ laureates/ 1956/ shockley-lecture. pdf

    Die shrink
    The term "die shrink" (sometimes "optical shrink" or "process shrink") refers to a simple semiconductor scaling
    of semiconductor devices, mainly transistors. The act of shrinking a die is to create a somewhat identical circuitry
    using a more advanced fabrication process, usually involves an advance of lithographic node. This reduces overall
    costs of a chip firm as the lack of major architectural changes of the processor designed, reducing the R&D cost,
    while at the same time allowing more processor dies to be manufactured on the same piece of silicon wafer, resulting
    in more revenues as per more products sold.
    "Die shrink" is popular among semiconductor firms, such as Intel, AMD (including the former ATI) and NVIDIA
    for enriching their product lines. Examples in the 2000s include the codenamed Cedar Mill Pentium 4 processors
    (from 90 nm CMOS to 65 nm CMOS) and Penryn Core 2 processors (from 65 nm CMOS to 45 nm CMOS), the
    codenamed Brisbane Athlon 64 X2 processors (from 90 nm SOI to 65 nm SOI), and various generations of GPUs
    from both ATI and NVIDIA. In January 2010, Intel released Clarkdale Core i5 and Core i7 processors fabricated
    with a 32 nm process, down from a previous 45 nm process used in older iterations of the Nehalem processor
    In CPU fabrications, it is noted that a "die shrink" always involves an advance to a lithographic node as defined by
    ITRS (for example, 600 nm, 350 nm, 250 nm, 180 nm, 130 nm, 90 nm to 65 nm then 45 nm nodes and so on), while
    for GPU manufacturing, the "die shrink" usually first involves in shrink the die on a node not defined by the ITRS
    (for instance the 150 nm, 110 nm, 80 nm, 55 nm and more currently 40 nm nodes, sometimes referred to as
    "half-node") which is a stopgap between two ITRS defined lithographic nodes, and then further shrink to the lower
    ITRS defined nodes, this helps saving further R&D costs.
    Die shrink is beneficial to end users as well, as shrinking a die reduces the current leakage in semiconductor devices
    while maintaining the same clock frequency of a chip, making a product with less power consumption, increased
    clock rate headroom, and lower prices.
Diffusion capacitance                                                                                                                        16

    Diffusion capacitance
    Diffusion capacitance is the capacitance due to transport of charge carriers between two terminals of a device, for
    example, the diffusion of carriers from anode to cathode in forward bias mode of a diode or from emitter to base
    (forward-biased junction in active region) for a transistor. In a semiconductor device with a current flowing through
    it (for example, an ongoing transport of charge by diffusion) at a particular moment there is necessarily some charge
    in the process of transit through the device. If the applied voltage changes to a different value and the current
    changes to a different value, a different amount of charge will be in transit in the new circumstances. The change in
    the amount of transiting charge divided by the change in the voltage causing it is the diffusion capacitance. The
    adjective "diffusion" is used because the original use of this term was for junction diodes, where the charge transport
    was via the diffusion mechanism. See Fick's law.
    To implement this notion quantitatively, at a particular moment in time let the voltage across the device be                     . Now
    assume that the voltage changes with time slowly enough that at each moment the current is the same as the DC
    current that would flow at that voltage, say          (the quasistatic approximation). Suppose further that the
    time to cross the device is the forward transit time                 . In this case the amount of charge in transit through the
    device at this particular moment, denoted            , is given by
    Consequently, the corresponding diffusion capacitance:                   . is
    In the event the quasi-static approximation does not hold, that is, for very fast voltage changes occurring in times
    shorter than the transit time    , the equations governing time-dependent transport in the device must be solved to
    find the charge in transit, for example the Boltzmann equation. That problem is a subject of continuing research
    under the topic of non-quasistatic effects. See Liu [1] , and Gildenblat et al.[2]

    References notes
    [1] William Liu (2001). MOSFET Models for Spice Simulation (http:/ / worldcat. org/ isbn/ 0471396974). New York: Wiley-Interscience.
        pp. 42–44. ISBN 0-471-39697-4. .
    [2] Hailing Wang, Ten-Lon Chen, and Gennady Gildenblat, Quasi-static and Nonquasi-static Compact MOSFET Models http:/ / pspmodel. asu.
        edu/ downloads/ ted03. pdf

    External links
    • Junction capacitance (
Electron mobility                                                                                                                17

    Electron mobility
          This article describes mobility for electrons and holes in metals and semiconductors. For the general concept,
          see Electrical mobility.
    In solid-state physics, the electron mobility characterizes how quickly an electron can move through a metal or
    semiconductor, when pulled by an electric field. In semiconductors, there is an analogous quantity for holes, called
    hole mobility. The term carrier mobility refers in general to both electron and hole mobility in semiconductors.
    Electron and hole mobility are special cases of electrical mobility of charged particles in a fluid under an applied
    electric field.
    When an electric field E is applied across a piece of material, the electrons respond by moving with an average
    velocity called the drift velocity, . Then the electron mobility μ is defined as
    Electron mobility is almost always specified in units of cm2/(V·s). This is different from the SI unit of mobility,
    m2/(V·s). They are related by 1m2/(V·s) = 104cm2/(V·s).
    Conductivity is proportional to the product of mobility and carrier concentration. For example, the same conductivity
    could come from a small number of electrons with high mobility for each, or a large number of electrons with a
    small mobility for each. For metals, it would not typically matter which of these is the case. (Most metal electrical
    behavior in depends on conductivity alone.) Therefore mobility is relatively unimportant in metal physics. On the
    other hand, for semiconductors, the behavior of transistors and other devices can be very different depending on
    whether there are many electrons with low mobility or few electrons with high mobility. Therefore mobility is a very
    important parameter for semiconductor materials. Almost always, higher mobility leads to better device
    performance, other things equal.
    Semiconductor mobility depends on the impurity concentrations (including donor and acceptor concentrations),
    defect concentration, temperature, and electron and hole concentrations. It also depends on the electric field,
    particularly at high fields when velocity saturation occurs. It can be determined by the Hall effect, or inferred from
    transistor behavior.


    Drift velocity in an electric field
    Without any applied electric field, in a solid, electrons ( or, in the case of semiconductors, both electrons and holes )
    move around randomly. Therefore, on average there will be no overall motion of charge carriers in any particular
    direction over time.
    However, when an electric field is applied, each electron is accelerated by the electric field. If the electron were in a
    vacuum, it would be accelerated to faster and faster velocities (called ballistic transport). However, in a solid, the
    electron repeatedly scatters off crystal defects, phonons, impurities, etc. Therefore, it does not accelerate faster and
    faster; instead it moves with a finite average velocity, called the drift velocity. This net electron motion is usually
    much slower than the normally occurring random motion.
    In a semiconductor the two charge carriers, electrons and holes, will typically have different drift velocities for the
    same electric field.
    Quasi-ballistic transport is possible in solids if the electrons are accelerated across a very small distance (as small as
    the mean free path), or for a very short time (as short as the mean free time). In these cases, drift velocity and
    mobility are not meaningful.
Electron mobility                                                                                                                 18

    Definition and units
    The electron mobility is defined by the equation:
           E is the magnitude of the electric field applied to a material,
           vd is the magnitude of the electron drift velocity (in other words, the electron drift speed) caused by the electric
           field, and
           µ is the electron mobility.
    The hole mobility is defined by the same equation. Both electron and hole mobilities are positive by definition.
    Usually, the electron drift velocity in a material is directly proportional to the electric field, which means that the
    electron mobility is a constant (independent of electric field). When this is not true (for example, in very large
    electric fields), the mobility depends on the electric field.
    The SI unit of velocity is m/s, and the SI unit of electric field is V/m. Therefore the SI unit of mobility is (m/s)/(V/m)
    = m2/(V·s). However, mobility is much more commonly expressed in cm2/(V·s) = 10−4 m2/(V·s).
    Mobility is usually a strong function of material impurities and temperature, and is determined empirically, mobility
    values are typically presented in table or chart form. Mobility is also different for electrons and holes in a given

    Relation to conductivity
    There is a simple relation between mobility and electrical conductivity. Let n be the number density of electrons, and
    let μe be their mobility. In the electric field E, each of these electrons will move with the velocity vector    , for
    a total current density of            (where e is the elementary charge). Therefore, the electrical conductivity σ
    This formula is valid when the conductivity is due entirely to electrons. In a p-type semiconductor, the conductivity
    is due to holes instead, but the formula is essentially the same: If p is the density of holes and μh is the hole mobility,
    then the conductivity is
    If a semiconductor has both electrons and holes, the total conductivity is[1]

    Typical electron mobility for Si at room temperature (300 K) is 1400 cm2/ (V·s) and the hole mobility is around
    450 cm2/ (V·s).[2]
    Very high mobility has been found in several low-dimensional systems, such as two-dimensional electron gases
    (2DEG) (3,000,000 cm2/(V·s) at low temperature),[3] carbon nanotubes (100,000 cm2/(V·s) at room temperature) [4]
    and more recently, graphene (200,000 cm2/ V·s at low temperature).[5] Organic semiconductors (polymer, oligomer)
    developed thus far have carrier mobilities below 10 cm2/(V·s), and usually much lower.
Electron mobility                                                                                                                   19

    Electric field dependence and velocity saturation
    At low fields, the drift velocity vd is proportional to the electric field E, so mobility μ is constant. This value of μ is
    called the low-field mobility.
    As the electric field is increased, however, the carrier velocity increases sub-linearly and asymptotically towards an
    maximum possible value, called the saturation velocity vsat. For example, the value of vsat is on the order of 1×107
    cm/s for both electrons and holes in Si. It is on the order of 6×106 cm/s for Ge. This velocity is a characteristic of the
    material and a strong function of doping or impurity levels and temperature. It is one of the key material and
    semiconductor device properties that determine a device such as a transistor's ultimate limit of speed of response and
    This velocity saturation phenomenon results from a process called optical phonon scattering. At high fields, carriers
    are accelerated enough to gain sufficient kinetic energy between collisions to emit an optical phonon, and they do so
    very quickly, before being accelerated once again. The velocity that the electron reaches before emitting a phonon is:

    where ωphonon(opt.) is the optical phonon angular frequency and m*is the carrier effective mass in the direction of the
    electric field. The value of Ephonon (opt.) is 0.063 eV for Si and 0.034 eV for GaAs and Ge. The saturation velocity is
    only one-half of vemit, because the electron starts at zero velocity and accelerates up to vemit in each cycle.[6] (This is
    a somewhat oversimplified description.[6] )
    Velocity saturation is not the only possible high-field behavior. Another is the Gunn effect, where a sufficiently high
    electric field can causes intervalley electron transfer, which reduces drift velocity. (This is unusual; increasing the
    electric field almost always increases the drift velocity, or else leaves it unchanged.) The result is negative
    differential resistance.
    In the regime of velocity saturation (or other high-field effects), mobility is a strong function of electric field. This
    means that mobility is a somewhat less useful concept, compared to simply discussing drift velocity directly.

    Relation between scattering and mobility
    Recall that by definition, mobility is dependent on the drift velocity. The main factor determining drift velocity
    (other than effective mass) is scattering time, i.e., how long the carrier is ballistically accelerated by the electric field
    until it scatters (collides) with something that changes its direction and/or energy. The most important sources of
    scattering in typical semiconductor materials, discussed below, are ionized impurity scattering and acoustic phonon
    scattering (also called lattice scattering). In some cases other sources of scattering may be important, such as neutral
    impurity scattering, optical phonon scattering, surface scattering, and defect scattering.[7]

    Ionized impurity scattering
    Semiconductors are doped with donors and/or acceptors, which are typically ionized, and are thus charged. The
    Coulombic forces will deflect an electron or hole approaching the ionized impurity. This is known as ionized
    impurity scattering. The amount of deflection depends on the speed of the carrier and its proximity to the ion. The
    more heavily a material is doped, the higher the probability that a carrier will collide with an ion in a given time, and
    the smaller the mean free time between collisions, and the smaller the mobility.
Electron mobility                                                                                                                 20

    Lattice (phonon) scattering
    At any temperature above absolute zero, the vibrating atoms create pressure (acoustic) waves in the crystal, which
    are termed phonons. Like electrons, phonons can be considered to be particles. A phonon can interact (collide) with
    an electron (or hole) and scatter it. At higher temperature, there are more phonons, therefore increased phonon
    scattering which tends to reduce mobility.

    Relation between mobility and scattering time
    A simple model gives the approximate relation between scattering time (average time between scattering events) and
    mobility. It is assumed that after each scattering event, the carrier's motion is randomized, so it has zero average
    velocity. After that, it accelerates uniformly in the electric field, until it scatters again. The resulting average drift
    velocity is:[8]

    where q is the elementary charge, m* is the carrier effective mass, and τ is the average scattering time.
    If the effective mass is anisotropic (direction-dependent), m* is the effective mass in the direction of the electric

    Matthiessen's rule
    Normally, more than one source of scattering is present, for example both impurities and lattice phonons. It is
    normally a very good approximation to combine their influences using "Matthiessen's Rule" (developed from work
    by Augustus Matthiessen in 1864):


    where µ is the actual mobility,                 is the mobility that the material would have if there was impurity
    scattering but no other source of scattering, and                is the mobility that the material would have if there was
    lattice phonon scattering but no other source of scattering. Other terms may be added for other scattering sources, for


    Matthiessen's rule can also be stated in terms of the scattering time:


    where τ is the true average scattering time and τimpurities is the scattering time if there was impurity scattering but no
    other source of scattering, etc.
    Matthiessen's rule is an approximation and is not universally valid. For example, lattice scattering alters the average
    electron velocity (in the electric-field direction), which in turn alters the tendency to scatter off impurities. There are
    more complicated formulas that attempt to take these effects into account.[9]
Electron mobility                                                                                                                    21

    Temperature dependence of mobility

                                 Typical temperature dependence of mobility[1]
                                (depends on the temperature range and sample)
                                                               Si      Ge    GaAs

                                                 Electrons   ∝T −2.4 ∝T −1.7 ∝T −1.0

                                                  Holes      ∝T −2.2 ∝T −2.3 ∝T −2.1

    With increasing temperature, phonon concentration increases and causes increased scattering. Thus lattice scattering
    lowers the carrier mobility more and more at higher temperature. Theoretical calculations reveal that the mobility in
    non-polar semiconductors, such as silicon and germanium, is dominated by acoustic phonon interaction. The
    resulting mobility is expected to be proportional to T −3/2, while the mobility due to optical phonon scattering only is
    expected to be proportional to T −1/2. Experimentally, values of the temperature dependence of the mobility in Si, Ge
    and GaAs are listed in table.[1]
    The effect of ionized impurity scattering, however, decreases with increasing temperature because the average
    thermal speeds of the carriers are increase.[7] Thus, the carriers spend less time near an ionized impurity as they pass
    and the scattering effect of the ions is thus reduced.
    These two effects operate simultaneously on the carriers through Matthiessen's rule. At lower temperatures, ionized
    impurity scattering dominates, while at higher temperatures, phonon scattering dominates, and the actual mobility
    reaches a maximum at an intermediate temperature.

    Measurement of semiconductor mobility

    Hall mobility
    Carrier mobility is most commonly measured using the Hall effect. The
    result of the measurement is called the "Hall mobility" (meaning
    "mobility inferred from a Hall-effect measurement").
    Consider a semiconductor sample with a rectangular cross section as
    shown in the figures, a current is flowing in the x-direction and a
    magnetic field is applied in the z-direction. The resulted Lorenz's force
    will accelerates the electrons (n-type materials) or holes (p-type
    materials) in the (−y) direction, according to the right hand rule and set          Hall Effect measurement setup for holes
    up an electric field ξy. As a result there is a voltage across the sample,
    which can be measured with a high-impedance voltmeter. This voltage,
    VH, is called the Hall voltage. VH is positive for n-type material and
    negative for p-type material.

    Mathematically, the Lorentz force acting on a charge Q is given by
    For electrons:

                                                                                       Hall Effect measurement setup for electrons
Electron mobility                                                                                                          22

    For holes:

    In steady state this force is balanced by the force set up by the Hall voltage, so that there is no net force on the
    carriers in the y direction. For electron,

    For electrons, the field points in the +y direction, and for holes, it points in the −y direction.
    The electron current I is given by                      . Sub vx into the expression for ξy,

    where RHn is the Hall coefficient for electron, and is defined as


    Similarly, for holes

    From Hall coefficient, we can obtain the carrier mobility as follows:


    Here the value of VHp (Hall voltage), t (sample thickness), I (current) and B (magnetic field) can be measured
    directly, and the conductivities σn or σp are either known or can be obtained from measuring the resistivity.
Electron mobility                                                                                                            23

    Field-effect mobility
    The mobility can also be measured using a field-effect transistor (FET). The result of the measurement is called the
    "field-effect mobility" (meaning "mobility inferred from a field-effect measurement").
    The measurement can work in two ways: From saturation-mode measurements, or linear-region measurements.[10]
    (See MOSFET for a description of the different modes or regions of operation.)

    Using saturation mode
    In this technique,[10] for each fixed gate voltage VGS, the drain-source voltage VDS is increased until the current ID
    saturates. Next, the square root of this saturated current is plotted against the gate voltage, and the slope msat is
    measured. Then the mobility is:

    where L and W are the length and width of the channel and Ci is the gate insulator capacitance per unit area. This
    equation comes from the approximate equation for a MOSFET in saturation mode:

    where Vth is the threshold voltage. This approximation ignores the Early effect (channel length modulation), among
    other things. In practice, this technique may underestimate the true mobility.[10]

    Using the linear region
    In this technique,[10] the transistor is operated in the linear region (or "ohmic mode"), where VDS is small and
                 with slope mlin. Then the mobility is:


    This equation comes from the approximate equation for a MOSFET in the linear region:

    In practice, this technique may overestimate the true mobility, because if VDS is not small enough and VG is not
    large enough, the MOSFET may not stay in the linear region.[10]

    Doping concentration dependence in heavily-doped silicon
    The charge carriers in semiconductors are electrons and holes. Their numbers are controlled by the concentrations of
    impurity elements, i.e. doping concentration. Thus doping concentration has great influence on carrier mobility.
    While there is considerable scatter in the experimental data, for noncompensated material (no counter doping) for
    heavily doped substrates (i.e.             and up), the mobility in silicon is often characterized by the empirical

    where N is the doping concentration (either ND or NA), and Nref and α are fitting parameters. At room temperature,
    the above equation becomes: Majority carriers:[12]
Electron mobility                                                                                                                                           24

    Minority carriers:[13]

    These equations apply only to silicon, and only under low field.

    [1] Chapter 2: Semiconductor Fundamentals (http:/ / ece-www. colorado. edu/ ~bart/ book/ book/ chapter2/ ch2_7. htm). Online textbook by B.
        Van Zeghbroeck]
    [2] Electrical properties of silicon (http:/ / www. ioffe. rssi. ru/ SVA/ NSM/ Semicond/ Si/ electric. html), Ioffe Institute Database
    [3] Harris, J. J.; Foxon, C. T.; Barnham, K. W. J.; Lacklison, D. E.; Hewett, J.; White, C. (1987). "Two-dimensional electron gas structures with
        mobilities in excess of 3×106 cm2 V−1 s−1". Journal of Applied Physics 61: 1219. doi:10.1063/1.338174.
    [4] Dürkop, T.; Getty, S. A.; Cobas, Enrique; Fuhrer, M. S. (2004). "Extraordinary Mobility in Semiconducting Carbon Nanotubes". Nano
        Letters 4: 35. doi:10.1021/nl034841q.
    [5] Bolotin, K; Sikes, K; Jiang, Z; Klima, M; Fudenberg, G; Hone, J; Kim, P; Stormer, H (2008). "Ultrahigh electron mobility in suspended
        graphene" (http:/ / arxiv. org/ abs/ 0802. 2389). Solid State Communications 146: 351. doi:10.1016/j.ssc.2008.02.024. .
    [6] Vladimir Vasilʹevich Mitin; Vi︠a︡cheslav Aleksandrovich Kochelap; Michael A. Stroscio (1999). Quantum heterostructures:
        microelectronics and optoelectronics (http:/ / books. google. com/ books?id=Wzo4IdxS48oC& pg=PA308). Cambridge University Press.
        pp. 307–9. ISBN 9780521636353. . Retrieved 2 March 2011.
    [7] Singh. Electronic Devices And Integrated Circuits (http:/ / books. google. com/ books?id=2aqtlybkFE0C& pg=PA77). PHI Learning Pvt.
        Ltd.. pp. 77–. ISBN 9788120331921. . Retrieved 1 March 2011.
    [8] Peter Y. Yu; Manuel Cardona (30 May 2010). Fundamentals of Semiconductors: Physics and Materials Properties (http:/ / books. google.
        com/ books?id=5aBuKYBT_hsC& pg=PA205+ ). Springer. pp. 205–. ISBN 9783642007095. . Retrieved 1 March 2011.
    [9] Antonio Luque; Steven Hegedus (9 June 2003). Handbook of photovoltaic science and engineering (http:/ / books. google. com/
        books?id=u-bCMhl_JjQC). John Wiley and Sons. p. 79, eq. 3.58. ISBN 9780471491965. . Retrieved 2 March 2011. weblink (subscription
        only) (http:/ / www. knovel. com/ web/ portal/ browse/ display?_EXT_KNOVEL_DISPLAY_bookid=1081)
    [10] Constance Rost-Bietsch (August 2005). Ambipolar and Light-Emitting Organic Field-Effect Transistors (http:/ / books. google. com/
        books?id=Xxvt0CkVKaIC& pg=PA17). Cuvillier Verlag. pp. 17–. ISBN 9783865375353. . Retrieved 1 March 2011.. This reference
        mistakenly leaves out a factor of 1/VDS in eqn (2.11). The correct version of that equation can be found, e.g., in Stassen, A. F.; De Boer, R. W.
        I.; Iosad, N. N.; Morpurgo, A. F. (2004). "Influence of the gate dielectric on the mobility of rubrene single-crystal field-effect transistors".
        Applied Physics Letters 85: 3899. doi:10.1063/1.1812368.
    [11] B. L. Anderson and R. L. Anderson, "Fundamentals of Semiconductor Devices, " Mc Graw Hill, 2005
    [12] Caughey, D.M.; Thomas, R.E. (1967). "Carrier mobilities in silicon empirically related to doping and field". Proceedings of the IEEE 55:
        2192. doi:10.1109/PROC.1967.6123.
    [13] Del Alamo, J (1985). "Measuring and modeling minority carrier transport in heavily doped silicon". Solid-State Electronics 28: 47.

    External links
    • The minority Carrier Lifetime in silicon wafer (
    • semiconductor glossary entry for electron mobility (
    • Resistivity and Mobility Calculator from the BYU Cleanroom (
    • Online lecture- Mobility ( from an atomistic point of view
Equivalent oxide thickness                                                                                                      25

    Equivalent oxide thickness
    An Equivalent oxide thickness is a distance, usually given in nanometers (nm), which indicates how thick a silicon
    oxide film would need to be to produce the same effect as the high-k material being used.
    The term is often used when describing field effect transistors which rely on an electrically insulating pad of material
    between a gate and a doped semiconducting region. Device performance has typically been improved by reducing
    the thickness of a silicon oxide insulating pad. As the thickness approached 5-10 nm, leakage became a problem and
    alternate materials were necessary to increase the thickness while retaining the switching speed. Materials having
    larger dielectric constants enable thicker films to be used for this purpose while retaining fast reaction of the
    transistor. For example, a high-k material with dielectric constant of 39 (compared to 3.9 for silicon oxide) can be
    made ten times thicker than silicon oxide which helps to reduce the leakage of electrons across the dielectric pad.

    Etch pit density
    The etch pit density (EPD) is a measure for the quality of semiconductor wafers. An etch solution is applied on the
    surface of the wafer where the etch rate is increased at dislocations of the crystal resulting in pits. For GaAs one uses
    typically molten KOH at 450 degrees Celsius for about 40 minutes in a zirconium crucible. The density of the pits
    can be determined by optical contrast microscopy. Silicon wafers have usually a very low density of < 100 cm−2
    while semi-insulating GaAs wafers have a density on the order of 105 cm−2.
    The etch pit density can be determined according to DIN 50454-1 and ASTM F 1404.

    EV Group
    EV Group (EVG) is a supplier of wafer processing solutions for the semiconductor, MEMS and nanotechnology
    industry. Key products include manual and fully automated lithography systems, wafer bonders and metrology
    equipment which can be used both for R&D and high volume production. The equipment is manufactured at the
    company’s headquarters located in St. Florian am Inn (Austria). But EV Group is not only an equipment supplier, the
    company also offers process support and development.

    The company, originally known under the name of Electronic Visions Co., was founded by Erich Thallner (now
    EVG’s president) and Aya Maria Thallner in 1980. EVG operates via a global sales and customer support network
    with subsidiaries in the US, Japan, South Korea and Taiwan and employs approximately 450 employees worldwide.
    In 1985, EVG developed the first double-side mask aligner with bottom side microscopes for the commercialization
    of MEMS products (microelectromechanical systems). In 1990, EVG introduced the process concept of separation
    between wafer alignment and bonding, which has since become a worldwide industry standard. The introduction of
    the first production wafer bonding system for volume MEMS production in 1992 laid the foundation for the
    company’s wafer bonder business. In 1994, EVG installed the first SOI Production Bonders for volume production
    of high-quality SOI (Silicon on insulator) wafers. In 1999, EVG developed the patented SmartView wafer alignment
    system, which incorporates a revolutionary face-to-face alignment technology for Wafer-level Packaging
    technologies and 3D interconnects. As early as 2001 EVG developed the first temporary bonding and debonding
    systems as a key enabling technology for 3D integration with TSV (through-silicon via) technology. The world's first
    fully automated production wafer bonding system for 300 mm wafers was launched by EVG in 2007, paving the way
    for the commercialization of 3D integration.[1] EVG’s next-generation UV-NIL Step & Repeat (NIL = Nanoimprint
EV Group                                                                                                                  26

   lithography) system, first installed in 2009, supports a new approach in wafer-level optics / micro-lens mastering.
   Also in 2009, EVG launched the first fully-automated production fusion bonding system with optical alignment for
   back-side illuminated CMOS image sensors and 3D-IC.

   EVG meets the varied demands of diverse markets. The company holds the dominant share of the market for wafer
   bonding equipment (especially SOI bonding) and is a leader in lithography for advanced packaging and
   • Advanced Packaging, 3D Interconnect: Wafer level packaging employs specific alignment and wafer bonding
     techniques as an enabling solution for stacking of wafers and three-dimensional integration of devices.
   • MEMS (MicroElectroMechanical Systems): Micro-Electro-Mechanical Systems (MEMS) is the integration of
     mechanical elements, sensors, actuators, and electronics on a common silicon substrate through microfabrication
   • SOI (Silicon-On-Insulator): SOI (Silicon-on-Insulator) is a semiconductor technology, which enables a full
     isolation of each electronic component on an integrated circuit by using a buried oxide layer.
   • Compound Semiconductor and Silicon based Power Devices: Microelectronic applications fabricated out of
     compound semiconductors as well as silicon-based power devices basically require dedicated manufacturing
     technologies offered by EVG.
   • Nanotechnology: Nanotechnology refers to a field of applied science and technology whose theme is the control
     of matter on the atomic and molecular scale, generally 100 nanometers or smaller, and the fabrication of devices
     or materials that lie within that size range.

   EV Group offers a complete portfolio of wafer-level manufacturing solutions for various micro- and nanotechnology
   applications and products, addressing established as well as emerging markets. Selected manufacturing solutions are:
   •   CMOS Image Sensors
   •   High Brightness LEDs
   •   Lab-on-Chip
   •   Logic/Memory
   •   MEMS devices
   •   SAW devices
   •   SOI wafers
   •   Wafer Level Optics

   •   MEMS Industrie Group [2]
   •   Austrian Society for Microsystemtechnology
   •   Optical Society of America
   •   SEMI [3]
   •   NILCom [4]
   •   EMC3D [5]
   •   MANCEF
   •   MEMS Industrie Group
EV Group                                                                                                                                   27

   [1] Future Fab International (2010, July): Recent Advances in Submicron Alignment 300 mm Copper-Copper Thermocompressive Face-to-Face
       Wafer-to-Wafer Bonding and Integrated Infrared, High Speed FIB Metrology; 84-92
   [2] http:/ / www. memsindustrygroup. org/ i4a/ pages/ index. cfm?pageid=1
   [3] http:/ / www. semi. org
   [4] http:/ / www. nilcom. org
   [5] http:/ / www. emc3d. org

   External links
   EV Group (
   Von Trapp, Francoise: EV Group: "Triple I" at Work (http:/ / www. semineedle. com/ posting/ 89531?snc=20641);

   Floating body effect
   The floating body effect is the effect of dependence of the body potential of a transistor realized by the silicon on
   insulator technology on the history of its biasing and the carrier recombination processes. The transistor's body forms
   a capacitor against the insulated substrate. The charge accumulates on this capacitor and may cause adverse effects,
   for example, opening of parasitic transistors in the structure and causing off-state leakages, resulting in higher
   current consumption and in case of DRAM in loss of information from the memory cells. It also causes the history
   effect, the dependence of the threshold voltage of the transistor on its previous states. On analog devices, the floating
   body effect is known as the kink effect.
   One countermeasure to floating body effect involves use of fully depleted devices. The insulator layer in FD devices
   is significantly thinner than the channel depletion width. The charge and thus also the body potential of the
   transistors is therefore fixed. [1] However, the short-channel effect is worsened in the FD devices, the body may still
   charge up if both source and drain are high, and the architecture is unsuitable for some analog devices that require
   contact with the body. [2] Hybrid trench isolation is another approach.[3]
   While floating body effect presents a problem in SOI DRAM chips, it is exploited as the underlying principle for
   ZRAM and TTRAM technologies. For this reason, the effect is sometimes called the Cinderella effect in this
   context, because it transforms a disadvantage into an advantage.[4]

   [1]   IBM research (http:/ / ieeexplore. ieee. org/ xpls/ abs_all. jsp?arnumber=5388998)
   [2]   EETimes report (http:/ / www. eetimes. com/ story/ OEG20011126S0031)
   [3]   EETimes report (http:/ / www. eet. com/ story/ OEG20011217S0044)
   [4]   http:/ / www. onversity. net/ load/ zram. pdf
Haynes–Shockley experiment                                                                                                     28

    Haynes–Shockley experiment
    The Haynes–Shockley experiment was a classic experiment that demonstrated that diffusion of minority carriers in
    a semiconductor could result in a current. The experiment was reported in a paper by Shockley, Pearson, and Haynes
    in 1949.[1] [2] The experiment can be used to measure carrier mobility, carrier lifetime, and diffusion coefficient.[3]
    In the experiment, a piece of semiconductor gets a pulse of holes, for example, as induced by voltage or a short laser
    To see the effect, we consider a n-type semiconductor with the length d. We are interested in determining the
    mobility of the carriers, diffusion constant and relaxation time. In the following, we reduce the problem to one
    The equations for electron and hole currents are:

    where the first part is the drift current and the second is the diffusion current.
    We consider the continuity equation:

    The electrons and the holes recombine with the time       .
    We define                  and                  so the upper equations can be rewritten as:

    In a simple approximation, we can consider the electric field to be constant between the left and right electrodes and
    neglect        . However, as electrons and holes diffuse at a different speed, the material has a local electric charge,

    inducing an inhomogeneous electric field which can be calculated with Gauss's law:

    We make the following change of variables:                            ,                  , and suppose     to be much
    smaller than         . The two initial equations write:

    Thanks to Einstein relation               , these two equations can be combined:

    where for       ,    and    holds:
Haynes–Shockley experiment                                                                                                                             29

                                          ,                             and

    Considering n>>p or                 (that is a fair approximation for a semiconductor with only few holes injected), we see

    that                 ,              and                 . The semiconductor behaves as if there were only holes traveling in

    The final equation for the carriers is:

    This can be interpreted as a delta function that is created immediately after the pulse. Holes then start to travel
    towards the electrode where we detect them. The signal then is Gaussian curve shaped.
    Parameters               and   can be obtained from the shape of the signal.

    [1] Shockley, W. and Pearson, G. L., and Haynes, J. R. (1949). "Hole injection in germanium – Quantitative studies and filamentary transistors".
        Bell System Technical Journal 28: 344–366.
    [2] Jerrold H. Krenz (2000). Electronic concepts: an introduction (http:/ / books. google. com/ books?id=Le9zdVoMEOEC& pg=PA137).
        Cambridge University Press. p. 137. ISBN 9780521662826. .
    [3] Ajay Kumar Singh (2008). Electronic Devices And Integrated Circuits (http:/ / books. google. com/ books?id=2aqtlybkFE0C& pg=PA119).
        PHI Learning Pvt. Ltd.. p. 119. ISBN 9788120331921. .

    External links
    • Applet simulating the Haynes–Shockley experiment (
Hot carriers injection                                                                                                          30

     Hot carriers injection
     Hot carriers injection (HCI) is the phenomenon in solid-state or semiconductor electronic devices where either an
     electron or a “hole” gains sufficient kinetic energy to overcome a potential barrier necessary to break an interface
     state. The term hot electron comes from the effective temperature used to model carrier density (with fermi dirac
     function). One should not think that the term "hot" refers to the actual temperature of the MOS transistor. At higher
     temperatures, the mean free path (distance between two collisions with atoms in the substrate) is shorter, which
     decreases the energy gain by the carrier. As a result, Hot Carrier Degradation is more important at low temperature.

     HCI and CMOS Semiconductor Technology

     Semiconductor Physics of HCI
     The term “hot carrier injection” usually refers to the effect in MOSFETs, where a carrier is injected from the
     conducting channel in the silicon substrate to the gate dielectric, which usually is made of silicon dioxide (SiO2).
     To become “hot” and enter the conduction band of SiO2, an electron must gain a kinetic energy of 3.3 eV. For holes,
     the valence band offset in this case dictates they must have a kinetic energy of 4.6 eV.
     When electrons are accelerated in the channel, they gain energy along the mean free path. This energy is lost in two
     different ways:
     1. The carrier hit an atom in the substrate. Then the collision create a cold carrier and an additional electron-hole
        pair. In the case of nMOS transistors, additional electrons are collected by the channel and additional holes are
        evacuated by the substrate.
     2. The carrier hit a Si-H bond and break the bond. An interface state is created and the Hydrogen atom is released in
        the substrate.
     The probability to hit either an atom or a Si-H bond is random. And the average energy involved in each process is
     the same in both case.
     This is the reason why the substrate current is monitored during HCI stress. A high substrate current means a large
     number of created electron-hole pairs and thus an efficient Si-H bond breakage mechanism.
     When interface states are created, the threshold voltage is modified and the subthreshold slope is degraded. This
     leads to lower current, and degrades the operating frequency of integrated circuit.

     Scaling and HCI
     Advances in semiconductor manufacturing techniques and ever increasing demand for faster and more complex
     integrated circuits (ICs) have driven the associated Metal–Oxide–Semiconductor field-effect transistor (MOSFET)
     to scale to smaller dimensions.
     However, it has not been possible to scale the supply voltage used to operate these ICs proportionately due to factors
     such as compatibility with previous generation circuits, noise margin, power and delay requirements, and
     non-scaling of threshold voltage, subthreshold slope, and parasitic capacitance.
     As a result internal electric fields increase in aggressively scaled MOSFETs, which comes with the additional benefit
     of increased carrier velocities (up to velocity saturation), and hence increased switching speed, but also presents a
     major reliability problem for the long term operation of these devices, as high fields induce hot carrier injection
     which affects device reliability.
     Large electric fields in MOSFETs imply the presence of high-energy carriers, referred to as “hot carriers”. These hot
     carriers that have sufficiently high energies and momenta to allow them to be injected from the semiconductor into
     the surrounding dielectric films such as the gate and sidewall oxides as well as the buried oxide in the case of silicon
Hot carriers injection                                                                                                             31

     on insulator (SOI) MOSFETs.

     CMOS Reliability Impact of HCI
     The presence of such mobile carriers in the oxides triggers numerous physical damage processes that can drastically
     change the device characteristics over prolonged periods. The accumulation of damage can eventually cause the
     circuit to fail as key parameters such as threshold voltage shift due to such damage. The accumulation of damage
     resulting degradation in device behavior due to hot carrier injection is called “hot carrier degradation”.
     The useful life-time of circuits and integrated circuits based on such a MOS device are thus affected by the life-time
     of the MOS device itself. To assure that integrated circuits manufactured with minimal geometry devices will not
     have their useful life impaired, the life-time of the component MOS devices must have their HCI degradation well
     understood. Failure to accurately characterize HCI life-time effects can ultimately affect business costs such as
     warranty and support costs and impact marketing and sales promises for a foundry or IC manufacturer.

     Relationship to Radiation Effects
     Hot carrier degradation is fundamentally same as the ionization radiation effect known as the total dose damage to
     semiconductors, as experienced in space systems due to solar proton, electron, X-ray and gamma ray exposure.

     HCI and NOR Flash Memory Cells
     HCI is the basis of operation for a number of non-volatile memory technologies such as Electrically Erasable
     Programmable Read-Only Memory (EEPROM) cells. As soon as the potential detrimental influence of HC injection
     on the circuit reliability was recognized, several fabrication strategies were devised to reduce it without
     compromising the circuit performance.
     NOR flash memory exploits the principle of hot carriers injection by deliberately injecting carriers across the gate
     oxide to charge the floating gate. This charge alters the MOS transistor threshold voltage to represent a logic '0' state.
     An uncharged floating gate represents a '1' state. Erasing the NOR Flash memory cell removes stored charge through
     the process of Fowler–Nordheim tunneling.
     Because of the damage to the oxide caused by normal NOR Flash operation, HCI damage is one of the factors that
     cause the number of write-erase cycles to be limited. Because the ability to hold charge and the formation of damage
     traps in the oxide affects the ability to have distinct '1' and '0' charge states, HCI damage results in the closing of the
     non-volatile memory logic margin window over time. The number of write-erase cycles at which '1' and '0' can no
     longer be distinguished defines the endurance of a non-volatile memory.

     External links
     • An article [1] about hot carriers at [2]
     • IEEE International Reliability Physics Symposium [3], the primary academic and technical conference for
       semiconductor reliability involving HCI and other reliability phenomena

     [1] http:/ / www. siliconfareast. com/ hotcarriers. htm
     [2] http:/ / www. siliconfareast. com
     [3] http:/ / www. irps. org
Impact ionization                                                                                                         32

    Impact ionization
    Impact ionization is the process in a
    material by which one energetic charge
    carrier can lose energy by the creation
    of other charge carriers. For example,
    in semiconductors, an electron (or
    hole) with enough kinetic energy can
    knock a bound electron out of its
    bound state (in the valence band) and
    promote it to a state in the conduction
    band, creating an electron-hole pair.

    If this occurs in a region of high
    electrical field then it can result in
    avalanche breakdown. This process is
    exploited in avalanche diodes, by
    which a small optical signal is
                                                                An example of impact ionization in a semiconductor.
    amplified before entering an external
    electronic circuit. In an avalanche
    photodiode the original charge carrier is created by the absorption of a photon.

    In some sense, impact ionization is the reverse process to Auger recombination.
    Avalanche photodiodes(APD's) are used in Optical receivers before the signal is given to the receiver circuitry the
    photon is multiplied with the photocurrent and this increases the sensitivity of the receiver since photocurrent is
    multiplied before encountering of the thermal noise associated with the receiver circuit
International Electron Devices Meeting                                                                                        33

    International Electron Devices Meeting
    The IEEE International Electron Devices Meeting is an annual electronics conference held alternately in San
    Francisco, California and Washington D.C. each December. Established in 1955, the IEDM is the world’s main
    forum for the presentation of research on electron devices.
    IEDM 2010 will be held at the Hilton San Francisco Union Square, San Francisco, CA, USA on December 6–8,
    2010, preceded by a day of Short Courses on Sunday, Dec. 5.
    The IEDM is the largest and most prestigious gathering for scientists and engineers to disclose, discuss and debate
    the best recent R&D work in electron devices. “Electron devices” is the general term for components whose
    operation is based on the movement of electrons, such as microelectronics, nanoelectronics, bioelectronics and
    energy-related devices.
    Unlike specialty technical conferences focused on narrow areas of inquiry, the IEDM presents more leading work in
    more areas of the field than any other technical conference, encompassing silicon and non-silicon device technology,
    optoelectronics, MEMS (MicroElectroMechanical Systems), NEMS (NanoElectroMechanical Systems), displays,
    power devices and nanotechnology for electronics applications.
    The 2010 special session on Tuesday, Dec. 7 will feature presentations on next-generation power device
    technologies and their applications for smart grid, automotive, and data center systems. The session offers talks in
    these areas from the world’s leading technical experts on silicon, silicon carbide, and III-nitride-based power devices
    and applications. IEDM 2010 also will feature many papers on photovoltaics, energy harvesting and bioelectronics
    devices in other sessions throughout the conference.
    The IEDM is sponsored by the IEEE Electron Devices Society of the Institute of Electrical and Electronics
    Engineers (IEEE), the world’s largest technical professional society.
    The conference typically accepts approximately a third of the papers submitted for consideration, one of the lowest
    ratios of any major technical conference and an indicator of the high quality of the technical program.

    The First Annual Technical Meeting on Electron Devices took place on October 24–25, 1955 at the Shoreham Hotel
    in Washington D.C. with about 700 scientists and engineers in attendance. At that time the transistor was only seven
    years old; the integrated circuit, or computer chip, wouldn’t come along for a few years yet; and the electron tube
    reigned as the predominant electron-device technology. Fifty-four papers were presented on the then-state-of-the-art
    in electron device technology, the majority of them from just four U.S. companies—Bell Telephone Laboratories
    (birthplace of the transistor), RCA Corporation, Hughes Aircraft Co. and Sylvania Electric Products.
    The meeting was an instant success and made evident the need for an annual forum for the exchange of important
    information about new electron devices and their ongoing development. That need was driven by two factors:
    commercial opportunities in the fast-growing new “solid-state” branch of electronics, and the U.S. government’s
    desire for solid-state components and better microwave tubes for aerospace and defense.
    The conference later became known as the Electron Devices Meeting and established a reputation as the premier
    conference in the field. (The word “International” was added in the mid-1960s.) It has been held every year since,
    both stimulating and benefiting from the work of scientists and engineers who have transformed the computer chip
    from a gee-whiz curiosity into an essential building block of the modern world economy, spawning revolutions in
    computing, communications, entertainment and other fields along the way.
    Originally the meeting was sponsored by a group within the Institute of Radio Engineers, but in 1963 that
    organization merged with another electrical engineering association to create the Institute of Electrical and
    Electronics Engineers, Inc. (IEEE) http:/ / www. ieee. org, the world’s largest technical professional society. Since
International Electron Devices Meeting                                                                                         34

    1963 the conference has been sponsored by the IEEE.

    Notable Participants
    The meeting’s best attributes are the strength of its technical program and the stature of its invited speakers. Through
    the years most notable industry figures have given technical papers and/or luncheon or plenary talks. A small but
    representative sampling of notable figures from the early days includes: Gilbert Amelio, John Bardeen, Robert
    Dennard, James Early, Andrew Grove, J.B. Gunn, Terry Haggerty, F.P. Heiman, J. Hoerni, S.R. Hofstein, Nick
    Holonyak, Jack Kilby, Gordon Moore, Jerry Sanders, William Shockley, Simon Sze. These are in addition to
    thousands of other individuals who have made and are making important contributions to the field.

    Historical Facts & Figures
    • 1959 was the first year the meeting featured papers on the integrated circuit — not surprising since Jack Kilby
    successfully demonstrated the first working integrated circuit a year earlier on September 12, 1958.
    • 1962 brought a paper reporting the first practical MOSFET, the type of transistor in widespread use today.
    • Numerous papers and talks on solar cells were given from the oil crises of the 1970s into the mid-1980s, and still
    are today.
    • Many technologies discussed through the years have since fallen out of the mainstream: magnetic bubble
    memories, superconducting Josephson junctions, CCD memories, and most types of vacuum tubes among them.
    • On the other hand, some technologies from the meeting’s early days faded away but have since re-appeared, such as
    germanium transistors, tunnel diodes and ferroelectric circuits.

    Highlights from IEDM 2009
    Because the usual Washington, D.C. venue was undergoing extensive renovations in 2009, the conference that year
    was held at the Hilton Baltimore from December 7–9, 2009 preceded by a day of Short Courses on Sunday, Dec. 6.
    Highlights from the technical program included:
    • Diverse energy-efficient technologies, such as light-powered retinal implants and solar cells made from
      inexpensive organic materials
    • The next generation of technology for mainstream computer chips—a fully featured 32-nanometer technology
      platform from Intel
    • Nanoscale-sized transistors
    • Advanced computer memories, including three-dimensional and phase-change memory technologies
    • One-atom-thick graphene as a potential new material for the continuing miniaturization of electronic systems
    • A continuing focus on device/circuit interactions
    • Many papers on melding standard silicon chip technology with GaN (gallium nitride) and other compound
      semiconductor materials
International Electron Devices Meeting                                                                                    35

    Highlights from IEDM 2008
    IEDM 2008 took place in San Francisco, California from December 15–17, 2008. Highlights included:
    • A special Emerging Technologies session on micro- and nanoelectronic technologies for the life sciences, aimed
      at such goals as the marriage of brain tissue with electronics to potentially restore movement to disabled people
    • A growing focus on device/circuit interactions, which are becoming increasingly interdependent as electronic
      systems become more sophisticated
    • Better ways to build three-dimensional integrated circuits
    • Advanced computer memories
    • Batteries made from nanowires for next-generation electronic systems, with 10 times more storage capacity

    Notable News
    • IEDM, 32 nm, and the all new 2010 Intel Core Processor Family
    • Toshiba discloses 20 nm CMOS channel structure, spintronics-based MOSFET
    http:/ / www. electroiq. com/ index/ display/ semiconductors-article-display/ 2270703919/ articles/
    • IMEC's piezoelectric energy harvester, plastic transponder circuit
    http:/ / www. electroiq. com/ index/ display/ nanotech-article-display/ 8967502062/ articles/ small-times/
    • Numonyx advances phase-change memory
    • IMEC demonstrates GaN-on-Si architecture at IEDM
    • IEDM showcases the strengths of III-V transistors
    • Mid-decade timescale for compound/silicon semiconductor integration
    • MEMS enables powerless curved retinal implant
    • SIA tech exec calls for new research model
    • For Chip Makers, Hybrids May Be a Way Forward (New York Times)
    • When Nerds Get Together, Semiconductors Get More Powerful (Popular Mechanics) http://www.
    • Intel completes 32-nanometer chip development (CNET News)
    • 'Universal memory' race still on the starting block (Electronic Engineering Times)
    • IEDM Panel: Processing Costs Headed Up (Semiconductor International)
International Electron Devices Meeting                                                                                     36

    • Latest 32 nm CMOS, memory beyond flash, plus novel devices detailed at 2008 IEDM (Solid State Technology)

    Registration Information
    Visit the IEDM home page at

    External links
    • Device Research Conference
    • Hot Chips Conference
    • International Solid-State Circuits Conference
    • Symposia on VLSI Technology and Circuits

    • IEDM Conference site:
    • IEEE:
    • Electron Devices Society of the IEEE:

    International Technology Roadmap for
    The International Technology Roadmap for Semiconductors is a set of documents produced by a group of
    semiconductor industry experts. These experts are representative of the sponsoring organisations which include the
    Semiconductor Industry Associations of the US, Europe, Japan, Korea and Taiwan.
    The documents produced carry this disclaimer: "The ITRS is devised and intended for technology assessment only
    and is without regard to any commercial considerations pertaining to individual products or equipment".
    The documents represent best opinion on the directions of research into the following areas of technology, including
    time-lines up to about 15 years into the future:
    •   System Drivers/Design
    •   Test & Test Equipment
    •   Front End Processes
    •   Photolithography
    •   IC Interconnects
    •   Factory Integration
    •   Assembly & Packaging
    •   Environment, Safety & Health
    •   Yield Enhancement
    •   Metrology
    •   Modeling & Simulation
    •   Emerging Research Devices
    • Emerging Research Materials
International Technology Roadmap for Semiconductors                                                                          37

    With the progressive externalization of production tools to the suppliers of specialized equipment, the need arose for
    a clear roadmap to anticipate the evolution of the market and to plan and control the technological needs of IC
    production. For several years, the Semiconductor Industry Association (SIA) gave this responsibility of coordination
    to the USA, which led to the creation of an American style roadmap, the National Technology Roadmap for
    Semiconductors (NTRS). In 1998, the SIA became closer to its European, Japanese, Korean and Taiwanese
    counterparts by creating the first global roadmap: The International Technology Roadmap for Semiconductors
    (ITRS). This international group has (as of the 2003 edition) 936 companies which were affiliated with working
    groups within the ITRS.[1]

    [1] Waldner, Jean-Baptiste (2007). Nanocomputers and Swarm Intelligence. London: ISTE. pp. 50-p53. ISBN 1847040020.

    Further reading
    Bennett, Herbert S. (January-February 2007). "Will Future Measurement Needs of the Semiconductor Industry be
    Met?" (http:/ / nvl. nist. gov/ pub/ nistpubs/ jres/ 112/ 1/ V112. N01. A02. pdf). Journal of Research of the National
    Institutes of Standards and Technology 112 (1): 25–38.

    External links
    • ITRS website (
    • Yearly ITRS reports (
Isobutylgermane                                                                                                                 38

                                               [[Image:Isobutylgermane-2D-skeletal.png                                     ]]

                                                 [[Image:Isobutylgermane-3D-balls.png                                      ]]

                                                 [[Image:Isobutylgermane-3D-vdW.png                                        ]]


                  CAS number                                                          [1]

                  ChemSpider                                                    [2]


                  Molecular formula                                  C4H12Ge

                  Molar mass                                         132.78 g mol

                  Appearance                                          Clear Colorless Liquid

                  Density                                             0.96 g/mL

                  Melting point                                       <-78 °C

                  Boiling point                                       66 °C

                  Solubility in water                                 Insoluble in water

                                                          Related compounds

                  Related compounds                                  GeH4
                                                       (what is this?)   (verify)
                  Except where noted otherwise, data are given for materials in their standard state (at 25 °C, 100 kPa)

                                                           Infobox references

    Isobutylgermane, (IBGe), (CH3)2CHCH2GeH3, is a germanium-containing liquid MOVPE (Metalorganic Vapor
    Phase Epitaxy) precursor - a novel alternative to the toxic germane gas. IBGe is useful in the deposition of pure Ge
    films and Ge-containing thin semiconductor films such as SiGe in strained silicon application, and GeSbTe in
    NAND Flash applications.

    IBGe is a non-pyrophoric liquid source for chemical vapor deposition (CVD) and atomic layer deposition (ALD) of
    semiconductors. It possesses very high vapor pressure, and is considerably less hazardous than germane gas. IBGe
    also offers lower decomposition temperature (the onset of decomposition at ca. 325-350 °C).,[4] coupled with
    advantages of extremely low carbon incorporation and substantially reduced main group elemental impurities in
    epitaxially grown germanium comprising layers such as Ge, SiGe, SiGeC, strained silicon, GeSb and GeSbTe.
Isobutylgermane                                                                                                                                        39

    Rohm and Haas (now part of The Dow Chemical Company), IMEM and CNRS have developed a novel process to
    grow germanium films on germanium at low temperatures in a Metalorganic Vapor Phase Epitaxy (MOVPE) reactor
    using isobutylgermane. The research targets Ge/III-V hetero devices.[5] [6] It has been demonstrated that the growth
    of high quality germanium films at temperatures as low as 350 °C can be achieved.[7] [8] The low growth temperature
    of 350 °C achievable with this new precursor has eliminated the memory effect of germanium in III-V materials.
    Recently IBGe is used to deposit Ge epitaxial films on a Si or Ge substrate [9], followed by the MOVPE deposition
    of InGaP and InGaAs layers with no memory effect, to enable triple-junction solar cells and integration of III-V
    compounds with Silicon and Germanium.

    [1] http:/ / www. commonchemistry. org/ ChemicalDetail. aspx?ref=768403-89-0
    [2] http:/ / www. chemspider. com/ 21389305
    [3] http:/ / en. wikipedia. org/ wiki/ %3Aisobutylgermane?diff=cur& oldid=400120570
    [4] Safer alternative liquid germanium precursors for relaxed graded SiGe layers and strained silicon by MOVPE (http:/ / www. sciencedirect.
        com/ science?_ob=ArticleURL& _udi=B6TJ6-4MS9K7M-1& _user=208309& _coverDate=01/ 31/ 2007& _alid=754729900& _rdoc=3&
        _fmt=high& _orig=search& _cdi=5302& _sort=d& _docanchor=& view=c& _ct=41& _acct=C000014358& _version=1& _urlVersion=0&
        _userid=208309& md5=00462bdb50786f22769e4ca9e4c583bd); D.V. Shenai et al., Rohm and Haas Electronic Materials; Presentation at
        ICMOVPE-XIII, Miyazaki, Japan, June 1, 2006, and publication in Journal of Crystal Growth (2007)
    [5] Designing Novel Organogermanium OMVPE Precursors for High-purity Germanium Films (http:/ / www. sciencedirect. com/
        science?_ob=ArticleURL& _udi=B6TJ6-4HNSJS8-X& _user=10&
        _coverDate=01/ 25/ 2006& _rdoc=103& _orig=browse& _srch=#toc#5302#2006#997129997#614855!& _cdi=5302& view=c&
        _acct=C000050221& _version=1& _urlVersion=0& _userid=10& md5=b727a26cf1d2921d65096fc1f93658bb); Shenai-Khatkhate et al.,
        Rohm and Haas Electronic Materials; Presentation at ACCGE-16, Montana, USA, July 11, 2005, and publication in Journal of Crystal
        Growth (2006)
    [6] Rohm and Haas Electronic Materials LLC (http:/ / electronicmaterials. rohmhaas. com/ businesses/ micro/ metalorganics/ default.
        asp?caid=290), Metalorganics and Germanium Sources for MOVPE.
    [7] MOVPE growth of homoepitaxial germanium (http:/ / dx. doi. org/ 10. 1016/ j. jcrysgro. 2008. 04. 009), M. Bosi et al. publication in Journal
        of Crystal Growth (2008)
    [8] Homo and Hetero Epitaxy of Germanium Using Isobutylgermane (http:/ / dx. doi. org/ 10. 1016/ j. tsf. 2008. 08. 137), G. Attolini et al.
        publication in Thin Solid Films (2008)
    [9] http:/ / www. europatentbox. com/ patent/ EP1464724A3/ abstract/ 572900. html

    Further reading
    • IBGe ( Brief description from National
      Compound Semiconductor Roadmap.
    • Élaboration et Physique des Structures Épitaxiées (LPN) Hétérostructures III-V pour l’optoélectronique sur Si
      ( Article in French from LPN-CNRS, France.
    • Designing Novel Organogermanium OMVPE Precursors for High-purity Germanium Films (http://202.127.1.
      11/jcg/287/2872103.pdf); Journal of Crystal Growth, January 25, 2006.
    • Ge Precursors for Strained Si and Compound Semiconductors (
      semiconductor/article/CA6319057?industryid=3102); Semiconductor International, April 1, 2006.
    • 摘要
      (; Semiconductor International
      Chinese Edition, June 1, 2006.
    • 歪みSiと化合物半導体向けの Geプリカーサ (
      featurs_0608_1.html); Semiconductor International Japanese Edition, August 1, 2006.
Isobutylgermane                                                                                                              40

    • Rohm and Haas Electronic Materials Devises Germanium Film Growth Process (http://www.compoundsemi.
      com/documents/view/news.php3?id=5899); CompoundSemi News, September 23, 2005.
    • High Purity Germanium Film (
      230905Rohm&Haas_Hi_purity_Ge_film.htm); III-Vs Review, September 23, 2005.
    • Development of New Germanium Precursors for SiGe Epitaxy (
      ecsmeet2/2006/03/13/00040125/00/40125_0_art_file_1_1142292562.pdf); Deo Shenai and Egbert Woelk,
      Presentation at 210th ECS Meeting, Cancun, Mexico, October 29, 2006.

    External links
    • Rohm and Haas Electronic Materials LLC (
    • Laboratoire de Photonique et de Nanostructures, LPN CNRS (
    • IMEM-CNR Institute (

    Isotropic etching
    In semiconductor technology isotropic etching is non-directional removal of material from a substrate via a
    chemical process using an etchant substance. The etchant may be a corrosive liquid or a chemically active ionized
    gas, known as a plasma.
    Isotropic etching is most easily understood by comparison to anisotropic (or non-isotropic) etching. The most
    important commercial application of anisotropic etching is in semiconductor chip processing, where
    photolithography is used to print resist lines on silicon wafers. To adequately reproduce very tiny lines (below 0.1
    micrometer) into underlying silicon and metal layers on a wafer held in the horizontal plane, the direction of etching
    must be vertical only. The etchant may not be permitted to spread in the horizontal plane.
    Isotropic etching may occur unavoidably, or it may be desirable for process reasons.
Johnson's Figure of Merit                                                                                                      41

    Johnson's Figure of Merit
    Johnson's Figure of Merit is a measure of suitibility of a semiconductor material for high frequency power
    transistor applications and requirements. More specifically, it is the product of the charge carrier saturation velocity
    in the material and the electric breakdown field under same conditions, first proposed by A. Johnson of RCA in
    1965.[1] Note that this figure of merit (FoM) is applicable to both field-effect transistors (FETs), and with proper
    interperetation of the parameters, also to bipolar junction transistors (BJTs).

    [1] "Physical limitations on frequency and power parameters of transistors", RCA Review, vol. 26, pp163-177, 1965.

    Junction temperature
    Junction temperature is the highest temperature of the actual semiconductor in an electronic device. In operation it
    is higher than case temperature and the temperature of the part's exterior. The difference is equal to the amount of
    heat transferred from the junction to case multiplied by the junction-to-case thermal resistance.
    Maximum junction temperature is specified in a part's datasheet and is used when calculating the necessary
    case-to-ambient thermal resistance for a given power dissipation. This in turn is used to select an appropriate heat
    sink if necessary.
    An estimation of the chip-junction temperature, TJ, can be obtained from the following equation: TJ = TA + ( R θJA ×
    PD )
    where: TA = ambient temperature for the package ( °C )
    R θJA = junction to ambient thermal resistance ( °C / W )
    PD = power dissipation in package (W)
Low level injection                                                                                                                              42

    Low level injection
    Low injection conditions for a P-N junction refers to the state where the number of carriers generated are small
    compared to the background doping density of the material. In this condition minority carrier recombination rates are
    In comparison a semiconductor in high injection means that the number of generated carriers is large compared to
    the background doping density of the material. In this condition minority carrier recombination rates are proportional
    to the number of carriers squared[2]

    [1] Jenny Nelson, The Physics of Solar Cells, Imperial College Press, UK, 2007 pp. 266-267
    [2] R. R. King, R. A. Sinton, and R. M. Swanson, Doped Surfaces in one sun, point-contact solar cells, Appl. Phys. Lett. 54 (15), 1989 pp.

    Luttinger parameter
    In semiconductors, valence bands are well characterized by 3 Luttinger parameters. At the Г-point in the band
    structure,    and       orbitals form valence bands. But spin-orbit coupling splits sixfold degeneracy into high
    energy 4-fold and lower energy 2-fold bands. Again 4-fold degeneracy is lifted into heavy- and light hole bands by
    phenomenological Hamiltonian by J. M. Luttinger.

    Three valence band state
    In the presence of spin-orbit interaction, total angular momentum should take part in. From the three valence band,
    l=1 and s=1/2 state generate six state of |j,mj> as

    The spin-orbit interaction from the relativistic quantum mechanics, lowers the energy of j=1/2 states down.

    Phenomenological Hamiltonian for the j=3/2 states
    Phenomenological Hamiltonian in spherical approximation is written as[1]

    Phenomenological Luttinger parameters                 are defined as


    If we take k as                , the Hamiltonian is diagonalized for j=3/2 states.

    Two degeneated resulting eigenenergies are

Luttinger parameter                                                                                                                        43


          (       ) indicates heav-(light-) hole band energy. If we regard the electrons as nearly free electrons, the
    Luttinger parameters describe effective mass of electron in each bands.

    Measurement of Luttinger parameters
    Luttinger parameter can be measured by Hot-electron luminescence experiment.

    Example: GaAs

    [1] Hartmut Haug, Stephan W. Koch (2004). Quantum Theory of the Optical and Electronic Properties of Semiconductors (4th ed.). World
        Scientific. p. 46.

    See Also
    • J. M. Luttinger, Physical Review, Vol. 102, 1030 (1956). APS (
    • A. Baldereschi and N.O. Lipari, Physical Review B., Vol. 8, pp. 2675 (1973). APS (
    • A. Baldereschi and N.O. Lipari, Physical Review B., Vol. 9, pp. 1525 (1974). APS (
Metalorganics                                                                                                                                   44

    Metalorganic compounds (jargon: metalorganics, metallo-organics) are a class of chemical compounds that contain
    metals and organic ligands. Metalorganic compounds are used extensively in materials science in applications such
    as metalorganic vapour phase epitaxy (MOVPE or MOCVD) or sol-gel processing using alkoxides. Usually,
    metalorganic compounds are defined to exclude species with direct metal-carbon bonds, which are classified as
    organometallic compounds, but definitions vary between chemistry and materials science areas.
    Applications include the manufacture of compound semiconductors and Atomic Layer Deposition (ALD) in
    silicon-based semiconductors. Ultrapure metalorganics are required for many optoelectronic and microelectronic
    applications (e.g., MOCVD and ALD), with highest purity of the order of 99.9999% ("six nines") or greater. These
    ultrapure metalorganic sources require special manufacturing routes to keep impurity levels below parts per billion
    (ppb) or even parts per trillion (ppt) levels. The safety, health and environment related aspects of metalorganics are
    discussed in Product Safety Assessment reports [1] available in electronics industry.
    The vapour pressure of a metalorganic precursor is a crucial parameter that governs the concentrations of
    metalorganic precursors entering the reactor, and subsequently the rate of deposition in MOVPE process.[2] [3]

    [1] Product Safety Assessment of Metalorganics (http:/ / www. dow. com/ productsafety/ pdfs/ 233-00650. pdf)
    [2] Interactive Vapor Pressure Chart (http:/ / electronicmaterials. rohmhaas. com/ businesses/ micro/ metalorganics/ vapor. asp?caid=291)
    [3] Accurate Vapor Pressure Equation for Trimethylindium in OMVPE. (http:/ / www. sciencedirect. com/ science?_ob=ArticleURL&
        _udi=B6TJ6-4R8NBK8-2& _user=10& _rdoc=1& _fmt=& _orig=search& _sort=d& view=c& _version=1& _urlVersion=0& _userid=10&

    Moisture Sensitivity Level
    Moisture Sensitivity Level relates to the packaging and handling precautions for some semiconductors. The MSL is
    an electronic standard for the time period in which a moisture sensitive device can be exposed to ambient room
    conditions (approximately 30°C/60%RH).
    Increasingly, semiconductors have been manufactured in smaller sizes. Components such as thin fine-pitch devices
    and ball grid arrays could be damaged during SMT reflow when moisture trapped inside the component expands.
    The expansion of trapped moisture can result in internal separation (delamination) of the plastic from the die or
    lead-frame, wire bond damage, die damage, and internal cracks. Most of this damage is not visible on the component
    surface. In extreme cases, cracks will extend to the component surface. In the most severe cases, the component will
    bulge and pop. This is known as the "popcorn" effect.
    IPC (Association Connecting Electronic Industries) created and released IPC-M-109, Moisture-sensitive Component
    Standards and Guideline Manual.
    Moisture sensitive devices are packaged in a moisture barrier antistatic bag with a desiccant and a moisture indicator
    card which is vacuum sealed.
    IPC-M-109 includes seven documents. According to IPC/JEDEC's J-STD-20 [1]: Moisture/Reflow Sensitivity
    Classification for Plastic Integrated Circuit (IC) SMDs, there are eight levels of moisture sensitivity. Components
    must be mounted and reflowed within the allowable period of time (floor life out of the bag).
    • 'MSL 6 - Mandatory Bake before use
    • MSL 5A - 24 hours
    • MSL 5 - 48 hours
    • MSL 4 - 72 hours
Moisture Sensitivity Level                                                                                                    45

    •   MSL 3 - 168 hours
    •   MSL 2A - 4 weeks
    •   MSL 2 - 1 year
    •   MSL 1 - Unlimited

    [1] http:/ / www. siliconfareast. com/ msl. htm

    Negative luminescence
    Negative luminescence is a physical phenomenon by which an electronic device emits less thermal radiation when
    an electric current is passed through it than it does in thermal equilibrium (current off). When viewed by a thermal
    camera, an operating negative luminescent device looks colder than its environment.

    Negative luminescence is most readily observed in semiconductors. Incoming infrared radiation is absorbed in the
    material by the creation of an electron–hole pair. An electric field is used to remove the electrons and holes from the
    region before they have a chance to recombine and re-emit thermal radiation. This effect occurs most efficiently in
    regions of low charge carrier density.
    Negative luminescence has also been observed in semiconductors in orthogonal electric and magnetic fields. In this
    case, the junction of a diode is not necessary and the effect can be observed in bulk material. A term that has been
    applied to this type of negative luminescence is galvanomagnetic luminescence.
    Negative luminescence might appear to be a violation of Kirchhoff's law of thermal radiation. This is not true, as the
    law only applies in thermal equilibrium.
    Another term that has been used to describe negative luminescent devices is "Emissivity switch", as an electric
    current changes the effective emissivity.

    This effect was first seen by Russian physicists in the 1960s in A.F.Ioffe Physicotechnical Institute, Leningrad,
    Russia. Subsequently it was studied in semiconductors such as indium antimonide (InSb), germanium (Ge) and
    indium arsenide (InAs) by workers in West Germany, Ukraine (Institute of Semiconductor Physics, Kiev), Japan
    (Chiba University) and the USA. It was first observed in the mid-infrared (3-5 µm wavelength) in the more
    convenient diode structures in InSb heterostructure diodes by workers at the Defence Research Agency, Great
    Malvern, UK (now QinetiQ). These British workers later demonstrated LWIR band (8-12 µm) negative
    luminescence using mercury cadmium telluride diodes.
    Later the Naval Research Laboratory, Washington DC, started work on negative luminescence in mercury cadmium
    telluride (HgCdTe). The phenomenon has since been observed by several university groups around the world.
Negative luminescence                                                                                                       46

    • Applications of negative luminescence, T. Ashley, C. T. Elliott, N. T. Gordon, T. J. Phillips and R. S. Hall,
      Infrared Physics & Technology, Vol. 38, Iss. 3 Pages 145-151 (1997) doi:10.1016/S1350-4495(96)00038-2
    • Negative luminescence and its applications, C. T. Elliott, Philosophical Transactions: Mathematical, Physical and
      Engineering Sciences, Vol. 359 (1780) pp. 567-579 (2001) doi:10.1098/rsta.2000.0743
    • Galvanomagnetic luminescence of indium antimonide, P. Berdahl and L. Shaffer, Applied Physics Letters vol. 47,
      Iss. 12, pp. 1330-1332 (1985) doi:10.1063/1.96270
    • Negative luminescence of semiconductors, P. Berdahl, V. Malyutenko, and T. Morimoto, Infrared Physics (ISSN
      0020-0891), vol. 29, 1989, p. 667-672 (1989) doi:10.1016/0020-0891(89)90107-3

    • U.S. Patent 6091069 [1], Ashley et al., July 18 2000, Infrared optical system (Cold shield)

    External links
    • “Negative luminescence from InAsSbP based diodes in the 4.0-5.3 µm range” [2]
    • "Negative Luminescence in semiconductors" [3]

    [1] http:/ / www. google. com/ patents?vid=6091069
    [2] http:/ / mirdog. spb. ru/ Negative_luminescence. htm
    [3] http:/ / www. articleworld. org/ index. php/ Negative_Luminescence

    On-die termination
    On-die termination (ODT) is the technology where the termination resistor for impedance matching in transmission
    lines is located inside a semiconductor chip instead of on a printed circuit board.

    Tutorial on termination in electronic signals

    Lumped circuit
    In lower frequency (slow edge rate) applications, interconnection lines can be modelled as "lumped" circuits. In this
    case there is no need to consider the concept of "termination". Under the low frequency condition, every point in an
    interconnect wire can be assumed to have the same voltage as every other point for any instance in time and there is
    no need to consider the concept of termination.
On-die termination                                                                                                            47

    Transmission line
    If the propagation delay in a wire, PCB trace, cable, or connector is greater than 1/6 of the rise time of the digital
    signal, the "lumped" circuit model is no longer valid and the interconnect has to be analyzed as a transmission line.
    In a transmission line, the signal interconnect path is modeled as a circuit containing distributed inductance,
    capacitance and resistance throughout its length.
    In order for a transmission line to minimize distortion of the signal, the impedance of every location on the
    transmission line should be uniform throughout its length. If there is any place in the line where the impedance is not
    uniform for some reason (open circuit, impedance discontinuity, different material) the signal gets modified by
    reflection at the impedance change point which results in distortion, ringing and so forth.

    When the signal path has impedance discontinuity, in other words an impedance mismatch, then a termination
    impedance with the equivalent amount of impedance is placed at the point of line discontinuity. It is called
    Termination. For example resistors can be placed on computer mother boards to terminate high speed busses. There
    are several ways of termination depending on how the resistors are connected to the transmission line. Parallel
    termination and series termination are examples of termination methodologies.

    On-die termination
    Instead of having the necessary resistive termination located on the motherboard, the termination is located inside the
    semiconductor chips–technique called ODT, On-Die Termination.

    Why is on-die termination needed?
    Although the termination resistors on the motherboard reduce some reflections on the signal lines, they are unable to
    prevent reflections resulting from the stub lines that connect to the components on the module card (e.g. DRAM
    Module). A signal propagating from the controller to the components encounters an impedance discontinuity at the
    stub leading to the components on the module. The signal that propagates along the stub to the component (e.g.
    DRAM component) will be reflected back onto the signal line, thereby introducing unwanted noise into the signal.In
    addition, on-die termination can reduce the number of resistor elements and complex wiring on the mother board.
    Accordingly, the system design can be simpler and cost effective.

    Example of ODT: DRAM
    On-die termination is implemented with several combinations of resistors on the DRAM silicon along with other
    circuit trees. DRAM circuit designers can use a combination of transistors which have different values of turn-on
    resistance. In the case of DDR2, there are three kinds of internal resistors 150ohm, 75ohm and 50ohm. The resistors
    can be combined to create a proper equivalent impedance value to the outside of the chip, whereby the signal line
    (transmission line) of the motherboard is being controlled by the on-die termination operation signal. Where an
    on-die termination value control circuit exist the DRAM controller manages the on-die termination resistance
    through a register. Needless to say, as the DRAM frequency increases toward DDR3, the on-die termination value
    has to be adjusted. Accordingly the internal on-die termination values in DDR3 are 120ohm, 60ohm, 40ohm and so
On-die termination                                                                                                                          48


    Overdrive voltage
    Overdrive voltage, usually abbreviated as VOV, is typically referred to in the context of MOSFET transistors. The
    overdrive voltage is defined as the voltage between transistor gate and source (VGS) in excess of the threshold
    voltage (Vt) where Vt is defined as the minimum voltage required between gate and source to turn the transistor on
    (allow it to conduct electricity). Due to this definition, overdrive voltage is also known as "excess gate voltage" or
    "effective voltage."[1] Overdrive voltage can be found using the simple equation: VOV = VGS - Vt.

    VOV is important as it directly affects the output current (ID) of the transistor, an important property of amplifier
    circuits. By increasing VOV, ID can be increased until saturation is reached.
    Overdrive voltage is also important because of its relationship to VDS, the drain voltage relative to the source, which
    can be used to determine the region of operation of the MOSFET. The table below shows how to use overdrive
    voltage to understand what region of operation the MOSFET is in:

             Conditions         Region of Operation                                         Description

        VDS > VOV; VGS > Vt Saturation (CCR)           The MOSFET is delivering a high amount of current, and changing VDS won't do much.

        VDS < VOV; VGS > Vt Triode (Linear)            The MOSFET is delivering current in a linear relationship to the voltage (VDS).

        VGS < Vt               Cutoff                  The MOSFET is turned off, and should not be delivering any current.

    A more physics-related explanation follows:
    In an NMOS transistor, the channel region under zero bias has an abundance of holes (ie, it is p-type silicon). By
    applying a negative gate bias (VGS < 0) we attract MORE holes, and this is called accumulation. A positive gate
    voltage (VGS > 0) will attract electrons and repel holes, and this is called depletion because we are depleting the
    number of holes. At a critical voltage called the THRESHOLD VOLTAGE (Vt or Vth) the channel will actually be
    so depleted of holes and rich in electrons that it will INVERT to being n-type silicon, and this is called the inversion
    As we increase this voltage, VGS, beyond Vth, we are said to be then OVERDRIVING the gate by creating a stronger
    channel, hence the OVERDRIVE VOLTAGE (Called often Vov, Vod, or Von) is defined as (VGS - Vth)

    [1] Sedra and Smith, Microelectronic Circuits, Fifth Edition, (2004) Chapter 4, ISBN 978-0-19-533883-6
Photo-Dember                                                                                                                                        49

    In      semiconductor          physics,     the
    photo-Dember effect (named after its
    discoverer Harry Dember[1] (de)) consists in
    the formation of a charge dipole in the
    vicinity of a semiconductor surface after
    ultra-fast photo-generation of charge
    carriers[2] [3] [4] . The dipole forms owing to
    the difference of mobilities (or diffusion
    constants) for holes and electrons which
    combined with the break of symmetry
    provided by the surface lead to an effective
    charge separation in the direction
    perpendicular to the surface.

    One of the main applications of
                                                        Simplified Monte-Carlo simulation of photo-Dember effect in semiconductors.
    photo-Dember effect is the generation of                Electrons are assumed to have a mobility 3 times larger than holes (for
    terahertz (THz) radiation pulses for terahertz      visualisation purposes). It can be observed how electrons diffuse away form the
    time-domain spectroscopy. This effect is            surface faster than holes shifting the "centre of negative charge" deeper into the
                                                        semiconductor while the holes ("centre of positive charge") remain closer to the
    present in most semiconductors but it is
                                                                                 surface, thus forming a dipole.
    particularly    strong      in     narrow-gap
    semiconductors (mainly arsenides and
    antimonides) such as InAs[2] [3] and InSb[4] owing to their high electron mobility. The photo-Dember terahertz
    emission should not be confused with the surface field emission, which occurs if the surface energy bands of a
    semiconductor fall between its valence and conduction bands, which produces a phenomenon known as Fermi level
    pinning, causing, at its time, band bending and consequently the formation of a depletion or accumulation layer close
    to the surface which contributes to the acceleration of charge carriers [2] . These two effects can contribute
    constructively or destructively for the dipole formation depending on the direction of the band-bending.

    [1] H. Dember (1931). "Über eine photoelektronische Kraft in Kupferoxydul-Kristallen (Photoelectric E.M.F. in Cuprous-Oxide Crystals)". Phys.
        Zeits. 32: 554.
    [2] Johnston, M. B. (2002). "Simulation of terahertz generation at semiconductor surfaces". Physical Review B 65: 165301.
    [3] Dekorsy, T. (1996). "THz electromagnetic emission by coherent infrared-active phonons". Physical Review B 53: 4005.
    [4] S. Kono et al.. "Temperature dependence of terahertz radiation from n-type InSb and n-type InAs surfaces". Appl. Phys. B 71 (6): 901.
Photoelectrochemical processes                                                                                                        50

    Photoelectrochemical processes
                                              Photoelectrochemical processes

                                          Photons emitted in a coherent beam from a laser

                                         Interaction: Electromagnetic, Optical, Chemical

    Photoelectrochemical processes usually involve transforming light into other forms of energy.[1] These processes
    apply to photochemistry, optically pumped lasers, sensitized solar cells, luminescence, and the effect of reversible
    change of color upon exposure to light. To the right photons are emitted in a coherent beam from a laser.

    Electron excitation
    Electron excitation is the movement of an electron to a higher
    energy state. This can either be done by photoexcitation (PE),
    where the original electron absorbs the photon and gains all the
    photon's energy or by electrical excitation (EE), where the
    original electron absorbs the energy of another, energetic
    electron. Within a semiconductor crystal lattice, thermal
    excitation is a process where lattice vibrations provide enough
    energy to move electrons to a higher energy band. When an
    excited electron falls back to a lower energy state again, it is
    called electron relaxation. This can be done by radiation of a
    photon or giving the energy to a third spectator particle as
                                                                              After absorbing energy, an electron may jump from the
    In physics there is a specific technical definition for energy level         ground state to a higher energy excited state.
    which is often associated with an atom being excited to an
    excited state. The excited state, in general, is in relation to the ground state, where the excited state is at a higher
    energy level than the ground state.
Photoelectrochemical processes                                                                                                51

    Photoexcitation is the mechanism of electron excitation by photon absorption, when the energy of the photon is too
    low to cause photoionization. The absorption of photon takes place in accordance to the Planck's Quantum Theory.
    Photoexcitation plays role in photoisomerization. Photoexcitation is exploited in dye-sensitized solar cells,
    photochemistry, luminescence, optically pumped lasers, and in some photochromic applications.

    In chemistry, photoisomerization is molecular behavior in which structural change between isomers is caused by
    photoexcitation. Both reversible and irreversible photoisomerization reactions exist. However, the word
    "photoisomerization" usually indicates a reversible process. Photoisomerizable molecules are already put to practical
    use, for instance, in pigments for rewritable CDs, DVDs, and 3D optical data storage solutions. In addition, recent
    interest in photoisomerizable molecules has been aimed at molecular devices, such as molecular switches, molecular
    motors, and molecular electronics.
    Photoisomerization behavior can be roughly categorized into several classes: trans (or E) and cis (or Z) conversion,
    and open ring and closed ring transition. Instances of the former include stilbene and azobenzene. This class of
    compounds has a double bond, and rotation or inversion around the double bond affords isomerization between the
    two states. Examples of the latter include fulgide and diarylethene. These types of compounds undergo bond
    cleavage and bond creation upon irradiation with particular wavelengths of light. Sill another type is the
    Di-pi-methane rearrangement.

    Photoionization is the physical process in which an incident photon ejects one or more electrons from an atom, ion
    or molecule. This is essentially the same process that occurs with the photoelectric effect with metals. In the case of
    a gas, the term photoionization is more common.[3]
    The ejected electrons, known as photoelectrons, carry information about their pre-ionized states. For example, a
    single electron can have a kinetic energy equal to the energy of the incident photon minus the electron binding
    energy of the state it left. Photons with energies less than the electron binding energy may be absorbed or scattered
    but will not photoionize the atom or ion.[3]
    For example, to ionize hydrogen, photons need an energy greater than 13.6 electronvolts, which corresponds to a
    wavelength of 91.2 nm.[4] For photons with greater energy than this, the energy of the emitted photoelectron is given

    where h is Planck's constant and ν is the frequency of the photon.
    This formula defines the photoelectric effect.
    Not every photon which encounters an atom or ion will photoionize it. The probability of photoionization is related
    to the photoionization cross-section, which depends on the energy of the photon and the target being considered. For
    photon energies below the ionization threshold, the photoionization cross-section is near zero. But with the
    development of pulsed lasers it has become possible to create extremely intense, coherent light where multi-photon
    ionization may occur. At even higher intensities (around 1015 - 1016 W/cm2 of infrared or visible light),
    non-perturbative phenomena such as barrier suppression ionization[5] and rescattering ionization[6] are observed.
Photoelectrochemical processes                                                                                                 52

    Multi-photon ionization
    Several photons of energy below the ionization threshold may actually combine their energies to ionize an atom.
    This probability decreases rapidly with the number of photons required, but the development of very intense, pulsed
    lasers still makes it possible. In the perturbative regime (below about 1014 W/cm2 at optical frequencies), the
    probability of absorbing N photons depends on the laser-light intensity I as IN .[7]
    Above-threshold ionization (ATI) [8] is an extension of multi-photon ionization where even more photons are
    absorbed than actually would be necessary to ionize the atom. The excess energy gives the released electron higher
    kinetic energy than the usual case of just-above threshold ionization. More precisely, The released electron will have
    an integer number of photon-energies more kinetic energy than in the normal (lowest possible number of photons)
          See also

    In semiconductor physics the Photo-Dember effect (named after its discoverer H. Dember) consists in the formation
    of a charge dipole in the vicinity of a semiconductor surface after ultra-fast photo-generation of charge carriers. The
    dipole forms owing to the difference of mobilities (or diffusion constants) for holes and electrons which combined
    with the break of symmetry provided by the surface lead to an effective charge separation in the direction
    perpendicular to the surface.[9]

    Grotthuss–Draper law
    The Grotthuss–Draper law (also called Principle of Photochemical Activation) states that only that light which is
    absorbed by a system can bring about a photochemical change. Materials such as dyes and phosphors must be able to
    absorb "light" at optical frequencies. A basis for Fluorescence and phosphorescence is found in this law. It was first
    proposed in 1817 by Theodor Grotthuss and John W. Draper. This is considered to be one of the two basic laws of
    photochemistry. The second law is the Stark–Einstein law, which says that primary chemical or physical reactions
    occur with each photon absorbed.[10]

    Stark–Einstein law
    The Stark–Einstein law is named after the German-born physicists Johannes Stark and Albert Einstein, who
    independently formulated the law between 1908 and 1913. It is known also as the photochemical equivalence law
    or photoequivalence law. In essence it says that every photon that is absorbed will cause a (primary) chemical or
    physical reaction.[11]
    The photon is a quantum of radiation, or one unit of radiation. Therefore, this is a single unit of EM radiation that is
    equal to Planck's constant (h) times the frequency of light. This quantity is symbolized by
    The photochemical equivalence law is also restated as follows: for every mole of a substance that reacts, an
    equivalent mole of quanta of light are absorbed. The formula is:[11]

    where NA is Avogadro's number.
    The photochemical equivalence law applies to the part of a light-induced reaction that is referred to as the primary
    process (i.e. absorption or fluorescence).[11]
    In most photochemical reactions the primary process is usually followed by so-called secondary photochemical
    processes that are normal interactions between reactants not requiring absorption of light. As a result such reactions
    do not appear to obey the one quantum–one molecule reactant relationship.[11]
Photoelectrochemical processes                                                                                                  53

    The law is further restricted to conventional photochemical processes using light sources with moderate intensities;
    high-intensity light sources such as those used in flash photolysis and in laser experiments are known to cause
    so-called biphotonic processes; i.e., the absorption by a molecule of a substance of two photons of light.[11]

    Absorption (electromagnetic radiation)
    In physics, absorption of electromagnetic radiation is the way by which the energy of a photon is taken up by
    matter, typically the electrons of an atom. Thus, the electromagnetic energy is transformed to other forms of energy,
    for example, to heat. The absorption of light during wave propagation is often called attenuation. Usually, the
    absorption of waves does not depend on their intensity (linear absorption), although in certain conditions (usually, in
    optics), the medium changes its transparency dependently on the intensity of waves going through, and the Saturable
    absorption (or nonlinear absorption) occurs.

    Photosensitization is a process of transferring the energy of absorbed light. After absorption, the energy is transferred
    to the (chosen) reactants. This is part of the work of photochemistry in general. In particular this process is
    commonly employed where reactions require light sources of certain wavelengths that are not readily available.[12]
    For example, mercury absorbs radiation at 1849 and 2537 angstroms, and the source is often high-intensity mercury
    lamps. It is a commonly used sensitizer. When mercury vapor is mixed with ethylene, and the compound is irradiated
    with a mercury lamp, this results in the photodecomposition of ethylene to acetylene. This occurs on absorption of
    light to yield excited state mercury atoms, which are able to transfer this energy to the ethylene molecules, and are in
    turn deactivated to their initial energy state.[12]
    Cadmium; some of the noble gases, for example (usually) xenon; zinc; benzophenone; and a large number of organic
    dyes, are also used as sensitizers.[12]
    Photosensitisers are a key component of photodynamic therapy used to treat cancers.

    A sensitizer in chemoluminescence is a chemical compound, capable of light emission after it has received energy
    from a molecule, which became excited previously in the chemical reaction. A good example is this:
    When an alkaline solution of sodium hypochlorite and a concentrated solution of hydrogen peroxide are mixed, a
    reaction occurs:
          ClO-(aq) + H2O2(aq) → O2*(g) + H+(aq) + Cl-(aq) + OH-(aq)
    O2*is excited oxygen - meaning, one or more electrons in the O2 molecule have been promoted to higher-energy
    molecular orbitals. Hence, oxygen produced by this chemical reaction somehow 'absorbed' the energy released by the
    reaction and became excited. This energy state is unstable, therefore it will return to the ground state by lowering its
    energy. It can do that in more than one way:
    • it can react further, without any light emission
    • it can lose energy without emission, for example, giving off heat to the surroundings or transferring energy to
      another molecule
    • it can emit light
    The intensity, duration and color of emitted light depend on quantum and kinetical factors. However, excited
    molecules are frequently less capable of light emission in terms of brightness and duration when compared to
    sensitizers. This is because sensitizers can store energy (that is, be excited) for longer periods of time than other
    excited molecules. The energy is stored through means of quantum vibration, so sensitizers are usually compounds
    which either include systems of aromatic rings or many conjugated double and triple bonds in their structure. Hence,
Photoelectrochemical processes                                                                                                                         54

    if an excited molecule transfers its energy to a sensitizer thus exciting it, longer and easier to quantify light emission
    is often observed.
    The color (that is, the wavelength), brightness and duration of emission depend upon the sensitizer used. Usually, for
    a certain chemical reaction, many different sensitizers can be used.

    List of some common sensitizers
    •   Violanthrone
    •   Isoviolanthrone
    •   Fluoresceine
    •   Rubrene
    •   9,10-diphenylanthracene
    •   Tetracene
    •   13,13'-dibenzantronile
    •   Levulinic Acid

    Fluorescence spectroscopy
    Fluorescence spectroscopy aka fluorometry or spectrofluorometry, is a type of electromagnetic spectroscopy which
    analyzes fluorescence from a sample. It involves using a beam of light, usually ultraviolet light, that excites the
    electrons in molecules of certain compounds and causes them to emit light of a lower energy, typically, but not
    necessarily, visible light. A complementary technique is absorption spectroscopy.[13] [14]
    Devices that measure fluorescence are called fluorometers or fluorimeters.

    Absorption spectroscopy
    Absorption spectroscopy refers to spectroscopic techniques that measure the absorption of radiation, as a function
    of frequency or wavelength, due to its interaction with a sample. The sample absorbs energy, i.e., photons, from the
    radiating field. The intensity of the absorption varies as a function of frequency, and this variation is the absorption
    spectrum. Absorption spectroscopy is performed across the electromagnetic spectrum.[13] [14]

    [1] Schiavello, Mario; NATO (1985-02). Photoelectrochemistry, Photocatalysis and Photoreactors Fundamentals and Developments (http:/ /
        books. google. com/ ?id=rLRMeP1KGhsC& pg=PR9& dq=Photoelectrochemical+ processes#v=onepage& q=Photoelectrochemical
        processes& f=false). Springer London, Limited. pp. 39. ISBN 9789027719461. .
    [2] Madden, R.P.; Codling, K (1965-02). "Two electron states in Helium". Astrophysical Journal 141: 364. Bibcode 1965ApJ...141..364M.
    [3] "Radiation" (http:/ / www. britannica. com/ EBchecked/ topic/ 488507/ radiation). Encyclopædia Britannica Online. Photoelectric. effect.
        2009. pp. 1. . Retrieved 2009-11-09.
    [4] Carroll, B. W.; Ostlie, D. A. (2007). An Introduction to Modern Astrophysics. London: Addison-Wesley. p. 121. ISBN 0321442849.
    [5] http:/ / www. iop. org/ EJ/ abstract/ 1063-7869/ 41/ 5/ R03
    [6] http:/ / ieeexplore. ieee. org/ stamp/ stamp. jsp?arnumber=01549346
    [7] Deng, Z; Eberly, J H (March 1985). "Multiphoton absorption above ionization threshold by atoms in strong laser fields" (http:/ / prola. aps.
        org/ abstract/ PRL/ v42/ i17/ p1127_1). J. Opt. Soc. Am. B 2 (3): 491. .
    [8] Agostini, P; Fabre, F; Mainfray, G; Petite, G; Rahman, N K (23 April 1979). "Free-Free Transitions Following Six-Photon Ionization of
        Xenon Atoms" (http:/ / prola. aps. org/ abstract/ PRL/ v42/ i17/ p1127_1). Phys. Rev. Lett. 42 (17): 1127–1130.
        doi:10.1103/PhysRevLett.42.1127. .
    [9] Dekorsy, T.; Auer, H.; Bakker, H. J.; Roskos, H. G.; Kurz, H. (1996). "THz electromagnetic emission by coherent infrared-active phonons".
        Physical Review B 53 (7): 4005. doi:10.1103/PhysRevB.53.4005.
    [10] "Radiation" (http:/ / www. britannica. com/ EBchecked/ topic/ 488507/ radiation). Encyclopædia Britannica Online. radiation. (physics):
        Photochemistry. 2009. pp. 1. . Retrieved 2009-11-09.
    [11] "Photoequivalence law". Encyclopædia Britannica Online. 2009-11
Photoelectrochemical processes                                                                                                                 55

    [12] "Photosensitization" (http:/ / www. britannica. com/ EBchecked/ topic/ 458153/ photosensitization). Encyclopædia Britannica. 2009..
        Online. 2009. pp. 1. . Retrieved 2009-11-10.
    [13] Modern Spectroscopy (Paperback) by J. Michael Hollas ISBN 0470844167
    [14] Symmetry and Spectroscopy: An Introduction to Vibrational and Electronic Spectroscopy (Paperback) by Daniel C. Harris, Michael D.
        Bertolucci ISBN 048666144X

    Proximity communication
    Proximity communication is a Sun microsystems technology of wireless chip-to-chip communications. Partly by
    Robert Drost and Ivan Sutherland. Research done as part of High Productivity Computing Systems DARPA project.
    Proximity communication replaces wires by capacitive coupling, promises significant increase in communications
    speed between chips in an electronic system, among other benefits. Partially funded by a $50 million award from the
    Defense Advanced Research Projects Agency.
    Comparing traditional area ball bonding, proximity communication has one order smaller scale, so it can be two
    order densier (in terms of connection number/pin number) than ball bonding. This technique require very good
    alignment between chips and very small gaps between tx and rx parts (2-3 micrometers), which can be destroyed by
    thermal expansion, vibration, dust, etc.
    Chip transmitter consists (according to presentation slide) of big 32x32 array of very small Tx micropads, 4x4 array
    of bigger Rx micropads (four times bigger than tx micropad), and two linear arrays of 14 X vernier and 14 Y vernier.
    Proximity communication can be used with 3D packing on chips in Multi-Chip Module, allowing to connect several
    MCM without sockets and wires.
    Speed was up to 1.35 Gbps/channel in tests of 16 channel systems. BER < 10−12. Static power is 3.6 mW/channel,
    dynamic power is 3.9 pJ/bit
    Current status of the project is unknown.

    External links
    • Book: Ron Ho, Robert Drost, Coupled Data Communication Techniques for High-Performance and Low-Power
      Computing [1], Springer, 2010.
    • Press release [2]
    • Slides by Robert J. Drost [3]
    • List of Drost patents in Sun, most of which is about Proximity communication [4]

    [1]   http:/ / www. amazon. com/ Communication-Techniques-High-Performance-Low-Power-Integrated/ dp/ 1441965874/
    [2]   http:/ / research. sun. com/ spotlight/ 2004-09-20. feature-proximity. html
    [3]   http:/ / research. sun. com/ sunlabsday/ docs. 2004/ talks/ 1. 02_Drost. pdf
    [4]   http:/ / research. sun. com/ people/ drost/
Random logic                                                                                                                                  56

    Random logic
    Random logic is a semiconductor circuit design technique that translates high-level logic descriptions directly into
    hardware features such as AND and OR gates. The name derives from the fact that few easily discernible patterns are
    evident in the arrangement of features on the chip and in the interconnects between them. In VLSI chips, random
    logic is often implemented with standard cells and gate arrays. [1]
    Random logic accounts for a large part of the circuit design in modern microprocessors. Compared to microcode,
    another popular design technique, random logic offers faster execution of processor opcodes, provided that processor
    speeds are faster than memory speeds. A disadvantage is that it is difficult to design random logic circuitry for
    processors with large and complex instruction sets. The hard-wired instruction logic occupies a large percentage of
    the chip's real estate, and it becomes difficult to lay out the logic so that related circuits are close to one another. [2]

    [1] Kaeslin, Hubert (2008). Digital Integrated Circuit Design: From VLSI Architectures to CMOS Fabrication. Cambridge University Press.
        p. 747. ISBN 9780521882675.
    [2] Hyde, Randall (2004). Write Great Code: Understanding the Machine. No Starch Press. p. 228. ISBN 9781593270032.

    Reliability (semiconductor)
    Reliability of semiconductor devices can be summarized as follows:
    1. Semiconductor devices are very sensitive to impurities and particles. Therefore, to manufacture these devices it is
       necessary to manage many processes while accurately controlling the level of impurities and particles. The
       finished product quality depends upon the many layered relationship of each interacting substance in the
       semiconductor, including metallization, chip material (list of semiconductor materials) and package.
    2. The problems of micro-processes, and thin films and must be fully understood as they apply to metallization and
       bonding wire bonding. It is also necessary to analyze surface phenomena from the aspect of thin films.
    3. Due to the rapid advances in technology, many new devices are developed using new materials and processes,
       and design calendar time is limited due to non-recurring engineering constraints, plus time to market concerns.
       Consequently, it is not possible to base new designs on the reliability of existing devices.
    4. To achieve economy of scale, semiconductor products are manufactured in high volume. Furthermore repair of
       finished semiconductor products is impractical. Therefore incorporation of reliability at the design stage and
       reduction of variation in the production stage have become essential.
    5. Reliability of semiconductor devices may depend on assembly, use, and environmental conditions. Stress factors
       effecting device reliability include gas, dust, contamination, voltage, current density, temperature, humidity,
       mechanical stress, vibration, shock, radiation, pressure, and intensity of magnetic and electrical fields.
    Design factors affecting semiconductor reliability include: voltage derating, power derating, current derating,
    metastability, logic timing margins (logic simulation), timing analysis, temperature derating, and process control.

    Methods of improvement
    Reliability of semiconductors is kept high through several methods. Cleanrooms control impurities, process control
    controls processing, and burn-in (short term operation at extremes) and probe and test reduce escapes. Probe (wafer
    prober) tests the semiconductor die, prior to packaging, via micro-probes connected to test equipment. Wafer testing
    tests the packaged device, often pre-, and post burn-in for a set of parameters that assure operation. Process and
    design weaknesses are identified by applying a set of stress tests in the qualification phase of the semiconductors
    before their market introduction e. g. according to the AEC Q100 and Q101 stress qualifications.[1]
Reliability (semiconductor)                                                                                      57

    Failure mechanisms
    Failure mechanisms of electronic semiconductor devices fall in the following categories
    1.   Material-interaction-induced mechanisms.
    2.   Stress-induced mechanisms.
    3.   Mechanically induced failure mechanisms.
    4.   Environmentally induced failure mechanisms.

    Material-interaction-induced mechanisms
    1.   Field-effect transistor gate-metal sinking
    2.   Ohmic contact degradation
    3.   Channel degradation
    4.   Surface-state effects
    5.   Package molding contamination—impurities in packaging compounds cause electrical failure

    Stress-induced failure mechanisms
    1. Electromigration – electrically induced movement of the materials in the chip
    2. Burnout – localized overstress
    3. Hot Electron Trapping – due to overdrive in power RF circuits
    4. Electrical Stress – Electrostatic discharge, High Electro-Magnetic Fields (HIRF), Latch-up overvoltage,

    Mechanically induced failure mechanisms
    1. Die fracture – due to mis-match of thermal expansion coefficients
    2. Die-attach voids – manufacturing defect—screenable with Scanning Acoustic Microscopy.
    3. Solder joint failure by creep fatigue or intermetallics cracks.

    Environmentally induced failure mechanisms
    1. Humidity effects – moisture absorption by the package and circuit
    2. Hydrogen effects – Hydrogen induced breakdown of portions of the circuit (Metal)

    [1] AEC Documents (http:/ / www. aecouncil. com/ AECDocuments. html)

    • Materials properties and Failure mechanisms.
Reliability (semiconductor)                                                                                                58

    • Giulio Di Giacomo (Dec 1, 1996), Reliability of Electronic Packages and Semiconductor Devices, McGraw-Hill
    • A. Christou and B.A. Unger (Dec 31, 1989), Semiconductor Device Reliability, NATO Science Series E
    • Michael Pecht, Riko Radojcic, and Gopal Rao (Dec 29, 1998), Guidebook for Managing Silicon Chip Reliability
      (Electronic Packaging Series), CRC Press LLC
    • MIL-HDBK-217F Reliability Prediction of Electronic Equipment
    • MIL-HDBK-251 Reliability/Design Thermal Applications
    • MIL-HDBK-H 108 Sampling Procedures and Tables for Life and Reliability Testing (Based on Exponential
    • MIL-HDBK-338 Electronic Reliability Design Handbook
    • MIL-HDBK-344 Environmental Stress Screening of Electronic Equipment
    • MIL-STD-690C Failure Rate Sampling Plans and Procedures
    • MIL-STD-721C Definition of Terms for Reliability and Maintainability
    • MIL-STD-756B Reliability Modeling and Prediction
    • MIL-HDBK-781 Reliability Test Methods, Plans and Environments for Engineering Development, Qualification
      and Production
    • MIL-STD-1543B Reliability Program Requirements for Space and Missile Systems
    • MIL-STD-1629A Procedures for Performing a Failure Mode, Effects, and Criticality Analysis
    • MIL-STD-1686B Electrostatic Discharge Control Program for Protection of Electrical and Electronic Parts,
      Assemblies and Equipment (Excluding Electrically Initiated Explosive Devices)
    • MIL-STD-2074 Failure Classification for Reliability Testing
    • MIL-STD-2164 Environment Stress Screening Process for Electronic Equipment

    Reverse leakage current
    Reverse leakage current in a semiconductor device is the current from that semiconductor device when the device
    is reverse biased.
    When a semiconductor device is reverse biased it should not conduct any current at all, even though, as a
    temperature effect, it will form electron-hole pairs (see Carrier generation and recombination) at both sides of the
    union and therefore a very small current, which is named Reverse leakage current, this current will duplicate for
    each increment of 10°C in temperature.
    The term it particularly applicable to is mostly semiconductor junctions diode.
Roll-to-roll processing                                                                                                          59

     Roll-to-roll processing
     Roll-to-roll processing, also known as web processing, reel-to-reel processing or R2R, is the process of creating
     electronic devices on a roll of flexible plastic or metal foil.
     Large circuits made with thin-film transistors and other devices can be easily patterned onto these large substrates,
     which can be up to a few metres wide and 50 km long. Some of the devices can be patterned directly, much like an
     inkjet printer deposits ink. For most semiconductors, however, the devices must be patterned using photolithography
     Roll-to-roll processing is a technology which is still in development. If semiconductor devices can be fabricated in
     this way on large substrates, many devices could be fabricated at a fraction of the cost of traditional semiconductor
     manufacturing methods. Most notable would be solar cells, which are still prohibitively expensive for most markets
     due to the high cost per unit area of traditional bulk (mono- or polycrystalline) silicon manufacturing. Other
     applications could arise which take advantage of the flexible nature of the substrates, such as electronics embedded
     into clothing, large-area flexible displays, and roll-up portable displays.

     Thin-film cells

     A crucial issue for a roll-to-roll thin-film cell production system is the deposition rate of the microcrystalline layer,
     and this can be tackled using four approaches[1] :
     •   very high frequency plasma-enhanced chemical vapour deposition (VHF-PECVD)
     •   microwave (MW)-PECVD
     •   hot wire chemical vapour deposition (hot-wire CVD).
     •   the use of ultrasonic nozzles in an in-line process

     External links
     • Voltaflex, The Roll-to-Roll Battery Revolution [2]
     • Rolt Marketing Ltd., Roll to roll screenprinting equipment [3]

     [1] http:/ / ec. europa. eu/ research/ energy/ nn/ nn_rt/ nn_rt_pv/ article_1109_en. htm#5
     [2] http:/ / www. evworld. com/ article. cfm?storyid=933
     [3] http:/ / www. rolt. co. uk
Semiconductor device                                                                                                         60

    Semiconductor device
    Semiconductor devices are electronic components that exploit the electronic properties of semiconductor materials,
    principally silicon, germanium, and gallium arsenide, as well as organic semiconductors. Semiconductor devices
    have replaced thermionic devices (vacuum tubes) in most applications. They use electronic conduction in the solid
    state as opposed to the gaseous state or thermionic emission in a high vacuum.
    Semiconductor devices are manufactured both as single discrete devices and as integrated circuits (ICs), which
    consist of a number—from a few (as low as two) to billions—of devices manufactured and interconnected on a
    single semiconductor substrate.
    The main reason why semiconductor materials are so useful is that the behavior of a semiconductor can be easily
    manipulated by the addition of impurities, known as doping. Semiconductor conductivity can be controlled by
    introduction of an electric field, by exposure to light, and even pressure and heat; thus, semiconductors can make
    excellent sensors. Current conduction in a semiconductor occurs via mobile or "free" electrons and holes,
    collectively known as charge carriers. Doping a semiconductor such as silicon with a small amount of impurity
    atoms, such as phosphorus or boron, greatly increases the number of free electrons or holes within the
    semiconductor. When a doped semiconductor contains excess holes it is called "p-type", and when it contains excess
    free electrons it is known as "n-type", where p (positive for holes) or n (negative for electrons) is the sign of the
    charge of the majority mobile charge carriers. The semiconductor material used in devices is doped under highly
    controlled conditions in a fabrication facility, or fab, to precisely control the location and concentration of p- and
    n-type dopants. The junctions which form where n-type and p-type semiconductors join together are called p-n

    The diode is a device made from a single p-n junction. At the junction of a p-type and an n-type semiconductor there
    forms a region called the depletion zone which blocks current conduction from the n-type region to the p-type
    region, but allows current to conduct from the p-type region to the n-type region. Thus when the device is forward
    biased, with the p-side at higher electric potential, the diode conducts current easily; but the current is very small
    when the diode is reverse biased.
    Exposing a semiconductor to light can generate electron–hole pairs, which increases the number of free carriers and
    its conductivity. Diodes optimized to take advantage of this phenomenon are known as photodiodes. Compound
    semiconductor diodes can also be used to generate light, as in light-emitting diodes and laser diodes.
Semiconductor device                                                                                                             61

    Bipolar junction transistors are formed from two p-n junctions, in
    either n-p-n or p-n-p configuration. The middle, or base, region
    between the junctions is typically very narrow. The other regions, and
    their associated terminals, are known as the emitter and the collector.
    A small current injected through the junction between the base and the
    emitter changes the properties of the base-collector junction so that it
    can conduct current even though it is reverse biased. This creates a
    much larger current between the collector and emitter, controlled by
    the base-emitter current.

    Another type of transistor, the field effect transistor operates on the
    principle that semiconductor conductivity can be increased or
    decreased by the presence of an electric field. An electric field can
    increase the number of free electrons and holes in a semiconductor,
    thereby changing its conductivity. The field may be applied by a
    reverse-biased p-n junction, forming a junction field effect transistor,
                                                                                  An NPN bipolar junction transistor structure
    or JFET; or by an electrode isolated from the bulk material by an oxide
    layer, forming a metal-oxide-semiconductor field effect transistor, or

    The MOSFET is the most used semiconductor device today. The gate electrode is charged to produce an electric
    field that controls the conductivity of a "channel" between two terminals, called the source and drain. Depending on
    the type of carrier in the channel, the device may be an n-channel (for electrons) or a p-channel (for holes)
    MOSFET. Although the MOSFET is named in part for its "metal" gate, in modern devices polysilicon is typically
    used instead. MOSFET is an IC which is semiconductor device.

    Semiconductor device materials
    By far, silicon (Si) is the most widely used material in semiconductor devices. Its combination of low raw material
    cost, relatively simple processing, and a useful temperature range make it currently the best compromise among the
    various competing materials. Silicon used in semiconductor device manufacturing is currently fabricated into boules
    that are large enough in diameter to allow the production of 300 mm (12 in.) wafers.
    Germanium (Ge) was a widely used early semiconductor material but its thermal sensitivity makes it less useful than
    silicon. Today, germanium is often alloyed with silicon for use in very-high-speed SiGe devices; IBM is a major
    producer of such devices.
    Gallium arsenide (GaAs) is also widely used in high-speed devices but so far, it has been difficult to form
    large-diameter boules of this material, limiting the wafer diameter to sizes significantly smaller than silicon wafers
    thus making mass production of GaAs devices significantly more expensive than silicon.
    Other less common materials are also in use or under investigation.
    Silicon carbide (SiC) has found some application as the raw material for blue light-emitting diodes (LEDs) and is
    being investigated for use in semiconductor devices that could withstand very high operating temperatures and
    environments with the presence of significant levels of ionizing radiation. IMPATT diodes have also been fabricated
    from SiC.
    Various indium compounds (indium arsenide, indium antimonide, and indium phosphide) are also being used in
    LEDs and solid state laser diodes. Selenium sulfide is being studied in the manufacture of photovoltaic solar cells.
    The most common use for organic semiconductors is Organic light-emitting diodes.
Semiconductor device                               62

    List of common semiconductor devices
           This list is incomplete.
    Two-terminal devices:
    •   DIAC
    •   Diode (rectifier diode)
    •   Gunn diode
    •   IMPATT diode
    •   Laser diode
    •   Light-emitting diode (LED)
    •   Photocell
    •   PIN diode
    •   Schottky diode
    •   Solar cell
    •   Tunnel diode
    •   VCSEL
    •   VECSEL
    • Zener diode
    Three-terminal devices:
    •   Bipolar transistor
    •   Darlington transistor
    •   Field effect transistor
    •   GTO (Gate Turn-Off)
    •   IGBT (Insulated Gate Bipolar Transistor)
    •   SCR (Silicon Controlled Rectifier)
    •   SGCT (Switched Gate Commuted Thyristor)
    •   Thyristor
    •   TRIAC
    •   Unijunction transistor
    Four-terminal devices:
    • Hall effect sensor (magnetic field sensor)
    Multi-terminal devices:
    •   Integrated Circuit (ICs)
    •   Charge-coupled device (CCD)
    •   Microprocessor
    •   Random Access Memory (RAM)
    •   Read-only memory (ROM)
Semiconductor device                                                                                                           63

    Semiconductor device applications
    All transistor types can be used as the building blocks of logic gates, which are fundamental in the design of digital
    circuits. In digital circuits like microprocessors, transistors act as on-off switches; in the MOSFET, for instance, the
    voltage applied to the gate determines whether the switch is on or off.
    Transistors used for analog circuits do not act as on-off switches; rather, they respond to a continuous range of inputs
    with a continuous range of outputs. Common analog circuits include amplifiers and oscillators.
    Circuits that interface or translate between digital circuits and analog circuits are known as mixed-signal circuits.
    Power semiconductor devices are discrete devices or integrated circuits intended for high current or high voltage
    applications. Power integrated circuits combine IC technology with power semiconductor technology, these are
    sometimes referred to as "smart" power devices. Several companies specialize in manufacturing power

    Component identifiers
    The type designators of semiconductor devices are often manufacturer specific. Nevertheless, there have been
    attempts at creating standards for type codes, and a subset of devices follow those. For discrete devices, for example,
    there are three standards: JEDEC JESD370B in USA, Pro Electron in Europe and JIS in Japan.

    History of semiconductor device development

    Cat's-whisker detector
    Semiconductors had been used in the electronics field for some time before the invention of the transistor. Around
    the turn of the 20th century they were quite common as detectors in radios, used in a device called a "cat's whisker".
    These detectors were somewhat troublesome, however, requiring the operator to move a small tungsten filament (the
    whisker) around the surface of a galena (lead sulfide) or carborundum (silicon carbide) crystal until it suddenly
    started working. Then, over a period of a few hours or days, the cat's whisker would slowly stop working and the
    process would have to be repeated. At the time their operation was completely mysterious. After the introduction of
    the more reliable and amplified vacuum tube based radios, the cat's whisker systems quickly disappeared. The "cat's
    whisker" is a primitive example of a special type of diode still popular today, called a Schottky diode.

    Metal rectifier
    Another early type of semiconductor device is the metal rectifier in which the semiconductor is copper oxide or
    selenium. Westinghouse Electric (1886) was a major manufacturer of these rectifiers.

    World War II
    During World War II, radar research quickly pushed radar receivers to operate at ever higher frequencies and the
    traditional tube based radio receivers no longer worked well. The introduction of the cavity magnetron from Britain
    to the United States in 1940 during the Tizard Mission resulted in a pressing need for a practical high-frequency
    On a whim, Russell Ohl of Bell Laboratories decided to try a cat's whisker. By this point they had not been in use for
    a number of years, and no one at the labs had one. After hunting one down at a used radio store in Manhattan, he
    found that it worked much better than tube-based systems.
    Ohl investigated why the cat's whisker functioned so well. He spent most of 1939 trying to grow more pure versions
    of the crystals. He soon found that with higher quality crystals their finicky behaviour went away, but so did their
    ability to operate as a radio detector. One day he found one of his purest crystals nevertheless worked well, and
    interestingly, it had a clearly visible crack near the middle. However as he moved about the room trying to test it, the
Semiconductor device                                                                                                             64

    detector would mysteriously work, and then stop again. After some study he found that the behaviour was controlled
    by the light in the room–more light caused more conductance in the crystal. He invited several other people to see
    this crystal, and Walter Brattain immediately realized there was some sort of junction at the crack.
    Further research cleared up the remaining mystery. The crystal had cracked because either side contained very
    slightly different amounts of the impurities Ohl could not remove–about 0.2%. One side of the crystal had impurities
    that added extra electrons (the carriers of electrical current) and made it a "conductor". The other had impurities that
    wanted to bind to these electrons, making it (what he called) an "insulator". Because the two parts of the crystal were
    in contact with each other, the electrons could be pushed out of the conductive side which had extra electrons (soon
    to be known as the emitter) and replaced by new ones being provided (from a battery, for instance) where they would
    flow into the insulating portion and be collected by the whisker filament (named the collector). However, when the
    voltage was reversed the electrons being pushed into the collector would quickly fill up the "holes" (the
    electron-needy impurities), and conduction would stop almost instantly. This junction of the two crystals (or parts of
    one crystal) created a solid-state diode, and the concept soon became known as semiconduction. The mechanism of
    action when the diode is off has to do with the separation of charge carriers around the junction. This is called a
    "depletion region".

    Development of the diode
    Armed with the knowledge of how these new diodes worked, a vigorous effort began to learn how to build them on
    demand. Teams at Purdue University, Bell Labs, MIT, and the University of Chicago all joined forces to build better
    crystals. Within a year germanium production had been perfected to the point where military-grade diodes were
    being used in most radar sets.

    Development of the transistor
    After the war, William Shockley decided to attempt the building of a triode-like semiconductor device. He secured
    funding and lab space, and went to work on the problem with Brattain and John Bardeen.
    The key to the development of the transistor was the further understanding of the process of the electron mobility in
    a semiconductor. It was realized that if there was some way to control the flow of the electrons from the emitter to
    the collector of this newly discovered diode, one could build an amplifier. For instance, if you placed contacts on
    either side of a single type of crystal the current would not flow through it. However if a third contact could then
    "inject" electrons or holes into the material, the current would flow.
    Actually doing this appeared to be very difficult. If the crystal were of any reasonable size, the number of electrons
    (or holes) required to be injected would have to be very large -– making it less than useful as an amplifier because it
    would require a large injection current to start with. That said, the whole idea of the crystal diode was that the crystal
    itself could provide the electrons over a very small distance, the depletion region. The key appeared to be to place
    the input and output contacts very close together on the surface of the crystal on either side of this region.
    Brattain started working on building such a device, and tantalizing hints of amplification continued to appear as the
    team worked on the problem. Sometimes the system would work but then stop working unexpectedly. In one
    instance a non-working system started working when placed in water. Ohl and Brattain eventually developed a new
    branch of quantum mechanics known as surface physics to account for the behaviour. The electrons in any one piece
    of the crystal would migrate about due to nearby charges. Electrons in the emitters, or the "holes" in the collectors,
    would cluster at the surface of the crystal where they could find their opposite charge "floating around" in the air (or
    water). Yet they could be pushed away from the surface with the application of a small amount of charge from any
    other location on the crystal. Instead of needing a large supply of injected electrons, a very small number in the right
    place on the crystal would accomplish the same thing.
    Their understanding solved the problem of needing a very small control area to some degree. Instead of needing two
    separate semiconductors connected by a common, but tiny, region, a single larger surface would serve. The emitter
Semiconductor device                                                                                                             65

    and collector leads would both be placed very close together on the top, with the control lead placed on the base of
    the crystal. When current was applied to the "base" lead, the electrons or holes would be pushed out, across the block
    of semiconductor, and collect on the far surface. As long as the emitter and collector were very close together, this
    should allow enough electrons or holes between them to allow conduction to start.

    The first transistor
    The Bell team made many attempts to build such a system with various
    tools, but generally failed. Setups where the contacts were close
    enough were invariably as fragile as the original cat's whisker detectors
    had been, and would work briefly, if at all. Eventually they had a
    practical breakthrough. A piece of gold foil was glued to the edge of a
    plastic wedge, and then the foil was sliced with a razor at the tip of the
    triangle. The result was two very closely spaced contacts of gold.
    When the plastic was pushed down onto the surface of a crystal and
    voltage applied to the other side (on the base of the crystal), current
    started to flow from one contact to the other as the base voltage pushed
    the electrons away from the base towards the other side near the                A stylized replica of the first transistor
    contacts. The point-contact transistor had been invented.
    While the device was constructed a week earlier, Brattain's notes describe the first demonstration to higher-ups at
    Bell Labs on the afternoon of 23 December 1947, often given as the birthdate of the transistor. The "PNP
    point-contact germanium transistor" operated as a speech amplifier with a power gain of 18 in that trial. Known
    generally as a point-contact transistor today, John Bardeen, Walter Houser Brattain, and William Bradford Shockley
    were awarded the Nobel Prize in physics for their work in 1956.

    Origin of the term "transistor"
    Bell Telephone Laboratories needed a generic name for their new invention: "Semiconductor Triode", "Solid
    Triode", "Surface States Triode" [sic], "Crystal Triode" and "Iotatron" were all considered, but "transistor", coined
    by John R. Pierce, won an internal ballot. The rationale for the name is described in the following extract from the
    company's Technical Memoranda (May 28, 1948) [26] calling for votes:
          Transistor. This is an abbreviated combination of the words "transconductance" or "transfer", and
          "varistor". The device logically belongs in the varistor family, and has the transconductance or transfer
          impedance of a device having gain, so that this combination is descriptive.

    Improvements in transistor design
    Shockley was upset about the device being credited to Brattain and Bardeen, who he felt had built it "behind his
    back" to take the glory. Matters became worse when Bell Labs lawyers found that some of Shockley's own writings
    on the transistor were close enough to those of an earlier 1925 patent by Julius Edgar Lilienfeld that they thought it
    best that his name be left off the patent application.
    Shockley was incensed, and decided to demonstrate who was the real brains of the operation. Only a few months
    later he invented an entirely new type of transistor with a layer or 'sandwich' structure. This new form was
    considerably more robust than the fragile point-contact system, and would go on to be used for the vast majority of
    all transistors into the 1960s. It would evolve into the bipolar junction transistor.
    With the fragility problems solved, a remaining problem was purity. Making germanium of the required purity was
    proving to be a serious problem, and limited the number of transistors that actually worked from a given batch of
    material. Germanium's sensitivity to temperature also limited its usefulness. Scientists theorized that silicon would
Semiconductor device                                                                                                                             66

    be easier to fabricate, but few bothered to investigate this possibility. Gordon K. Teal was the first to develop a
    working silicon transistor, and his company, the nascent Texas Instruments, profited from its technological edge.
    Germanium disappeared from most transistors by the late 1960s.
    Within a few years, transistor-based products, most notably radios, were appearing on the market. A major
    improvement in manufacturing yield came when a chemist advised the companies fabricating semiconductors to use
    distilled water rather than tap water: calcium ions were the cause of the poor yields. "Zone melting", a technique
    using a moving band of molten material through the crystal, further increased the purity of the available crystals.

    • Muller, Richard S., and Theodore I. Kamins (1986). Device Electronics for Integrated Circuits. John Wiley and
      Sons. ISBN 0-471-88758-7.

    Sheet resistance
    The sheet resistance is a measure of resistance of thin films that are
    namely uniform in thickness. It is commonly used to characterize
    materials made by semiconductor doping, metal deposition, resistive
    paste printing, and glass coating. Examples of these processes are:
    doped semiconductor regions (e.g. silicon or polysilicon), and the
    resistors which are screen printed onto the substrates of thick film
    hybrid microcircuits.

    The utility of sheet resistance, as opposed to resistance or resistivity, is that it is directly measured using a
    four-terminal sensing measurement (also known as a four-point probe measurement).

    Sheet resistance is applicable to
    two-dimensional systems where the
    thin film is considered to be a
    two-dimensional entity. It is analogous
    to     resistivity    as     used     in
    three-dimensional systems. When the
    term sheet resistance is used, the               Geometry for defining resistivity (left) and sheet resistance (right). In both cases, the
    current must be flowing along the                 current is flowing parallel to the direction of the double-arrow near the letter "L".

    plane of the sheet, not perpendicular to

    In a regular three-dimensional conductor, the resistance can be written as

    where    is the resistivity,   is the cross-sectional area and           is the length. The cross-sectional area can be split
    into the width     and the sheet thickness   .
    By grouping the resistivity with the thickness, the resistance can then be written as:
Sheet resistance                                                                                                              67

         is then the sheet resistance.

     Because the bulk resistance is multiplied by a dimensionless quantity to get sheet resistance, the units of sheet
     resistance are ohms. An alternate, common unit is "ohms per square" (denoted "Ω/sq" or "            "), which is
     dimensionally equal to an ohm, but is exclusively used for sheet resistance. This is an advantage, because a sheet
     resistance of "1Ω" could be taken out of context and misinterpreted as a bulk resistance of 1 ohm, while a sheet
     resistance of "1Ω/sq" cannot be so misinterpreted.
     The reason for the name "ohms per square" is that a square sheet with sheet resistance 1 ohm/square has an actual
     resistance of 1 ohm, regardless of the size of the square. (For a square,       , so          .) The unit can be
     thought of as, loosely, "ohms per aspect ratio".

     For semiconductors
     For semiconductors doped through diffusion or surface peaked ion implantation we define the sheet resistance using
     the average resistivity         of the material:

     which in materials with majority-carrier properties can be approximated by (neglecting intrinsic charge carriers):

     where     is the junction depth,     is the majority-carrier mobility,   is the carrier charge and         is the net
     impurity concentration in terms of depth. Knowing the background carrier concentration                 and the surface
     impurity concentration the sheet resistance-junction depth product          can be found using Irvin's curves, which
     are numerical solutions to the above equation.

     A four point probe is used to avoid contact resistance, which can often be the same magnitude as the sheet resistance.
     Typically a constant current is applied to two probes and the potential on the other two probes is measured with a
     high impedance voltmeter. A geometry factor needs to be applied according to the shape of the four point array. Two
     common arrays are square and in-line. For more details see Van der Pauw method.
     A very crude two point probe method is to measure resistance with the probes close together and the resistance with
     the probes far apart.
     The difference between these two resistances will be the order of magnitude of the sheet resistance.


     General references
     • Van Zant, Peter (2000). Microchip Fabrication. New York: McGraw-Hill. pp. 431–2. ISBN 0-07-135636-3.
     • Jaeger, Richard C. (2001). Introduction to Microelectronic Fabrication. New Jersey: Prentice Hall. pp. 81–88.
       ISBN 0-201-44494-7.
Solid state (electronics)                                                                                                                    68

     Solid state (electronics)
     Solid-state electronics are those circuits or devices built entirely from solid materials and in which the electrons, or
     other charge carriers, are confined entirely within the solid material.[1] The term is often used to contrast with the
     earlier technologies of vacuum and gas-discharge tube devices and it is also conventional to exclude
     electro-mechanical devices (relays, switches, hard drives and other devices with moving parts) from the term solid
     state.[2] [3] While solid-state can include crystalline, polycrystalline and amorphous solids and refer to electrical
     conductors, insulators and semiconductors, the building material is most often crystalline semiconductor.[4] [5]
     Common solid-state devices include transistors, microprocessor chips, and DRAM. DRAM devices are used in
     computers, flash drives and more recently, solid state drives to replace mechanically rotating magnetic disc hard
     drives. A considerable amount of electromagnetic and quantum-mechanical action takes place within the device. The
     expression became prevalent in the 1950s and the 1960s, during the transition from vacuum tube technology to
     semiconductor diodes and transistors. More recently, the integrated circuit (IC), the light-emitting diode (LED), and
     the liquid-crystal display (LCD) have evolved as further examples of solid-state devices.
     In a solid-state component, the current is confined to solid elements and compounds engineered specifically to
     switch and amplify it. Current flow can be understood in two forms: as negatively-charged electrons, and as
     positively-charged electron deficiencies called electron holes or just "holes". In some semiconductors, the current
     consists mostly of electrons; in other semiconductors, it consists mostly of "holes". Both the electron and the hole are
     called charge carriers.
     For data storage, solid-state devices are much faster and more reliable but are usually more expensive. Although
     solid-state costs continually drop, disks, tapes, and optical disks also continue to improve their cost/performance
     The first solid-state device was the "cat's whisker" detector, first used in 1930s radio receivers. A whisker-like wire
     was moved around on a solid crystal (such as a germanium crystal) in order to detect a radio signal.[6] The solid-state
     device came into its own with the invention of the transistor in 1947.

     [1]   Martin H. Weik, Fiber optics standard dictionary, p.937, Birkhäuser, 1997 ISBN 0412122413.
     [2]   Lawrence J. Kamm, Understanding electro-mechanical engineering,p.174, John Wiley and Sons, 1995 ISBN 0780310314.
     [3]   Sabrie Soloman, Sensors handbook, page 23.18, McGraw-Hill Professional, 1998 ISBN 0070596301.
     [4]   John Sydney Blakemore, Solid state physics, pp.1-3, Cambridge University Press, 1985 ISBN 0521313910.
     [5]   Richard C. Jaeger, Travis N. Blalock, Microelectronic circuit design, pp.46-47, McGraw-Hill Professional, 2003 ISBN 0072505036.
     [6]   http:/ / encyclopedia2. thefreedictionary. com/ solid+ state Free dictionary

     Further reading
     • Netbook Trends and Solid-State Technology Forecast (
       Netbook_Trends_and_SolidState_Technology_January_2009_CBR.pdf). pp. 7. Retrieved
STEC, Inc.                                                                                                                   69

    STEC, Inc.
    "STEC" redirects here. For "Shiga toxin-producing E. coli", please see Escherichia coli O121.
             For other uses please see Stec (disambiguation)

                                                                  STEC, Inc.

                Type                                          [1]
                                     Public (NASDAQ: STEC         )

                Industry             Semiconductor
                                     Storage (memory)
                                     Computer data storage
                                     Embedded Systems (Medical, Military, Government, Servers, Storage array, NAS, DAS and
                                     Solid-state drive

                Founded              March, 1990

                Headquarters         Santa Ana, California, USA

                Number of locations Six (USA, Italy, Malaysia, Japan, China, Taiwan)

                Area served          Worldwide

                Key people           Manouch Moshayedi, CEO
                                     Mark Moshayedi, President, COO, CTO
                                     Raymond D. Cook, CFO
                                     Mehrdad Komeili, CIO

                Products             Zeus (ZeusIOPS)
                                     MACH (MACH 8 and MACH16)
                                     Slim SATA

                Services             Solid-state drives
                                     Dynamic random access memory
                                     Flash memory
                                     PCI Express
                                     Computer data storage
                                     Ultra-Mobile PC
                                     Fibre Channel
                                     Serial Attached SCSI

                Revenue                 $354.2 million USD (FY2009)

                Employees            1000 Worldwide

                Website                                 [2]

    STEC, Inc. NASDAQ: STEC [1] is a multinational company and a leader[3] in enterprise solid-state drive (SSD).[4]
    The company is headquartered in Santa Ana, California[5]
STEC, Inc.                                                                                                                70

    The company designs, develops, manufactures, and markets custom memory solutions based on flash memory and
    Dynamic Random Access Memory (DRAM) for its original equipment manufacturers (OEM) customers.[6]
    The company's top customers are OEMs such as Compellent Technologies, EMC, Fujitsu, HDS, HP, IBM, LSI
    Corporation and Sun Microsystems.[6] [7]

    In 1990, Manouch Moshayedi and Mike Moshayedi started Simple Technology, Inc., a company which designed and
    sold computer memory modules.[8] Three years later, Mark Moshayedi joined the company.[8]
    In 1994, Simple Technology bought Cirrus Logic’s flash controller operation, allowing the company to enter the
    flash memory business for consumer electronic devices.[8] In 1998, Simple Technology bought SiliconTech Inc.,
    obtaining its business flash memory customer base and operation.[8] In 1999 they were first to market the 1GB Solid
    State IDE Storage Devices and SDRAM Modules and also first to market the 320MB Type II CompactFlash.
    Simple Tech completed IPO and went public on September 26, 2000 under the ticker symbol of STEC. (Nasdaq:
    In the same year Simple Tech sold its consumer flash business to Fabrik Inc of San Mateo, and renamed itself
    STEC.[8] The company then focused on business flash memory products. At that point Mike Moshayedi resigned
    leaving Mark Moshayedi as president and chief operating officer and Manouch Moshayedi as CEO.[10] [8]
    On March 20, 2007, Mark Moshayedi was promoted to President.[11]
    In 2009, after announcing EMC as the sole customer of its ZeusIOPS enterprise SSDs, STEC sales reached the $1
    billion dollar market cap milestone.[7]

    STEC is a leading supplier of SSDs[4] and offers multiple storage interfaces to OEM customers.[12] The company
    makes flash drives from bought-in flash memory chips that are used in various applications for server and storage
    array manufactures.[8] STEC provides SSDs, Flash Memory, and DRAM to customers. The company has two
    primary product lines: the Zeus SSD and the MACH SSD family lines.
    STEC’s Zeus SSD family line includes Zeus-IOPS SSDs and ZeusRAM SSDs. The Zeus-IOPS uses flash memory
    and the ZeusRAM uses NAND and DRAM for primary storage.[13] [14]
    The Zeus-IOPS family line is a market leader for array-based SSD because of the company’s OEM relationships with
    EMC, IBM, HDS and others.[13]
    ZeusRAM SSDs’ leverage NAND flash and DRAM to provide low latency storage SSD for enterprises.[15]
    The MACH SSD family includes MACH16 drives that are used by enterprise-class servers and handle up to 30,000
    I/O’s per second.[16]
STEC, Inc.                                                                                                                                                 71

    [1]  http:/ / quotes. nasdaq. com/ asp/ SummaryQuote. asp?symbol=STEC& selected=STEC
    [2]  http:/ / www. stec-inc. com/
    [3]  By Chris Mellor, The Register. “ Pliant does MLC Flash (http:/ / www. theregister. co. uk/ 2010/ 09/ 08/ pliant_mlc/ ).” September 8, 2010.
    [4]  By Rich Castagna, SearchStorage. “ The business of storage (http:/ / searchstorage. techtarget. com/ magazineFeature/
        0,296894,sid5_gci1510645_mem1,00. html).” May 2010.
    [5] Bloomberg BusinessWeek. “ STEC Profile (http:/ / investing. businessweek. com/ research/ stocks/ snapshot/ snapshot.
        asp?ticker=STEC:US).” September 20, 2010.
    [6] By Beth Pariseau, SearchStorage. “ STEC Inc. CTO looks at the future of flash and solid-state drives (http:/ / searchstorage. techtarget. com/
        news/ article/ 0,289142,sid5_gci1364867_mem1,00. html).” August 17, 2009.
    [7] By Paul Shread, Enterprise Storage Forum. “ STEC Has EMC to Thank for Its Rapid Growth (http:/ / www. enterprisestorageforum. com/
        hardware/ news/ article. php/ 3833141/ STEC-Has-EMC-to-Thank-for-Its-Rapid-Growth. htm).” August 4, 2009.
    [8] By Chris Mellor, The Register. “ There’s a lot of sizzle with this STEC (http:/ / www. theregister. co. uk/ 2008/ 06/ 17/ sizzle_with_this_stec/
        ).” June 17, 2008.
    [9] MSN Money. “ STEC, Inc. MSN Fact Sheet (http:/ / moneycentral. hoovers. com/ global/ msn/ factsheet. xhtml?COID=47331).”
    [10] By Om Malik, GigaOm. “ Fabrik to buy SimpleTech, get big fast (http:/ / gigaom. com/ 2007/ 02/ 11/ fabrik-to-buy-simpletech-get-big-fast/
        ).” February 11, 2007.
    [11] NewsBlaze. “ STEC Promotes Chief Technical Officer and Chief Operating Officer Mark Moshayedi to President (http:/ / newsblaze. com/
        story/ 2007032005301700002. pz/ topstory. html).”
    [12] By Beth Pariseau, SearchStorage. “ LSI delivers Flash-based PCIe card with 6 Gbps SAS Interface (http:/ / searchstorage. techtarget. com/
        news/ article/ 0,289142,sid5_gci1454240_mem1,00. html).” March 16, 2010.
    [13] By Dave Raffo, SearchStorage. “ STEC adds DRAM SSD for appliances; Violin launches MLC device for capacity (http:/ / searchstorage.
        techtarget. com/ news/ article/ 0,289142,sid5_gci1520362,00. html).” September 20, 2010.
    [14] StorageNewsletter. “ EMC With STEC for Enterprise Flash Drives (http:/ / www. storagenewsletter. com/ news/ flash/
        emc-enterprise-flash-drives-stec).” January 14, 2008.
    [15] By Chris Preimesberger, eWeek. “ STEC Unveils Ultra-low Latency Storage SSD (http:/ / www. eweek. com/ c/ a/ Data-Storage/
        STEC-Unveils-New-UltraLow-Latency-Storage-SSD-151816/ ).” September 20, 2010.
    [16] By Lucas Merian, Computerworld. “ STEC releases faster SSDs for data centers (http:/ / www. computerworld. com/ s/ article/ 9185478/
        STEC_releases_faster_SSDs_for_data_centers).” September 14, 2010.
Strain engineering                                                                                                               72

    Strain engineering
    Strain engineering refers to a general strategy employed in semiconductor manufacturing to enhance device
    performance. Performance benefits are achieved by modulating strain in the transistor channel, which enhances
    electron mobility (or hole mobility) and thereby conductivity through the channel.

    Strain Engineering in CMOS Manufacturing
    The use of various strain engineering techniques has been reported by many prominent microprocessor
    manufacturers, including AMD, IBM, and Intel, primarily with regards to sub-130 nm technologies. One key
    consideration in using strain engineering in CMOS technologies is that PMOS and NMOS respond differently to
    different types of strain. Specifically, PMOS performance is best served by applying compressive strain to the
    channel, whereas NMOS receives benefit from tensile strain[1]. Many approaches to strain engineering induce strain
    locally, allowing both n-channel and p-channel strain to be modulated independently.
    One prominent approach involves the use of a strain-inducing capping layer. CVD silicon nitride is a common
    choice for a strained capping layer, in that the magnitude and type of strain (e.g. tensile vs compressive) may be
    adjusted by modulating the deposition conditions, especially temperature.[2] Standard lithography patterning
    techniques can be used to selectively deposit strain-inducing capping layers, to deposit a compressive film over only
    the PMOS, for example.
    Capping layers are key to the Dual Stress Liner (DSL) approach reported by IBM-AMD. In the DSL process,
    standard patterning and lithography techniques are used to selectively deposit a tensile silicon nitride film over the
    NMOS and a compressive silicon nitride film over the PMOS.
    A second prominent approach involves the use of a silicon-rich solid solution, especially silicon-germanium, to
    modulate channel strain. One manufacturing method involves epitaxial growth of silicon on top of a relaxed
    silicon-germanium underlayer. Tensile strain is induced in the silicon as the lattice of the silicon layer is stretched to
    mimic the larger lattice constant of the underlying silicon-germanium. Conversely, compressive strain could be
    induced by using a solid solution with a smaller lattice constant, such as silicon-carbon. See, e.g., U.S. Patent No.
    7,023,018. Another closely related method [3] involves replacing the source and drain region of a MOSFET with

    External links

    Dual Stress Liner
    • Tech Zone [4]
    • Lost Circuits [5]

    [1]   http:/ / www. realworldtech. com/ page. cfm?ArticleID=RWT123005001504& p=6
    [2]   Martyniuk, M, Antoszewski, J. Musca, C.A., Dell, J.M., Faraone, L. Smart Mater. Struct. 15 (2006) S29-S38)
    [3]   http:/ / www. sciencenews. org/ articles/ 20040228/ bob8. asp
    [4]   http:/ / techzone. pcvsconsole. com/ news. php?tzd=2861
    [5]   http:/ / www. lostcircuits. com/ cpu/ amd_venice/ 3. shtml
Thermal copper pillar bump                                                                                                      73

    Thermal copper pillar bump
    The thermal copper pillar bump, also known as the "thermal bump", is a thermoelectric device made from
    thin-film thermoelectric material embedded in flip chip interconnects (in particular copper pillar solder bumps) for
    use in electronics and optoelectronic packaging, including: flip chip packaging of CPU and GPU integrated circuits
    (chips), laser diodes, and semiconductor optical amplifiers (SOA). Unlike conventional solder bumps that provide an
    electrical path and a mechanical for connection to the package, thermal bumps act as solid-state heat pumps and add
    thermal management functionality locally on the surface of a chip or to another electrical component. The diameter
    of a thermal bump is 238 μm (micrometres) and 60 μm high.
    The thermal bump uses the thermoelectric effect, which is the direct conversion of temperature differences to electric
    voltage and vice versa. Simply put, a thermoelectric device creates a voltage when there is a different temperature on
    each side, or when a voltage is applied to it, it creates a temperature difference. This effect can be used to generate
    electricity, to measure temperature, to cool objects, or to heat them.
    For each bump, thermoelectric cooling (TEC) occurs when a current is passed through the bump. The thermal bump
    pulls heat from one side of the device and transfers it to the other as current is passed through the material. This is
    known as the Peltier effect[1] . The direction of heating and cooling is determined by the direction of current flow
    and the sign of the majority electrical carrier in the thermoelectric material. Thermoelectric power generation (TEG)
    on the other hand occurs when the thermal bump is subjected to a temperature gradient (i.e., the top is hotter than the
    bottom). In this instance, the device generates current, converting heat into electrical power. This is termed the
    Seebeck effect[1] .
    The thermal bump was developed by Nextreme Thermal Solutions as a method for integrating active thermal
    management functionality at the chip level in the same manner that transistors, resistors and capacitors are integrated
    in conventional circuit designs today. Nextreme chose the copper pillar bump as an integration strategy due to its
    widespread acceptance by Intel, Amkor and other industry leaders as the method for connecting microprocessors and
    other advanced electronics devices to various surfaces during a process referred to as “flip-chip” packaging. The
    thermal bump can be integrated as a part of the standard flip-chip process (Figure 1) or integrated as discrete devices.
    The efficiency of a thermoelectric device is measured by the heat moved (or pumped) divided by the amount of
    electrical power supplied to move this heat. This ratio is termed the coefficient of performance or COP and is a
    measured characteristic of a thermoelectric device. The COP is inversely related to the temperature difference that
    the device produces. As you move a cooling device further away from the heat source, parasitic losses between the
    cooler and the heat source necessitate additional cooling power: the further the distance between source and cooler,
    the more cooling is required. For this reason, the cooling of electronic devices is most efficient when it occurs closest
    to the source of the heat generation.
    Use of the thermal bump does not displace system level cooling, which is still needed to move heat out of the
    system; rather it introduces a fundamentally new methodology for achieving temperature uniformity at the chip and
    board level. In this manner, overall thermal management of the system becomes more efficient. In addition, while
    conventional cooling solutions scale with the size of the system (bigger fans for bigger systems, etc.), the thermal
    bump can scale at the chip level by using more thermal bumps in the overall design.
Thermal copper pillar bump                                                                                                            74

    A brief history of solder and flip chip/chip scale
    Solder bumping technology (the process of joining a chip to a substrate
    without shorting using solder) was first conceived and implemented by
    IBM in the early ‘60s. Three versions of this type of solder joining
    were developed. The first was to embed copper balls in the solder
    bumps to provide a positive stand-off. The second solution, developed         Figure 1. Thermal and electrical bumps integrated
                                                                                                on a single substrate.
    by Delco Electronics (General Motors) in the late ‘60s, was similar to
    embedding copper balls except that the design employed a rigid silver
    bump. The bump provided a positive stand-off and was attached to the substrate by means of solder that was
    screen-printed onto the substrate. The third solution was to use a screened glass dam near the electrode tips to act as
    a ‘‘stop-off’’ to prevent the ball solder from flowing down the electrode. By then the Ball Limiting Metallurgy (BLM)
    with a high-lead (Pb) solder system and a copper ball had proven to work well. Therefore, the ball was simply
    removed and the solder evaporation process extended to form pure solder bumps that were approximately 125μm
    high. This system became known as the controlled collapse chip connection (C3 or C4).

    Until the mid-90’s, this type of flip-chip assembly was practiced almost exclusively by IBM and Delco. Around this
    time, Delco sought to commercialize its technology and formed Flip Chip Technologies with Kulicke & Soffa as a
    partner. At the same time, MCNC (which had developed a plated version of IBM’s C4 process) received funding
    from DARPA to commercialize its technology. These two organizations, along with APTOS (Advanced Plating
    Technologies on Silicon), formed the nascent out-sourcing market.
    During this same time, companies began to look at reducing or streamlining their packaging, from the earlier
    multi-chip-on-ceramic packages that IBM had originally developed C4 to support, to what were referred to as Chip
    Scale Packages (CSP). There were a number of companies developing products in this area. These products could
    usually be put into one of two camps: either they were scaled down versions of the multi-chip on ceramic package
    (of which the Tessera package would be one example); or they were the streamlined versions developed by Unitive
    Electronics, et al. (where the package wiring had been transferred to the chip, and after bumping, they were ready to
    be placed).
    One of the issues with the CSP type of package (which was intended to be soldered directly to an FR4 or flex circuit)
    was that for high-density interconnects, the soft solder bump provided less of a stand-off as the solder bump diameter
    and pitch were decreased. Different solutions were employed including one developed by Focus Interconnect
    Technology (former APTOS engineers), which used a high aspect ratio plated copper post to provide a larger fixed
    standoff than was possible for a soft solder collapse joint.
    Today, flip chip is a well established technology and collapsed soft solder connections are used in the vast majority
    of assemblies. Interestingly, the copper post stand-off developed for the CSP market has found a home in
    high-density interconnects for advanced micro-processors and is used today by IBM for its CPU packaging.
Thermal copper pillar bump                                                                                                             75

    Copper pillar solder bumping
    Recent trends in high-density interconnects have led to the use of copper pillar solder bumps (CPB) for CPU and
    GPU packaging[2] . CPBs are an attractive replacement for traditional solder bumps because they provide a fixed
    stand-off independent of pitch. This is extremely important as most of the high-end products are underfilled and a
    smaller standoff may create difficulties in getting the underfill adhesive to flow under the die.
    Figure 2 shows an example of a CPB fabricated by Intel and incorporated into their Presler line of microprocessors
    among others. The cross section shows copper and a copper pillar (approximately 60 um high) electrically connected
    through an opening (or via) in the chip passivation layer at the top of the picture. At the bottom is another copper
    trace on the package substrate with solder between the two copper layers.

    Thin-film thermoelectric technology
    Thin films are thin material layers ranging from fractions of a
    nanometer to several micrometers in thickness. Thin-film
    thermoelectric materials are grown by conventional semiconductor
    deposition methods and fabricated using conventional semiconductor
    micro-fabrication techniques.
    Thin-film thermoelectrics have been demonstrated to provide high heat
    pumping capacity that far exceeds the capacities provided by
    traditional bulk pellet TE products[3] . The benefit of thin-films as
    compared to bulk materials for thermoelectric manufacturing is
    expressed in Equation 1. Here the Qmax (maximum heat pumped by a              Figure 2. Intel Presler copper pillar solder bump.
    module) is shown to be inversely proportional to the thickness of the
    film, L.

                                                  Eq. 1

    As such, TE coolers manufactured with thin-films can easily have 10x – 20x higher Qmax values for a given active
    area A. This makes thin-film TECs ideally suited for applications involving high heat-flux flows. In addition to the
    increased heat pumping capability, the use of thin films allows for truly novel implementation of TE devices. Instead
    of a bulk module that is 1-3 mm in thickness, a thin-film TEC can be fabricated less than 100 um in thickness.
    In its simplest form, the P or N leg of a TE couple (the basic building block of all thin-film TE devices) is a layer of
    thin-film TE material with a solder layer above and below, providing electrical and thermal functionality.

    Thermal copper pillar bump
    The thermal bump is compatible with the existing flip-chip manufacturing infrastructure, extending the use of
    conventional solder bumped interconnects to provide active, integrated cooling of a flip-chipped component using
    the widely accepted copper pillar bumping process. The result is higher performance and efficiency within the
    existing semiconductor manufacturing paradigm. The thermal bump also enables power generating capabilities
    within copper pillar bumps for energy recycling applications.
    Thermal bumps have been shown to achieve a temperature differential of 60 °C between the top and bottom headers;
    demonstrated power pumping capabilities exceeding 150 W/cm2; and when subjected to heat, have demonstrated the
    capability to generate up to 10 mW of power per bump.
Thermal copper pillar bump                                                                                                         76

    Thermal copper pillar bump structure
    Figure 3 shows an SEM cross-section of a TE leg. Here it is demonstrated that the thermal bump is structurally
    identical to a CPB with an extra layer, the TE layer, incorporated into the stack-up. The addition of the TE layer
    transforms a standard copper pillar bump into a thermal bump. This element, when properly configured electrically
    and thermally, provides active thermoelectric heat transfer from one side of the bump to the other side. The direction
    of heat transfer is dictated by the doping type of the thermoelectric material (either a P-type or N-type
    semiconductor) and the direction of electrical current passing through the material. This type of thermoelectric heat
    transfer is known as the Peltier effect. Conversely, if heat is allowed to pass from one side of the thermoelectric
    material to the other, a current will be generated in the material in a phenomenon known as the Seebeck effect. The
    Seebeck effect is essentially the reverse of the Peltier effect. In this mode, electrical power is generated from the
    flow of heat in the TE element. The structure shown in Figure 3 is capable of operating in both the Peltier and
    Seebeck modes, though not simultaneously.
    Figure 4 shows a schematic of a typical CPB and a thermal bump for
    comparison purposes. These structures are similar, with both having
    copper pillars and solder connections. The primary distinction between
    the two is the introduction of either a P- or N-type thermoelectric layer
    between two solder layers. The solders used with CPBs and thermal
    bumps can be any one of a number of commonly used solders
    including, but not limited to, Sn, SnPb eutectic, SnAg or AuSn.

                                                                                  Figure 3. Cross sectional view of Nextreme’s
                                                                                          thermal copper pillar bump.

    Figure 5 shows a device equipped with a thermal bump. The thermal
    flow is shown by the arrows labeled “heat.” Metal traces, which can be
    several micrometres high, can be stacked or interdigitated to provide
    highly conductive pathways for collecting heat from the underlying
    circuit and funneling that heat to the thermal bump.

                                                                                  Figure 4. Schematic showing traditional CPB
                                                                                 next to a P-type and N-type pillar bump. The P-
                                                                                and N-type bumps together make up a P/N couple
                                                                                   that, when connected in series electrically,
                                                                                  provides for either Peltier cooling or Seebeck
                                                                                                power generation.
Thermal copper pillar bump                                                                                                              77

    The metal traces shown in the figure for conducting electrical current
    into the thermal bump may or may not be directly connected to the
    circuitry of the chip. In the case where there are electrical connections
    to the chip circuitry, on-board temperature sensors and driver circuitry
    can be used to control the thermal bump in a closed loop fashion to
    maintain optimal performance. Second, the heat that is pumped by the
    thermal bump and the additional heat created by the thermal bump in
    the course of pumping that heat will need to be rejected into the
    substrate or board. Since the performance of the thermal bump can be
    improved by providing a good thermal path for the rejected heat, it is
    beneficial to provide high thermally conductive pathways on the                 Figure 5. Close-up schematic showing flow of
                                                                                  heat through a thermal bump. Also shown are the
    backside of the thermal bump. The substrate could be a highly
                                                                                    multi-layer metal traces often used in complex
    conductive ceramic substrate like AlN or a metal (e.g., Cu, CuW,                 integrated circuits. These metal layers can be
    CuMo, etc.) with a dielectric. In this case, the high thermal                beneficial for gathering heat from larger areas and
    conductance of the substrate will act as a natural pathway for the             funneling it into the thermal bump, reducing the
                                                                                    thermal constriction resistance in the circuit. A
    rejected heat. The substrate might also be a multilayer substrate like a
                                                                                  thermal via is shown in the printed wire board for
    printed wiring board (PWB) designed to provide a high-density                            improved heat rejection path.
    interconnect. In this case, the thermal conductivity of the PWB may be
    relatively poor, so adding thermal vias (e.g. metal plugs) can provide excellent pathways for the rejected heat.

    Thermal bumps can be used in a number of different ways to provide chip cooling and power generation.

    General cooling
    Thermal bumps can be evenly distributed across the surface of a chip to provide a uniform cooling effect. In this
    case, the thermal bumps may be interspersed with standard bumps that are used for signal, power and ground. This
    allows the thermal bumps to be placed directly under the active circuitry of the chip for maximum effectiveness. The
    number and density of thermal bumps are based on the heat load from the chip. Each P/N couple can provide a
    specific heat pumping (Q) at a specific temperature differential (ΔT) at a given electrical current. Temperature
    sensors on the chip (“on board” sensors) can provide direct measurement of the thermal bump performance and
    provide feedback to the driver circuit.

    Precision temperature control
    Since thermal bumps can either cool or heat the chip depending on the current direction, they can be used to provide
    precision control of temperature for chips that must operate within specific temperature ranges irrespective of
    ambient conditions. For example, this is a common problem for many optoelectronic components.

    Hotspot cooling
    In microprocessors, graphics processors and other high-end chips, hotspots can occur as power densities vary
    significantly across a chip[4] . These hotspots can severely limit the performance of the devices. Because of the small
    size of the thermal bumps and the relatively high density at which they can be placed on the active surface of the
    chip, these structures are ideally suited for cooling hotspots. In such a case, the distribution of the thermal bumps
    may not need to be even. Rather, the thermal bumps would be concentrated in the area of the hotspot while areas of
    lower heat density would have fewer thermal bumps per unit area. In this way, cooling from the thermal bumps is
    applied only where needed, thereby reducing the added power necessary to drive the cooling and reducing the
    general thermal overhead on the system.
Thermal copper pillar bump                                                                                                                 78

    Power generation
    In addition to chip cooling, thermal bumps can also be applied to high heat-flux interconnects to provide a constant,
    steady source of power for energy scavenging applications. Such a source of power, typically in the mW range, can
    trickle charge batteries for wireless sensor networks and other battery operated systems.

    [1] D.M. Rowe, ed. CRC Handbook of Thermoelectrics. Boca Raton, CRC Press, 1994
    [2] J. Kloeser and E. Weibach, “High-Performance Flip Chip Packages with Copper Pillar Bumping,” Global SMT & Packaging, May 2006.
    [3] G.J. Snyder, M. Soto, R. Alley, D. Koester, B. Conner, ”Hot Spot Cooling using Embedded Thermoelectric Coolers,” Proc. 22nd IEEE
        Semi-Therm Symp., 2006.
    [4] A. Bar-Cohen, University of Maryland, “Enhanced Thermoelectric Cooler for On-Chip Hot Spot Cooling” presentation, IntePACK’07:
        ASME/Pacific Rim Technical Conference and Exhibition on Packaging and Integration of Electronic and Photonic Systems, MEMS, and
        NEMS, July 8-12, 2007.

    External links
    • Kulicke & Soffa (
    • MCNC (
    • Aptos Technology (
    • Nextreme Thermal Solutions (
    • Amkor Technology Inc. (

    Thin-film transistor
    A thin-film transistor (TFT) is a special
    kind of field-effect transistor made by
    depositing thin films of a semiconductor
    active layer as well as the dielectric layer
    and metallic contacts over a supporting
    substrate. A common substrate is glass,
    since the primary application of TFTs is in
    liquid crystal displays. This differs from the
    conventional      transistor    where      the
    semiconductor material typically is the
    substrate, such as a silicon wafer.

                                                                                   Several types of TFT constructions.
Thin-film transistor                                                                                                          79


                             1 - Glass plates
                             2/3 - Horizontal and vertical polarisers
                             4 - RGB colour mask
                             5/6 - Horizontal and vertical command lines
                             7 - Rugged polymer layer
                             8 - Spacers
                             9 - Thin film transistors
                             10 - Front electrode
                             11 - Rear electrodes

     TFTs can be made using a wide variety of semiconductor materials. A common material is silicon. The
     characteristics of a silicon based TFT depend on the crystalline state. That is, the semiconductor layer can be either
     amorphous silicon,[1] microcrystalline silicon,[1] or it can be annealed into polysilicon.
     Other materials which have been used as semiconductors in TFTs include compound semiconductors such as
     cadmium selenide[2] [3] and metal oxides such as Zinc Oxide.[4] TFTs have also been made using organic materials
     (referred to as an Organic TFT or OTFT).
     By using transparent semiconductors and transparent electrodes, such as indium tin oxide (ITO), some TFT devices
     can be made completely transparent.
     Because the substrate cannot withstand the high annealing temperature, the deposition process has to be completed
     under relatively low temperature. Chemical vapor deposition, physical vapor deposition (usually sputtering) are
     applied. Also, the first solution processed transparent TFTs (TTFTs), based on zinc oxide were reported in 2003 by
     researchers at Oregon State University.[4]
     Portuguese laboratory CENIMAT, Universidade Nova de Lisboa, discovered a way of producing TFT at room
     temperature, having produced the world’s first completely transparent TFT at room temperature. CENIMAT also
     developed the first paper transistor, which may lead to applications such as magazines and journal pages with
     moving images.
Thin-film transistor                                                                                                                             80

     The best known application of thin-film transistors is in TFT LCDs, an implementation of LCD technology.
     Transistors are embedded within the panel itself, reducing crosstalk between pixels and improving image stability.
     As of 2008, many color LCD TVs and monitors use this technology. TFT panels are heavily used in digital
     radiography applications in general radiography. It is used in both direct and indirect capture as a base for the image
     receptor in medical radiography.
     The new AMOLED (Active Matrix Organic light-emitting diode) screens also contain a TFT layer.
     The most beneficial aspect of TFT technology is a separate transistor for each pixel on the display. As each transistor
     is small, the amount of charge needed to control it is also small. This allows for very fast re-drawing of the display.
     Prior to TFT, passive matrix LCD displays could not keep up with fast moving images. A mouse dragged across the
     screen, for example, from point A to point B, would disappear between the two points. A TFT monitor can track the
     mouse, resulting in a display that can be used for video, gaming and all forms of multimedia.

     [1] Kanicki, Jerzy (1992). Amorphous & Microcystalline Semiconductor Devices Volume II: Materials and Device Physics. Artech House, Inc..
         ISBN 0-89006-379-6.
     [2] Brody, T. Peter (November 1984). "The Thin Film Transistor - A Late Flowering Bloom". IEEE Transactions on Electron Devices 31 (11):
         1614–1628. doi:10.1109/T-ED.1984.21762.
     [3] Brody, T. Peter (1996). "The birth and early childhood of active matrix - a personal memoir". Journal of the SID 4/3: 113–127.
     [4] Wager, John. OSU Engineers Create World's First Transparent Transistor (http:/ / oregonstate. edu/ dept/ ncs/ newsarch/ 2003/ Mar03/
         transparent. htm). College of Engineering, Oregon State University, Corvallis, OR: OSU News & Communication, 2003. 29 July 2007.

     Transistor channel
     The field-effect transistor (FET) relies on an electric field to control
     the shape and hence the conductivity of a channel of one type of charge
     carrier in a semiconductor material. FETs are sometimes called
     unipolar transistors to contrast their single-carrier-type operation with
     the dual-carrier-type operation of bipolar (junction) transistors (BJT).
     The concept of the FET predates the BJT, though it was not physically
     implemented until after BJTs due to the limitations of semiconductor
     materials and the relative ease of manufacturing BJTs compared to
     FETs at the time.

     The principle of field-effect transistors was first patented by Julius
     Edgar Lilienfeld in 1925 and by Oskar Heil in 1934, but practical           High-power N-channel field-effect transistor

     semi-conducting devices (the JFET, junction gate field-effect
     transistor) were only developed much later after the transistor effect was observed and explained by the team of
     William Shockley at Bell Labs in 1947. The MOSFET (metal–oxide–semiconductor field-effect transistor), which
     largely superseded the JFET and had a more profound effect on electronic development, was first proposed by
     Dawon Kahng in 1960.[1]
Transistor channel                                                                                                                    81

    All FETs have a gate, drain, and source terminal that correspond
    roughly to the base, collector, and emitter of BJTs. Aside from the
    JFET, all FETs also have a fourth terminal called the body, base, bulk,
    or substrate. This fourth terminal serves to bias the transistor into
    operation; it is rare to make non-trivial use of the body terminal in
    circuit designs, but its presence is important when setting up the
    physical layout of an integrated circuit. The size of the gate, length L in
    the diagram, is the distance between source and drain. The width is the      Cross section of an n-type MOSFET
    extension of the transistor, in the diagram perpendicular to the cross
    section. Typically the width is much larger than the length of the gate. A gate length of 1 µm limits the upper
    frequency to about 5 GHz, 0.2 µm to about 30 GHz.

    The names of the terminals refer to their functions. The gate terminal may be thought of as controlling the opening
    and closing of a physical gate. This gate permits electrons to flow through or blocks their passage by creating or
    eliminating a channel between the source and drain. Electrons flow from the source terminal towards the drain
    terminal if influenced by an applied voltage. The body simply refers to the bulk of the semiconductor in which the
    gate, source and drain lie. Usually the body terminal is connected to the highest or lowest voltage within the circuit,
    depending on type. The body terminal and the source terminal are sometimes connected together since the source is
    also sometimes connected to the highest or lowest voltage within the circuit, however there are several uses of FETs
    which do not have such a configuration, such as transmission gates and cascode circuits.

    FET operation
    The FET controls the flow of electrons (or
    electron holes) from the source to drain by
    affecting the size and shape of a "conductive
    channel" created and influenced by voltage (or
    lack of voltage) applied across the gate and
    source terminals (For ease of discussion, this
    assumes body and source are connected). This
    conductive channel is the "stream" through
    which electrons flow from source to drain.                  I–V characteristics and output plot of a JFET n-channel transistor.

    In an n-channel depletion-mode device, a
    negative gate-to-source voltage causes a depletion region to expand in width and encroach on the channel from the
    sides, narrowing the channel. If the depletion region expands to completely close the channel, the resistance of the
    channel from source to drain becomes large, and the FET is effectively turned off like a switch. Likewise a positive
    gate-to-source voltage increases the channel size and allows electrons to flow easily.
    Conversely, in an n-channel enhancement-mode device, a positive gate-to-source voltage is necessary to create a
    conductive channel, since one does not exist naturally within the transistor. The positive voltage attracts free-floating
    electrons within the body towards the gate, forming a conductive channel. But first, enough electrons must be
    attracted near the gate to counter the dopant ions added to the body of the FET; this forms a region free of mobile
    carriers called a depletion region, and the phenomenon is referred to as the threshold voltage of the FET. Further
    gate-to-source voltage increase will attract even more electrons towards the gate which are able to create a
    conductive channel from source to drain; this process is called inversion.
Transistor channel                                                                                                              82

    For either enhancement- or depletion-mode devices, at drain-to-source voltages much less than gate-to-source
    voltages, changing the gate voltage will alter the channel resistance, and drain current will be proportional to drain
    voltage (referenced to source voltage). In this mode the FET operates like a variable resistor and the FET is said to
    be operating in a linear mode or ohmic mode.[2] [3]
    If drain-to-source voltage is increased, this creates a significant asymmetrical change in the shape of the channel due
    to a gradient of voltage potential from source to drain. The shape of the inversion region becomes "pinched-off" near
    the drain end of the channel. If drain-to-source voltage is increased further, the pinch-off point of the channel begins
    to move away from the drain towards the source. The FET is said to be in saturation mode;[4] some authors refer to it
    as active mode, for a better analogy with bipolar transistor operating regions.[5] [6] The saturation mode, or the region
    between ohmic and saturation, is used when amplification is needed. The in-between region is sometimes considered
    to be part of the ohmic or linear region, even where drain current is not approximately linear with drain voltage.
    Even though the conductive channel formed by gate-to-source voltage no longer connects source to drain during
    saturation mode, carriers are not blocked from flowing. Considering again an n-channel device, a depletion region
    exists in the p-type body, surrounding the conductive channel and drain and source regions. The electrons which
    comprise the channel are free to move out of the channel through the depletion region if attracted to the drain by
    drain-to-source voltage. The depletion region is free of carriers and has a resistance similar to silicon. Any increase
    of the drain-to-source voltage will increase the distance from drain to the pinch-off point, increasing resistance due
    to the depletion region proportionally to the applied drain-to-source voltage. This proportional change causes the
    drain-to-source current to remain relatively fixed independent of changes to the drain-to-source voltage and quite
    unlike the linear mode operation. Thus in saturation mode, the FET behaves as a constant-current source rather than
    as a resistor and can be used most effectively as a voltage amplifier. In this case, the gate-to-source voltage
    determines the level of constant current through the channel.

    The FET can be constructed from a number of semiconductors, silicon being by far the most common. Most FETs
    are made with conventional bulk semiconductor processing techniques, using the single crystal semiconductor wafer
    as the active region, or channel.
    Among the more unusual body materials are amorphous silicon, polycrystalline silicon or other amorphous
    semiconductors in thin-film transistors or organic field effect transistors that are based on organic semiconductors
    and often apply organic gate insulators and electrodes.
Transistor channel                                                                                                                       83

    Types of field-effect transistors
    The channel of a FET is doped to produce
    either an N-type semiconductor or a P-type
    semiconductor. The drain and source may be
    doped of opposite type to the channel, in the
    case of depletion mode FETs, or doped of
    similar type to the channel as in enhancement
    mode FETs. Field-effect transistors are also
    distinguished by the method of insulation
    between channel and gate. Types of FETs

    • CNFET
    • The DEPFET is a FET formed in a
      fully-depleted substrate and acts as a
      sensor, amplifier and memory node at the
      same time. It can be used as an image
      (photon) sensor.
    • The DGMOSFET is a MOSFET with
      dual gates.
    • The DNAFET is a specialized FET that
      acts as a biosensor, by using a gate made
      of single-strand DNA molecules to detect
      matching DNA strands.
    • The FREDFET (Fast Reverse or Fast                 Depletion-type FETs under typical voltages. JFET, poly-silicon MOSFET,
                                                      double-gate MOSFET, metal-gate MOSFET, MESFET.  depletion ,  electrons ,
      Recovery Epitaxial Diode FET) is a
                                                        holes ,  metal ,  insulator . Top=source, bottom=drain, left=gate, right=bulk.
      specialized FET designed to provide a                        Voltages that lead to channel formation are not shown
      very fast recovery (turn-off) of the body
    • The HEMT (High Electron Mobility Transistor), also called an HFET (heterostructure FET), can be made using
      bandgap engineering in a ternary semiconductor such as AlGaAs. The fully depleted wide-band-gap material
      forms the isolation between gate and body.
    • The IGBT (Insulated-Gate Bipolar Transistor) is a device for power control. It has a structure akin to a MOSFET
      coupled with a bipolar-like main conduction channel. These are commonly used for the 200-3000 V
      drain-to-source voltage range of operation. Power MOSFETs are still the device of choice for drain-to-source
      voltages of 1 to 200 V.
    • The ISFET is an Ion-Sensitive Field Effect Transistor used to measure ion concentrations in a solution; when the
      ion concentration (such as H+, see pH electrode) changes, the current through the transistor will change
    • The JFET (Junction Field-Effect Transistor) uses a reverse biased p-n junction to separate the gate from the body.
    • The MESFET (Metal–Semiconductor Field-Effect Transistor) substitutes the p-n junction of the JFET with a
      Schottky barrier; used in GaAs and other III-V semiconductor materials.
    • The MODFET (Modulation-Doped Field Effect Transistor) uses a quantum well structure formed by graded
      doping of the active region.
    • The MOSFET (Metal–Oxide–Semiconductor Field-Effect Transistor) utilizes an insulator (typically SiO2)
      between the gate and the body.
    • The NOMFET is a Nanoparticle Organic Memory Field-Effect Transistor.[7]
Transistor channel                                                                                                                                84

    • The OFET is an Organic Field-Effect Transistor using an organic semiconductor in its channel.

    IGBTs see application in switching internal combustion engine ignition coils, where fast switching and voltage
    blocking capabilities are important.
    The most commonly used FET is the MOSFET. The CMOS (complementary-symmetry metal oxide semiconductor)
    process technology is the basis for modern digital integrated circuits. This process technology uses an arrangement
    where the (usually "enhancement-mode") p-channel MOSFET and n-channel MOSFET are connected in series such
    that when one is on, the other is off.
    The fragile insulating layer of the MOSFET between the gate and channel makes it vulnerable to electrostatic
    damage during handling. This is not usually a problem after the device has been installed in a properly designed
    In FETs electrons can flow in either direction through the channel when operated in the linear mode, and the naming
    convention of drain terminal and source terminal is somewhat arbitrary, as the devices are typically (but not always)
    built symmetrically from source to drain. This makes FETs suitable for switching analog signals between paths
    (multiplexing). With this concept, one can construct a solid-state mixing board, for example.

    [1] http:/ / www. computerhistory. org/ semiconductor/ timeline/ 1960-MOS. html
    [2] C Galup-Montoro & Schneider MC (2007). MOSFET modeling for circuit analysis and design. London/Singapore: World Scientific. pp. 83.
        ISBN 981-256-810-7.
    [3] Norbert R Malik (1995). Electronic circuits: analysis, simulation, and design. Englewood Cliffs, NJ: Prentice Hall. pp. 315–316.
        ISBN 0-02-374910-5.
    [4] RR Spencer & Ghausi MS (2001). Microelectronic circuits. Upper Saddle River NJ: Pearson Education/Prentice-Hall. pp. 102.
        ISBN 0-201-36183-3.
    [5] A. S. Sedra and K.C. Smith (2004). Microelectronic circuits (Fifth Edition ed.). New York: Oxford. pp. 552. ISBN 0-19-514251-9.
    [6] PR Gray, PJ Hurst, SH Lewis & RG Meyer (2001). Analysis and design of analog integrated circuits (Fourth Edition ed.). New York: Wiley.
        pp. §1.5.2 p. 45. ISBN 0-471-32168-0.
    [7] http:/ / www. sciencedaily. com/ releases/ 2010/ 01/ 100125122101. htm

    External links
    • PBS The Field Effect Transistor (
    • Junction Field Effect Transistor (
    • The Enhancement Mode MOSFET (
    • CMOS gate circuitry (
    • Winning the Battle Against Latchup in CMOS Analog Switches (
    • Nanotube FETs at IBM Research (
    • Field Effect Transistors in Theory and Practice (
    • The Field Effect Transistor as a Voltage Controlled Resistor (
Transmission line measurement                                                                                                  85

    Transmission line measurement
    Transmission line measurement or Transfer Length Measurement is a technique used in semiconductor physics
    and engineering to determine the contact resistance between a metal and a semiconductor. The technique involves
    making a series of metal-semiconductor contacts separated by various distances. Probes are applied to pairs of
    contacts, and the resistance between them is measured by applying a voltage across the contacts and measuring the
    resulting current. The current flows from the first probe, into the metal contact, across the metal-semiconductor
    junction, through the sheet of semiconductor, across the metal-semiconductor junction again (except this time in the
    other direction), into the second contact, and from there into the second probe and into the external circuit to be
    measured by an ammeter. The resistance measured is a linear combination (sum) of the contact resistance of the first
    contact, the contact resistance of the second contact, and the sheet resistance of the semiconductor in-between the
    If several such measurements are made between pairs of contacts that are separated by different distances, a plot of
    resistance versus contact separation can be obtained. If the contact separation is expressed in terms of the ratio L/W -
    where L and W are the length and width of the area between the contacts - such a plot should be linear, with the
    slope of the line being the sheet resistance. The intercept of the line with the y-axis, is two times the contact
    resistance. Thus the sheet resistance as well as the contact resistance can be determined from this technique.
Triethylgallium                                                                                                                                    86



                     CAS number                                                          [1]

                     PubChem                                                       [2]

                     ChemSpider                                                    [3]


                     Molecular formula                                     Ga(C2H5)3

                     Molar mass                                             156.9 g/mol

                     Appearance                                             clear colourless liquid

                     Melting point                                         −82.3 °C

                     Boiling point                                          143 °C


                     Main hazards                                           pyrophoric

                     Except where noted otherwise, data are given for materials in their standard state (at 25 °C, 100 kPa)

                                                                Infobox references

    Triethylgallium, Ga(C2H5)3, or TEGa, is a metalorganic source of gallium for metalorganic vapour phase epitaxy
    (MOVPE) of compound semiconductors.

    TEGa is a clear, colorless, pyrophoric liquid[4] and should be handled with caution.

    TEGa can be a useful alternative to trimethylgallium in the metalorganic vapour phase epitaxy of compound
    semiconductors because films grown using TEGa have been shown to have a lower carbon impurity concentration[5]

    [1]  http:/ / www. commonchemistry. org/ ChemicalDetail. aspx?ref=1115-99-7
    [2]  http:/ / pubchem. ncbi. nlm. nih. gov/ summary/ summary. cgi?cid=66198
    [3]  http:/ / www. chemspider. com/ 59583
    [4]  Shenaikhatkhate, D; Goyette, R; Dicarlojr, R; Dripps, G (2004). "Environment, health and safety issues for sources used in MOVPE growth
        of compound semiconductors". Journal of Crystal Growth 272: 816. doi:10.1016/j.jcrysgro.2004.09.007.
    [5] Saxler, A; Walker, D; Kung, P; Zhang, X; Razeghi, M; Solomon, J; Mitchel, W; Vydyanath, H (1997). "Comparison of trimethylgallium and
        triethylgallium for the growth of GaN". Applied Physics Letters 71: 3272. doi:10.1063/1.120310.
Trimethylgallium                                                                                                              87

                                 [[Image:Trimethylgallium-2D.png                                    Structural formula of

                         [[Image:Trimethylgallium-from-xtal-3D-balls.png                            Ball-and-stick model of


   CAS number                                                     [1]

   PubChem                                                 [2]

   ChemSpider                                              [3]


   Molecular formula                               Ga(CH3)3

   Molar mass                                       114.827 g/mol

    Appearance                                      clear colourless liquid

   Melting point                                   −15 °C

   Boiling point                                    55.7 °C


   Main hazards                                     pyrophoric
                                    (what is this?)   (verify)
    Except where noted otherwise, data are given for materials in their standard state (at 25 °C,
                                            100 kPa)

                                        Infobox references

    Trimethylgallium, Ga(CH3)3, often abbreviated to TMG or TMGa, is the preferred metalorganic source of gallium
    for metalorganic vapour phase epitaxy (MOVPE) of gallium-containing compound semiconductors, such as GaAs,
    GaN, GaP, GaSb, InGaAs, InGaN, AlGaInP, InGaP and AlInGaNP.

    TMG is a clear, colorless, pyrophoric liquid.[5] Even the hydrocarbon solutions of TMG, when sufficiently saturated,
    are known to catch fire on exposure to air. TMG is known to react violently with water and other compounds that are
    capable of providing labile and active hydrogen (i.e. protons). Therefore, TMG needs to be handled with care and
    caution, e.g. stored in a cool, dry place at 0-25 °C, under inert atmosphere, and ensuring that storage temperatures
    would not exceed 40 °C to avoid deterioration.
Trimethylgallium                                                                                                                                     88

    Trimethylgallium may be prepared by the reaction of dimethylzinc with gallium trichloride. The less volatile diethyl
    ether adduct can be prepared by using methylmagnesium iodide in ether in place of dimethylzinc; the ether ligands
    may be displaced with liquid ammonia as well.[6]

    The material is used in the production of LED lighting and semiconductors as a metalorganic chemical vapor
    deposition precursor.

    [1]    http:/ / www. commonchemistry. org/ ChemicalDetail. aspx?ref=1445-79-0
    [2]    http:/ / pubchem. ncbi. nlm. nih. gov/ summary/ summary. cgi?cid=15051
    [3]    http:/ / www. chemspider. com/ 14323
    [4]    http:/ / en. wikipedia. org/ wiki/ %3Atrimethylgallium?diff=cur& oldid=402698153
    [5]    Shenaikhatkhate, D; Goyette, R; Dicarlojr, R; Dripps, G (2004). "Environment, health and safety issues for sources used in MOVPE growth
          of compound semiconductors". Journal of Crystal Growth 272: 816. doi:10.1016/j.jcrysgro.2004.09.007.
    [6] C. A. Kraus; F. E. Toonder (1933). "Trimethyl gallium, Trimethyl gallium etherate and Trimethyl gallium ammine". PNAS 19 (3): 292–298.
        doi:10.1073/pnas.19.3.292. PMC 1085965.
Trimethylindium                                                                                                                  89

                                                           [[Image:Trimethylindium-2D.png                                   ]]

                                                    [[Image:Trimethylindium-from-xtal-3D-balls.png                          ]]


   CAS number                             [1]

   PubChem                      [2]

   ChemSpider                   [3]


   Molecular formula In(CH3)3

   Molar mass            159.93 g/mol

    Appearance           white crystalline

   Density               1.568 g/mL

   Melting point         88°C

   Boiling point         Decomposes explosively and uncontrollably beyond 101°C. DO NOT ATTEMPT TO BOIL MOLTEN TMI.


   Main hazards          pyrophoric
                                                        (what is this?)   (verify)
                   Except where noted otherwise, data are given for materials in their standard state (at 25 °C, 100 kPa)

                                                                  Infobox references

    Trimethylindium (abbr: TMI or TMIn), In(CH3)3, (CAS #: 3385-78-2) is the preferred metalorganic source of
    Indium for metalorganic vapour phase epitaxy (MOVPE) of indium-containing compound semiconductors, such as
    InP, InAs, InN, InSb, GaInAs, InGaN, AlGaInP, AlInP, AlInGaNP etc. TMI is a white, crystalline and sublimable
    solid, with melting point 88 °C. TMI is known to be pyrophoric, i.e. it ignites sponteneously upon contact with air;
    and its decomposition is often found to be uncontrollable as the temperature of its surrounding exceeds its melting
    point (i.e. > 88°C) and reaches 101 °C and above. TMI is also reported to exhibit autocatalytic behavior during its
    thermal decomposition.[5] Hence TMI needs to be handled with utmost care and caution, e.g. stored in preferably
    cool, dry place at 0-25°C, and operating temperatures not to exceed 50 °C to avoid deterioration. TMI is also known
    to react extremely violently with oxidizers and polyhalogenated compounds (such as CCl4 or CBrCl3) with which
    TMI is known to be incompatible. Hence the situations involving admixtures of TMI with oxidizers and
    polyhalogenated compounds must be avoided as potentially dangerous and explosive.
Trimethylindium                                                                                                                       90

    Semiconductor grade TMI
    The advancements in synthesis and purification chemistries have now made it possible to attain highest purity in
    TMI (99.9999% pure or greater), which is imperative for improved performance of semiconductor applications.
    Recent reports indicate some of the best electrical properties for InP alloys so far, by MOVPE using highest purity
    TMI available today, e.g. electron mobilities (Hall data) as high as 287,000 cm²/Vs at 77 K and 5400 cm²/Vs at 300
    K, and background carrier concentration as low as 6×1013 cm−3 [6] [7] , which were not practically achievable in the

    Accurate vapor pressure equation for TMI
    The vapor pressure equations reported in the literature for TMI have been found to offer overestimated vapor
    pressure of TMI, often by as much as 20–40%. Not knowing the accurate vapor pressure has thus been a concern to
    crystal growers. In a recent study [8] , it was expermentally confirmed that the vapor pressure equation, P
    (Torr)=10.98–3204/T (K) [9], provides the most accurate vapor pressures of TMI within a wide range of MOVPE
    growth conditions.

    [1]    http:/ / www. commonchemistry. org/ ChemicalDetail. aspx?ref=3385-78-2
    [2]    http:/ / pubchem. ncbi. nlm. nih. gov/ summary/ summary. cgi?cid=76919
    [3]    http:/ / www. chemspider. com/ 69370
    [4]    http:/ / en. wikipedia. org/ wiki/ %3Atrimethylindium?diff=cur& oldid=402698291
    [5]    Chemistry of Materials (2000); doi:10.1021/cm990497f
    [6]    Journal of Crystal Growth (2002); doi:10.1016/S0022-0248(02)01854-7
    [7]    Journal of Crystal Growth (2004); doi:10.1016/j.jcrysgro.2004.09.006
    [8]    Journal of Crystal Growth (2008); doi:10.1016/j.jcrysgro.2007.11.196
    [9]    http:/ / www. sciencedirect. com/ science?_ob=ArticleURL& _udi=B6TJ6-4R8NBK8-2& _user=208309& _coverDate=04%2F30%2F2008&
          _alid=722016709& _rdoc=1& _fmt=full& _orig=search& _cdi=5302& _sort=d& _docanchor=& view=c& _ct=242& _acct=C000014358&
          _version=1& _urlVersion=0& _userid=208309& md5=6bc13896c63296fb0ccfc09ae3fd666c'''log

    External links
    • Interesting research notes ( by
      Linus Pauling in re: Trimethylindium and its structure; Notebook # 19, Page 049, August 1955.
    • Interactive Vapor Pressure Chart for metalorganics (
Tunnel injection                                                                                                              91

    Tunnel injection
    Tunnel injection is the quantum tunneling effect, also called Fowler-Nordheim tunnel injection, when charge
    carriers are injected to an electric conductor through a thin layer of an electric insulator.
    It is used to program NAND flash memory. The process used for erasing is called tunnel release.
    An alternative to tunnel injection is the spin injection.

    Voltage reference
    A voltage reference is an electronic device that produces a fixed (constant) voltage irrespective of the loading on the
    device, power supply variations, temperature changes, and the passage of time. Voltage references are used in power
    supply voltage regulators, analog-to-digital converters and digital-to-analog converters, and myriad other
    measurement and control systems. Voltage references vary widely in performance; a regulator for a computer power
    supply may only hold its value to within a few per cent of the nominal value, whereas laboratory voltage standards
    have precisions and stability measure in parts per million.

    In metrology
    The earliest voltage references or standards were wet-chemical cells such as the Clark cell and Weston cell, which
    are still used in some laboratory and calibration applications.
    Laboratory-grade zener diode secondary solid-state voltage standards used in metrology can be constructed with a
    drift of about 1 part per million per year.[1]
    The value of the volt is now defined by the Josephson Effect to get a voltage to an accuracy of 1 parts per billion.
    The paper titled, "Possible new effects in superconductive tunnelling", was published by Brian David Josephson in
    1962 and earned Josephson the Nobel Prize in Physics in 1973.
    Formerly, mercury batteries were much used as convenient voltage references especially in portable instruments
    such as photographic light meters; mercury batteries had a very stable discharge voltage over their useful life.

    Solid state devices
    Any semiconductor diode has an exponential voltage /current characteristic that gives an effective "knee" voltage
    sometimes used as a voltage reference. This voltage ranges from 0.3 V for germanium diodes up to about 3 volts for
    certain light emitting diodes. These devices have a strong temperature dependence, which may make them useful for
    temperature measurement or for compensating bias in analog circuits.
    Zener diodes are also frequently used to provide a reference voltage of moderate stability and accuracy, useful for
    many electronic devices. An avalanche diode displays a similar stable voltage over a range of current.
    The most common voltage reference circuit used in integrated circuits is the bandgap voltage reference. A
    bandgap-based reference (commonly just called a 'bandgap') uses analog circuits to add a multiple of the voltage
    difference between two bipolar junctions biased at different current densities to the voltage developed across a diode.
    The diode voltage has a negative temperature coefficient (i.e. it decreases with increasing temperature), and the
    junction voltage difference has a positive temperature coefficient. When added in the proportion required to make
    these coefficients cancel out, the resultant constant value is a voltage equal to the bandgap voltage of the
    semiconductor. In silicon, this is approximately 1.25V. Buried zener references can provide even lower noise levels,
    but require higher operating voltages which are not available in many battery-operated devices.
Voltage reference                                                                                                                92

    Gas filled devices
    Gas filled tubes and neon lamps have also been used as voltage references, primarily in tube-based equipment, as the
    voltage needed to sustain the gas discharge is comparatively constant. For example, the popular RCA 991[2]
    "Voltage regulator tube" is a NE-16 neon lamp which fires at 87 volts and then holds 48–67 volts across the
    discharge path.

    [1] Manfred Kochsiek, Michael Gläser, Handbook of Metrology, Wiley-VCH, 2010 ISBN 3527406662 p. 289
    [2] RCA 991 Voltage Regulator tube data sheet (http:/ / www. mif. pg. gda. pl/ homepages/ frank/ sheets/ 049/ 9/ 991. pdf)

    External links
    • Understanding Voltage-Reference Topologies and Specifications (
    • The Design of Band-Gap Reference Circuits: Trials and Tribulations (
      Application/0,1570,24,00.html) — Robert Pease, National Semiconductor
    • LT Journal March 2009: How To Choose A Voltage Reference ( Brendan
      Whelan, Linear Technology Corporation
Article Sources and Contributors                                                                                                                                                                     93

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    Tetracube, That Guy, From That Show!, The Photon, The Thing That Should Not Be, The undertow, The way, the truth, and the light, The wub, Themintyman, ThereIsNoSteve, Thierryc, Thingg,
    Thinkingatoms, Tide rolls, Tim Starling, Tom harrison, Toytoy, Treesmill, Turn On My Mike, U.S.Vevek, Ubcule, Urhixidur, Utcursch, Valerychani, Viames, Visarute, Vrenator, WRK,
    Waveguy, Wavelength, Wgungfu, Wikipe-tan, Will Beback, Willking1979, Wjbeaty, Wstorr, Wtshymanski, Xchbla423, Yapete, Yermih, Zoicon5, Zundark, Александър, ‫ ,ملاع بوبحم‬තඹරු
    විජේසේකර, 635 anonymous edits

    Current injection technique  Source:  Contributors: Happyboy111, J04n, Keberster, Lonelydarksky, Passportguy, SMasters, Subverted, 3
    anonymous edits

    Airgap (microelectronics)  Source:  Contributors: Bumper12, Gene Nygaard, Henriok, Hughcharlesparker, J.delanoy, JaGa, Jyothymj,
    KBi, Rwwww, Squids and Chips, Undead warrior, Waggers, 4 anonymous edits

    Anomalous photovoltaic effect  Source:  Contributors: Amire80, Fschoenm, Hadarl, Martijn Hoekstra, R'n'B, Sbyrnes321, Sesshomaru,
    TettyNullus, Twirligig, Venny85, 3 anonymous edits

    Carbon nanofoam  Source:  Contributors: Andreirode, Antony-22, Bender235, Bryan Derksen, Casimir9999, Chrumps, CiaPan, DV8
    2XL, Heron, Hooperbloob, Ithilien144, Itub, Materialscientist, Nergaal, Omegatron, Plantsurfer, TrufflesTheLamb, Xyb, Yaser hassan 2006, 9 anonymous edits

    Weili Dai  Source:  Contributors: Andries, Bgwhite, CambridgeBayWeather, Dwilsonmrvl, Epbr123, Hmains, Hugo999, Jlin, Mattrix,
    ReggieCase, Sam8, Sj, Trialsanderrors, 6 anonymous edits

    Deathnium  Source:  Contributors: Bearcat, Jaraalbe, Xezbeth

    Die shrink  Source:  Contributors: Cristan, IByte, Ianno3, Idle.man5216, Longhair, LorenzoB, Meisterkoch, 16 anonymous edits

    Diffusion capacitance  Source:  Contributors: Brews ohare, Charles Matthews, Darklilac, Hooperbloob, Jim.henderson, Master Thief
    Garrett, Radagast83, Samw, San 013, 11 anonymous edits

    Electron mobility  Source:  Contributors: Alexwright, Ameyabapat, Andybuckle, Bamse, Beatnik8983, BirdValiant, Carlog3,
    CyborgTosser, DabMachine, Daniel0ng, DennisIsMe, Donarreiskoffer, Drown, Email4mobile, Ercolani, Fizicist, Gene Nygaard, HRyanjones, Hendrixrocks, Hudavendigar, Ileresolu, Immer in
    Bewegung, Ixfd64, JHunterJ, Jaganath, Jaraalbe, JustinWick, Jwortzel, Keenan Pepper, Kjkolb, MJavaheri, Materialscientist, Mattcain, Mild Bill Hiccup, Moxfyre, Naresh Kumar, Nathaniel,
    Nihiltres, Polaron, Quantyz, Raeky, Rettetast, Rich Farmbrough, Rjwilmsi, Robinh, Sbyrnes321, Sedigheh.mirzaei, SethTisue, Shaddack, Snafflekid, Steve Quinn, Su-no-G, T e r o, TStein,
    TenOfAllTrades, Underpants, Xenonice, 92 anonymous edits

    Equivalent oxide thickness  Source:  Contributors: Biscuittin, Hebrides, Kylealanbrown, 1 anonymous edits

    Etch pit density  Source:  Contributors: Akhristov, BorgQueen, Gene Nygaard, Jaraalbe, Jemiller226, MarsmanRom, Nick Number, 4
    anonymous edits

    EV Group  Source:  Contributors: Bearcat, Claritas, LisaKi, Refinnejann, 2 anonymous edits

    Floating body effect  Source:  Contributors: Amalas, BorgHunter, Hooperbloob, Jbradfor, Kocabas, Shaddack, Tijfo098, 5 anonymous

    Haynes–Shockley experiment  Source:  Contributors: Corrigann, CyrilB, Dicklyon, HousePhD, Mathieu Perrin, MegX, Michael Hardy,
    Tone, Woohookitty, 5 anonymous edits

    Hot carriers injection  Source:  Contributors: Armael, Bender2k14, Chris the speller, Dgies, DmitTrix, Dr. Submillimeter, Frap, Hellraiser
    manu, HolIgor, Jsgski, Mac, MartinC, Mat the w, Ocanomzella, Rapiant, Raymondwinn, Shaddack, The enemies of god, Toffile, Tomwoods, Xenondreams, 17 anonymous edits

    Impact ionization  Source:  Contributors: Astaroth5, BD2412, Beardo, Bennycw, Daisydaisy, Ghx0x7, Jaraalbe, Timichio, Tone, 6
    anonymous edits

    International Electron Devices Meeting  Source:  Contributors: CBurkeBtB, Chowbok, Graeme Bartlett, HenkvD, Hooperbloob,
    Iridescent, R'n'B, SDC, Thisisjims, 4 anonymous edits

    International Technology Roadmap for Semiconductors  Source:  Contributors: Bleepbloopbeep, Boemmels, Jaraalbe, Jbw2, Jcarroll,
    Ksyrie, LouScheffer, Myleneo, Nathan B. Kitchen, Ng.j, Rockfang, RoyBoy, Shenme, Tosaka1, 1 anonymous edits

    Isobutylgermane  Source:  Contributors: Axiosaurus, Beetstra, Benjah-bmm27, Bunnyhop11, Chem-awb, Chymista uno, Daviesje,
    Dshenai, Mancunion, Rich Farmbrough, Thunderbird2, Tiananmen 8888, TubularWorld, Vic williamson, ‫ 41 ,طبلا يلع نسح‬anonymous edits

    Isotropic etching  Source:  Contributors: BMcCJ, BernardKevin, Johnbod, Krash, Matt Britt, Michael Hardy, Rmhermen, Smack,
    Woohookitty, 3 anonymous edits

    Johnson's Figure of Merit  Source:  Contributors: De728631, Hudavendigar

    Junction temperature  Source:  Contributors: Bearcat, Electron9, Jerrykhor, Jrwandann, Razvan784,, Xezbeth, Zondi, 6
    anonymous edits

    Low level injection  Source:  Contributors: Bearcat, Biscuittin, Joecampa13, Katharineamy, Postdlf, 1 anonymous edits
Article Sources and Contributors                                                                                                                                                                 94

    Luttinger parameter  Source:  Contributors: Closedmouth, Dalpoin, Headbomb, Materialscientist, Per Ardua, Shenanegins, 2 anonymous

    Metalorganics  Source:  Contributors: Albmont, Beetstra, Chymista uno, Discospinster, Dshenai, Mancunion, Neparis, Sapphic,
    Smokefoot, Spellmaster, Veritas 501, 4 anonymous edits

    Moisture Sensitivity Level  Source:  Contributors: Ahzahraee, Bwpach, Everyking, Jevav, Leon7, Mailer diablo, Share Bear, 14
    anonymous edits

    Negative luminescence  Source:  Contributors: 2over0, BorgQueen, DanMS, Dicklyon, Jaraalbe, Keenan Pepper, Omegatron,
    VinculumMan, 3 anonymous edits

    On-die termination  Source:  Contributors: Bobke, Dukebuckhorn, Evanhan1, Fabrictramp, GoingBatty, Isolde98, Jpmonroe, LKJ824,
    Mild Bill Hiccup, Underpants, Weedwhacker128, 6 anonymous edits

    Overdrive voltage  Source:  Contributors: Bwpach, ComtriS, Hooperbloob, MBisanz, RJFJR, Salient Edge, Thewsma13, 7 anonymous

    Photo-Dember  Source:  Contributors: DmitTrix, Enriquecastro, Headbomb, JaGa, M-le-mot-dit, Materialscientist, Misarxist, Mitch Ames,
    Omnipaedista, Shaddack, 1 anonymous edits

    Photoelectrochemical processes  Source:  Contributors: Auntof6, CommonsDelinker, Escape Orbit, Hezimmerman, Icairns, Marek69,
    Materialscientist, Melesse, Neelix, Nimblecymbal, Paine Ellsworth, Rich Farmbrough, Rod57, Rogermw, Steve Quinn, 15 anonymous edits

    Proximity communication  Source:  Contributors: A5b, GoingBatty, Raysonho, Warrior4321, 2 anonymous edits

    Random logic  Source:  Contributors: Bearcat, Euchiasmus, Margin1522

    Reliability (semiconductor)  Source:  Contributors: Abc eagle, Daniel dulay, David Haslam, Glloq, J04n, Jujutacular, LilHelpa,
    Malinaccier, Mortense, Triplestop, Tripodian, Wmwmurray, Woohookitty, Wosch21149, 4 anonymous edits

    Reverse leakage current  Source:  Contributors: Amalas, Dantzig, Ephraim33, Giajubo, Goldenrowley, Jaraalbe, Jp347, Linuxbeak, Mild
    Bill Hiccup, Toffile, Zen611, 8 anonymous edits

    Roll-to-roll processing  Source:  Contributors: BennettB, CKlunck, Chaiken, Dgrant, Fratrep, GianniG46, Grutness, Hooperbloob,
    Hughcharlesparker, Jfraser, Mac, Nopetro, Run!, Shawn in Montreal, SimonP, Sipix, Stone, Tad Lincoln, UkPaolo, Wizard191, 16 anonymous edits

    Semiconductor device  Source:  Contributors: Ahoerstemeier, Ale2006, Ancheta Wis, Andrewpmk, Atlant, Biscuittin, Breno, CanisRufus,
    CaptainCat, Ceyockey, Chrisbolt, Christofurio, Cigale, Computerhistory, CyrilB, David Carron, David Haslam, DerHexer, Dicklyon, Discospinster, E.R.UT, Editor at Large, Edward Z. Yang,
    Egil, EnOreg, Evangium, Falcon Kirtaran, Fiskbil, Fizicist, Fourohfour, FunnyMan3595, Gene Nygaard, Glenn, Grebaldar, Hang Li Po, HenryLi, Heron, Hooperbloob, Jnnnnn, Kjkolb, Knutux,
    Light current, Lindosland, MER-C, Magasjukur, Mako098765, Masgatotkaca, Matt Britt, Maury Markowitz, Mav, Michael Hardy, Mindmatrix, Morristanenbaum, Nabla, Naomechateies,
    NerdyScienceDude, Paultz, Pfalstad, Philewar, Physman, Prgo, RTC, Ragesoss, RedWolf, Reyk, Rich Farmbrough, Rjwilmsi, Rmalloy, Rod57, SDC, Satish.murthy, Searchme, Shadowjams,
    Skakkle, Snafflekid, SpiderJon, Ste4k, Stefan Heinzmann, Tabletop, Tarquin, That Guy, From That Show!, The Anome, The Photon, Thingg, Tim Starling, TutterMouse, Twilight Realm,
    Vegaswikian, Vsmith, Wakudrle, Wereon, Wgungfu, WillMak050389, Wjbeaty, Wrightbus, Wtshymanski, Youssefsan, 115 anonymous edits

    Sheet resistance  Source:  Contributors: 12 Noon, Afluegel, Arch dude, Arctic-Editor, Art Carlson, Baja1, Clankypup, Daisydaisy, Darth
    Panda, Droidus, Filipporso, Gene Nygaard, HHahn, Iridescent, J04n, Jeddelta, Karol Langner, Kevin x1000, Lindvaln, MichaelFrey, NgVietNguyen, Pearle, RJFJR, Richardpa, Sbyrnes321,
    Schoen, Snags, Supasheep, Virrid, 24 anonymous edits

    Solid state (electronics)  Source:  Contributors: Airplaneman, Alan Liefting, Aldis90, Amalas, Axrtest, BilCat, BorgQueen, Chetvorno,
    Cogiati, DaleDe, Dandv, Darth Panda, Edcolins, Ehabkost, Gmaxwell, Heracles31, JRaspass, Kozuch, Ligulem, LuckyLouie, Mac, Mecha19, Michael Hardy, Mike Payne, Oli Filth, Petri Krohn,
    Peyre, Piano non troppo, Silhuete, Spinningspark, Stephenchou0722, Uncle G, Versus22, Vsmith, WaysToEscape, Wdwd, Wrexham25, 76 anonymous edits

    STEC, Inc.  Source:  Contributors: Ahoerstemeier, Ajabbari, AndrewHowse, Ausernamenobodyhas, Azandieh, Bedient, C. Foultz, Caiaffa,
    Csm2124, D.i.l., DGG, Gmatsuda, Guswen, JeffreyN, Jesus5555, Jim salehi, Jinxynix, Karebear 1022, Lahnfeear, Little Mountain 5, Music Sorter, NapoliRoma, Pnm, R'n'B, RoyBoy, Squids and
    Chips, Steaksandwich, Superp, Tintenfischlein, Uucp, 146 anonymous edits

    Strain engineering  Source:  Contributors: Cacolantern, CosineKitty, Irene Ringworm, Matthieu.berthome, Rjwilmsi, 6 anonymous edits

    Thermal copper pillar bump  Source:  Contributors: Alan Liefting, Kvongunten, Lightmouse, PotentialDanger, Reinderien, Rich
    Farmbrough, Twirligig, Wasell, 4 anonymous edits

    Thin-film transistor  Source:  Contributors: Altenmann, Amalas, Bemoeial, Biasoli, Biblbroks, Borgx, Cburnett, Choihei, Chris the
    speller, Cxw, DJ LoPaTa, DerekMorr, Dgrant, Dicklyon, Donarreiskoffer, Dspark76, Dtcdthingy, Electron9, Evatutin, Fireice, Foobaz, Galaksiafervojo, Glenn, Golbez, GregorB, Hooperbloob,
    Icemaja, Jauerback, Jpgordon, Jurlinga, Jw21, Kaare, KathrynLybarger, MER-C, MaGioZal, Mairi, Mako098765, Metasquares, Mr.BrYcE, Nile, Omegatron, Panjasan, Pardy, Parhamr, Petteri
    Aimonen, Pfortuny, ProperFraction, Qdr, Quadratic, Qutezuce, Randwick, Rich Farmbrough, Rogerbrent, Shaddack, Sjschen, Snafflekid, Toffile, Tschwenn, Twirligig, UmbraNecat, Unyoyega,
    VegaDark, Vegaswikian, Woohookitty, Workaphobia, Yourprash, Лев Дубовой, 102 anonymous edits

    Transistor channel  Source:  Contributors:,, Adam1213, Alphax, Altenmann, Amrik, Antikon, Antonen,
    ArglebargleIV, Arnero, Atlant, Audriusa, Ax716, Bakkster Man, Bantman, Bissinger, Blake, Bobblewik, Borgx, Brews ohare, Can't sleep, clown will eat me, Cantus, Cesarious, Cikicdragan,
    ClamDip, Clawed, Clemwang, Coldcuts, Colin Marquardt, Conversion script, CyrilB, DJ LoPaTa, Daniel Case, Dead3y3, Deelkar, Dexter73, Dgrant, Dicentra, Dicklyon, Donarreiskoffer,
    Dravecky, Duk, EdH, Epbr123, Er Komandante, Ewlyahoocom, Fixentries, GianniG46, Gimboid13, Glengarry, Glenn, Graham87, Happysailor, Heron, Hhcox, Hooperbloob, Hu12, Hugozair, Ian
    Burnet, Inbamkumar86, Iranway, Isnow, J.delanoy, Jaan513, Jakohn, Jaraalbe, Joeythehobo, Johnlogic, Joriki, Kaeslin, Kjkolb, Light current, Lindosland, Lissajous, Lommer, MJ94,
    Mako098765, Materialscientist, Matt Britt, Matthew Yeager, MatthewJHerbert, Menswear, Michael Hardy, Moink, MrSnoot, Mudlock, Nedim Ardoğa, Nigholith, Nikai, Nsaa, Nunh-huh,
    Ohnoitsjamie, Omegatron, Ozuma, Patrickwilkerson, Phirosiberia, Pierebean, Pinar, Pinktulip, Pjacobi, Qdr, Rememberlands, Rmalloy, Rob Hooft, Robert Bond, Rogerbrent, Sadads,
    SallyForth123, Sandos, Shaddack, Shell Kinney, Shinkolobwe, Sillydragon, Simson, Smiling man, Snafflekid, Steven Zhang, Stevenj, Stw, Supaari, Tboschman, TedPavlic, The Original
    Wildbear, Thisara.d.m, Tim Starling, Timl2k4, Transisto, Tvaughn05, Wal1964, Wiki alf, Wjbeaty, Yibo0121, Yves-Laurent, ^musaz, 171 anonymous edits

    Transmission line measurement  Source:  Contributors: Catapult, Chaiken, Chris the speller, Darkside2010, Dual Freq, Gene Nygaard,
    Isaac Rabinovitch, Jovianeye, Laurascudder, Smit, Soir, Squids and Chips, Stewartadcock, TracyRenee, Wtshymanski, 4 anonymous edits

    Triethylgallium  Source:  Contributors: Samueltc4

    Trimethylgallium  Source:  Contributors: Ashlandchemist, Axiosaurus, BENCH 420, Beetstra, Benjah-bmm27, Bhamel712, BlueEarth,
    CQui, Chem-awb, Ephemeronium, Gene Nygaard, IBFIBF, Mancunion, Rifleman 82, Rjwilmsi, Samueltc4, 6 anonymous edits

    Trimethylindium  Source:  Contributors: Axiosaurus, Beetstra, Benjah-bmm27, Bhamel712, Captain panda, Chem-awb, Chymista uno,
    Elonka, Jaraalbe, Mancunion, Rifleman 82, Samueltc4, Stone, Tetracube, Veinor, 8 anonymous edits

    Tunnel injection  Source:  Contributors: ArnoldReinhold, Damian Yerrick, Dgies, KDerbyshire, Rich Farmbrough, Shaddack, Shire
    Reeve, 1 anonymous edits

    Voltage reference  Source:  Contributors: Alan Liefting, Caknuck, Catfunk971, Cmacd123, Drpickem, Evand, Gfutia, Hankwang,
    Hooperbloob, Jp314159, K0stas infinity, Mahira75249, Oli Filth, Philpem, QEDquid, Rohitbd, Semi literate, Semiwiki, TedPavlic, Thedatastream, Wdwd, Wtshymanski, 22 anonymous edits
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    File:HAtomOrbitals.png  Source:  License: GNU Free Documentation License  Contributors: Admrboltz, Benjah-bmm27,
    Dbc334, Dbenbenn, Ejdzej, Falcorian, Kborland, MichaelDiederich, Mion, Saperaud, 6 anonymous edits
    File:CovalentBond.png  Source:  License: Public Domain  Contributors: Smokefoot
    File:Bändermodell-Potentialtöpfe-Mg.svg  Source:ändermodell-Potentialtöpfe-Mg.svg  License: GNU Free Documentation License
     Contributors: USer:Cepheiden
    File:Ressauts et terrasses.png  Source:  License: GNU Free Documentation License  Contributors: User:Jean-Jacques
    File:Si-band-schematics.PNG  Source:  License: Creative Commons Attribution-Sharealike 2.5  Contributors: Pieter
    Kuiper, S-kei, 1 anonymous edits
    File:Electronic_band_diagram.svg  Source:  License: unknown  Contributors: Original uploader was The Photon at
    en.wikipedia. Later version(s) were uploaded by Lasindi at en.wikipedia.
    File:Wave packet (no dispersion).gif  Source:  License: Public Domain  Contributors: Bapho, Cdang, Fffred,
    Kersti Nebelsiek, Pieter Kuiper
    File:Diffusion rayleigh et diffraction.png  Source:  License: GNU Free Documentation License
     Contributors: user:cdang
    File:Semiconduttore intrinseco.png  Source:  License: GNU Free Documentation License  Contributors: Pieter
    Kuiper, The Doc
    File:FD e mu.jpg  Source:  License: Public Domain  Contributors: Maksim, Pieter Kuiper, 1 anonymous edits
    File:PN band.gif  Source:  License: Creative Commons Attribution-Sharealike 3.0  Contributors: Saumitra R Mehrotra & Gerhard
    File:Hall Effect Measurement Setup for Holes.png  Source:  License: Public Domain
     Contributors: Gnefgnoix
    File:Hall Effect Measurement Setup for Electrons.png  Source:  License: Public Domain
     Contributors: Gnefgnoix
    File:Impact ionization schematic.svg  Source:  License: GNU Free Documentation License  Contributors:
    User:Jaraalbe, User:Timichio
    File:Yes check.svg  Source:  License: Public Domain  Contributors: User:Gmaxwell, User:WarX
    Image:PDanim.gif  Source:  License: Creative Commons Attribution-Sharealike 3.0  Contributors: User:Enriquecastro
    Image:Military laser experiment.jpg  Source:  License: unknown  Contributors: Andrew Hampe, Bapho, Darz
    Mol, Glenn, Mattes, Mhby87, Origamiemensch, Tony Wills, 8 anonymous edits
    Image:Energylevels.png  Source:  License: GNU Free Documentation License  Contributors: Rozzychan
    File:Bipolar Junction Transistor NPN Structure.svg  Source:  License: Creative Commons
    Attribution-Sharealike 3.0  Contributors: Uploaded by User MovGP0. Vectorized by Magasjukur2
    Image:Replica-of-first-transistor.jpg  Source:  License: Public Domain  Contributors: Daderot, Glenn, Hdelacy,
    Mnd, Nagy, Para, Ragesoss, Topory, WikipediaMaster, 3 anonymous edits
    Image:Carbon-film Resistor Construction.svg  Source:  License: Public Domain  Contributors: jjbeard
    Image:sheet resistance.jpg  Source:  License: Public Domain  Contributors: Devon Fyson, Kevin x1000
    Image:STEC Wikipedia Logo.jpg  Source:  License: Creative Commons Attribution-Sharealike 3.0  Contributors:
    Image:Green Arrow Up.svg  Source:  License: Public Domain  Contributors: AutisticPsycho2, Dbenbenn, Juiced lemon,
    Korg, Multichill, Pagrashtak, Redrose64, Trisreed, ZeroOne, 16 anonymous edits
    Image:thermal-bump-substrate.png  Source:  License: GNU Free Documentation License  Contributors: Nextreme
    Thermal Solutions
    Image:intel-presler-copper-pillar-bump.png  Source:  License: GNU Free Documentation License
     Contributors: Nextreme Thermal Solutions
    Image:cross-section-thermal-bump.png  Source:  License: GNU Free Documentation License  Contributors:
    Nextreme Thermal Solutions
    Image:cpb-thermal-bump.png  Source:  License: unknown  Contributors: Nextreme Thermal Solutions
    Image:thermal-bump-thermal-flow.png  Source:  License: GNU Free Documentation License  Contributors:
    Nextreme Thermal Solutions
    File:Thin-film_transistor_variants_EN.svg  Source:  License: GNU Free Documentation License
     Contributors: User:Cepheiden
    File:Color TFT-LCD Layout.png  Source:  License: Public Domain  Contributors: Lozère, WikipediaMaster,
    Yellowcard, 1 anonymous edits
    Image:P45N02LD.jpg  Source:  License: GNU Free Documentation License  Contributors: User:Audriusa
    Image:Lateral mosfet.svg  Source:  License: Creative Commons Attribution-Sharealike 2.5  Contributors: Cepheiden, CyrilB,
    Image:JFET n-channel en.svg  Source:  License: GNU Free Documentation License  Contributors: User:Phirosiberia
    Image:FET comparison.png  Source:  License: Public Domain  Contributors: Arnero, Glenn, Omegatron
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