DSP (digital signal processor) is a unique microprocessor based digital signal processing large amounts of information in the device. Its working principle is to receive analog signals, convert the digital signal 0 or 1. The digital signal and then modify, delete, strengthen, and in other systems chip interprets the digital data back to analog format data or the physical environment. It is not only programmable, but in fact, speed up when tens of million complex instructions per second procedure, far more than general-purpose microprocessors, digital electronics is increasingly important world of computer chips. It is a powerful data processing capability and high speed, the two most remarkable features.
Digital Signal Processing (in 2700 seconds) John Carwardine and Frank Lenkszus Advanced Photon Source Digital Signal Processing in 2700 seconds Some Applications of Digital Signal Processing Consumer Applications Accelerator Applications • Communications • BPM Processing – Digital cellular phones • Feedback control – Echo cancellation – orbit control • Data compression – multi-bunch feedback – HDTV • RF applications – MP3 digital audio – direct digital down-conversion • Video games – digital I/Q sampling • Automobiles • Accelerator tuning – Engine management – spectral estimation – Adaptive suspension • High precision power supplies Digital Signal Processing in 2700 seconds Overview • DSP Essentials • Filtering BPM data • Direct digital down-conversion • Optimal & Adaptive Filters • DSP Hardware Digital Signal Processing in 2700 seconds “Black Box” View Signal Processor Analog Analog ADC DSP DAC Filter Filter Digital Signal Processing in 2700 seconds Key DSP Operations • Filtering • Transformation into another domain • Modulation and demodulation • Correlation of two signals • Signal generation, frequency synthesis D/A Processor Converter Digital Signal Processing in 2700 seconds Discrete-Time vs Continuous-Time • Continuous-time signals are functions of a continuous-valued independent variable t, and they exist at all values of t. xa(t) t 0 • Discrete-time signals are functions of an integer-valued index (eg n, m, k), and the signals have no meaning for non-integer values of the independent variable. x[-3] x 2 3 4 x[n] n -4 -3 -2 -1 0 1 Digital Signal Processing in 2700 seconds Ambiguity of Sampled-Data Signals • Which continuous-time signal does this discrete-time sequence represent? • Knowing the sampling rate, is not enough to uniquely reconstruct a continuous-time signal from a discrete-time sequence. • The uncertainty is a result of aliasing. Digital Signal Processing in 2700 seconds Aliasing of Tones • Single Frequency Tones greater than fs/2 appear as aliases. • Consider the following spectrum that is sampled at 1600Hz. 1100 Hz 1800 Hz 200 Hz 500 Hz fs fs 3 fs 2 fs 2 2 3200 Hz 800 Hz 1600 Hz Digital Signal Processing in 2700 seconds How to Avoid Aliasing • Digitize the analog signal at least 2x the highest frequency component (Shannon’s Sampling Theory). • Use analog anti-aliasing filter to get rid of high frequency components before the digitizer. • Realize there will always be aliasing to some degree, the question is how much can be tolerated... Digital Signal Processing in 2700 seconds APS Turn-by-Turn Beam Position Monitors • 360 beam position monitors in each plane. • BPMs are digitized every 7.4µS • Data is averaged to get rid of high frequency noise so it can be used for orbit control – RT orbit feedback, running at 1.6KHz – Orbit Correction, running at 0.5Hz Digital Signal Processing in 2700 seconds BPM Memory Scanner • Boxcar averaging is used to lowpass filter turn-by-turn data for the orbit correction systems. 2048 slow orbit 135KHz point correction 0.5Hz averager BPM 32 real time point feedback 1.6KHz averager system Digital Signal Processing in 2700 seconds Averager Block Diagram (DSP Viewpoint) x[n-1] x[n-2] x[n-3] 1-sample 1-sample 1-sample x[n] delay delay delay Σ 1/4 y[n] • This can be described with the following difference equation y[n ] = 0.25 ⋅ ( x[n ] + x[n − 1] + x[n − 2] + x[n − 3]) • Or with the following z-transform transfer function Y ( z) 1 H lp ( z ) = = (1 + z −1 + z − 2 + z −3 ) X ( z) 4 Digital Signal Processing in 2700 seconds Averagers with Different Number of Points 0 -5 Attenuation (dB) -10 -15 -20 4-point -25 16-point 32-point -30 -3 -2 -1 0 10 10 10 10 Normalized Frequency Digital Signal Processing in 2700 seconds 32-Tap Averager vs 32-Tap FIR Filter • A boxcar averager is simple to implement, but does not provide the optimum level of filtering Averager Coefficients 0 Attenuation (dB) -10 -20 -30 FIR Filter Coefficients -40 Averager -50 FIR Filter -3 -2 -1 0 10 10 10 10 Normalized Frequency Digital Signal Processing in 2700 seconds Ideal Frequency-Selective Digital Filters • An ideal frequency-selective lowpass filter has a passband with constant magnitude, an infinitely sharp transition between passband and stopband, and infinite attenuation in the stopband. The phase delay is zero for all frequencies. A(f) 1 passband stopband f 0 Fc 0.5Fs Fs-Fc Fs • The impulse response (coefficient weights) of this ideal filter follow a doubly-infinite sin(x)/x function n 0 Digital Signal Processing in 2700 seconds Radio Frequency Applications of DSP • Two particular methods of sampling RF signals are gaining attention because of the advent of high-speed A/D converters. • Both are associated with sampling band-limited signals that ride on a high- frequency carrier, eg – sampling RF probes for cavity field control. – accelerator tune measurement. • Direct digital down-conversion (software radio) – eliminates the need for a conventional analog RF mixer. • Digital I/Q sampling – eliminates difficulties associated with detecting in-phase and quadrature components of an RF signal. Digital Signal Processing in 2700 seconds Sampling Band-limited Signals • Consider a 2MHz band-limited signal riding on an 8MHz carrier. f (MHz) -9 -7 0 7 9 • The IF could be extracted by mixing with a local oscillator at 10MHz and sampled at 6MHz, or could be directly sampled at > 18MHz. 1-3MHz I.F. Signal Input (7-9MHz) A/D Fs > 6MHz Local oscillator (10MHz) Digital Signal Processing in 2700 seconds Bandpass Sampling Example • Instead, let’s directly sample the signal at only 10M samples/second. Image Original spectrum spectrum f (MHz) -10 -5 0 1 3 5 7 9 10 (Fs/2) (Fs) • In this case the Nyquist frequency would be 5MHz, and the original spectrum is in the range of Fs/2 to Fs, instead of the range DC-Fs/2 (as we are used to seeing). • The original spectrum is aliased into the lower half of the frequency band, reflected about the Nyquist rate of 5MHz, appearing in the frequency range 3Mhz - 1MHz. • So, we have successfully sampled the signal using a sampling rate almost half the ‘officially’ required rate Digital Signal Processing in 2700 seconds Bandpass Sampling Example (cont) • What if we sample at only 6.5M samples/second?? Image Original spectra spectrum 0.5 2.5 4 6 f (MHz) 3.25 6.5 9.75 (Fs/2) (Fs) • This time the original spectrum lies between Fs and 1.5Fs. • Here, the spectrum is reflected about the sampling rate, to appear in the range from Fs/2 to Fs, spanning 6MHz - 4MHz. • It is then reflected a second time about Fs/2, finally appearing in the lower half of the sampled frequency range between 0.5MHz and 2.5MHz. Can we sample at an even lower rate and still get a unique spectrum?? Digital Signal Processing in 2700 seconds General Case of Bandpass Sampling • In general, it can be shown that if there are m image spectra between the original and its negative image, the range of possible sampling frequencies is given by the expression 2 fc − B 2 fc + B ≥ fs ≥ m m +1 • Example with m = 5 2fc+B 2fc-B f -3fs -fc -2fs -fs 0 fs 2fs fc 3fs Digital Signal Processing in 2700 seconds Analog I/Q Detector Baseband Signal Input A/D I (476MHz) sin Baseband Local oscillator 0o (476MHz) A/D Q -90o cos • Issues: DC offsets in mixer, quadrature phase errors, impedance matching, ... Digital Signal Processing in 2700 seconds Quadrature Sampling with Digital Mixing • Digital technology now offers a completely digital approach to this problem. I 4.9MHz Digital I.F. sin(wn) lowpass Signal Input (476MHz) A/D 19.6MHz Q Local oscillator (471.1MHz) Digital cos(wn) lowpass • The continuous-time signal is sampled at exactly 4 times the IF frequency. • Digital sine and cosine signals are multiplied with the incoming discrete- time sequence to generate the real and imaginary part of the signal. Digital Signal Processing in 2700 seconds Optimal and Adaptive Filters • Consider a situation where a signal x[n] is to be filtered so that the output sequence is as close as possible to a desired signal d[n] d[n] e[ n] = d [ n] − ∑ f [k ] ⋅ x[n − k ] + y[n] k x[n] f[n] Σ e[n] - • If the statistics of the input process are known and stationary, the optimum filter coefficients can be determined using a set of Normal Equations. • If we don’t know the statistics exactly (or if they are time-varying), we need an adaptive filter d(n) + y(n) x(n) f(n) Σ e(n) - Digital Signal Processing in 2700 seconds Applications of Optimal Filters • System identification - generate linear model of unknown system d[n] g[n]=? x[n] + y[n] f[n] Σ e[n] - • Linear prediction - estimate the future value of a signal x[n] + x[n] x[n-n o] f[n] Σ e[n] - Digital Signal Processing in 2700 seconds Adaptive Filter Application Examples • Adaptive echo cancellation + Σ delay - Adaptive Hybrid Adaptive Filter Hybrid Filter - delay Σ + • Adaptive line enhancement (detect small periodic signals buried in noise) + Σ e[n] x[n] - Adaptive z-m y[n] Filter Digital Signal Processing in 2700 seconds DSP Processors • DSP processors are optimized for Multiply/Accumulate (MAC) operations. • Multiple data/program busses inside the chip allow simultaneous access to program and data memory (Harvard Architecture). • Modern DSP chips can implement up to 8 instructions in a single clock cycle. Program Address Bus Data Address Bus Processor Processor Program Data Unit Unit Memory Memory Program Bus Data Bus Digital Signal Processing in 2700 seconds DSP Processor Performance • Digital Signal Processor chips are amazingly fast! – TI C67 ($200): 32-bit floating-point, 1GFLOP – ADI SHARC ($60): 32-bit floating-point, 150MFLOP 1024 Point Complex Radix 2 FFT with bit reversal Speed Processor (usec) ADI TigerSHARC @ 150MHz 69 TI C67 @ 167MHz 124 TI C40 @ 50 MHz 1435 Power PC 604e @ 333 MHz 230 Intel Pentium @ 200 MHz 750 Vax 8600 21700 Other DSP operations (Based on TI C67 @ 167 MHz) Speed Operation (usec) 8 Cascaded Biquad filters 0.366 Matrix-Vector Multiply 38x160 * 160x1 41.2 Autocorrelation, 18 x 8 0.606 Digital Signal Processing in 2700 seconds DSP Performance • BUT! – To achieve the benchmark performance: • Algorithm must run in a tight loop • Processor pipeline must be kept full • Code for Algorithm must fit in on chip cache • Data arrays must be within on chip cache • Parallel execution must be maximized – Scatter/Gather operations will suffer performance degradation. Digital Signal Processing in 2700 seconds Effort Required to Achieve A/D Performance 6 8 10 Effective Number of Bits Relatively Easy s) 12 pec eS nc 14 orma Perf 16 DC Specialized (A 18 Knowledge lt fficu 20 Di Difficult to 22 Impossible 24 26 1 10 100 1K 10K 100K 1M 10M 100M 1G Sample Rate (Hz) Ref: “Practical Limits of Analog-to-Digital Conversion” (Jerry Horn) Digital Signal Processing in 2700 seconds Conclusions • Applications for digital signal processing are exploding, largely fueled by the availability of inexpensive high performance processors. • There are certain applications where digital is clearly better than analog. • The accelerator community is starting to tap the capabilities of DSP technology, but this is just the beginning... Digital Signal Processing in 2700 seconds
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