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5. Programmable Logic Devices

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					 Hong Kong Institute of Vocational Education
 Electrical and Electronic Engineering Discipline     Digital Electronics




                            7. Programmable Logic Devices
Tocci Chapter 11 (Memory Devices)
      Read section 11-10
      Review questions of section 11-10
      Chapter 12 (Applications of a PLD)
      Read section 12-1 to 12-3

Assignment 3




                                                                 PLD1 / page 1
 Hong Kong Institute of Vocational Education
 Electrical and Electronic Engineering Discipline                        Digital Electronics




                            Programmable Logic Device

 What is a Programmable Logic Device (PLD)?

            an IC that contains large numbers of gates, flip-flops and registers
             that are interconnected on the chip

            can be configured by the user to perform a logic function

            many of the connections are fusible links that can be broken




                                                                                    PLD1 / page 2
 Hong Kong Institute of Vocational Education
 Electrical and Electronic Engineering Discipline                     Digital Electronics




                            Programmable Logic Device
 Problems of using standard ICs in logic design:
            require hundreds or thousands of these ICs

            require a considerable amount of circuit board space

            require a great deal of time and cost in inserting, soldering,
             and testing

            require to keep a significant inventory of ICs

                                                                                 PLD1 / page 3
 Hong Kong Institute of Vocational Education
 Electrical and Electronic Engineering Discipline                        Digital Electronics




                            Advantages of using PLDs
 Advantages of reducing the no. of ICs using PLD:

            less board space
            fewer printed circuit boards
            smaller enclosures
            lower power requirements (i.e., smaller power supplies)
            faster and less costly assembly processes
            higher reliability (fewer ICs and circuit connections => easier
             troubleshooting)
            availability of design software


                                                                                    PLD1 / page 4
  Hong Kong Institute of Vocational Education
  Electrical and Electronic Engineering Discipline                               Digital Electronics




                             Programmable Logic Device
 Basic Ideas of PLD
    A PLD consists of an array of AND gates and an array of OR gates

             Each input feeds both a non-inverting buffer and an inverting buffer to
              produce the true and inverted forms of each variable. (i.e. the input lines
              to the AND-gate array)

             The AND outputs are called the product lines

             Each product line is connected to one of the inputs of each OR gate

             Three fundamental types of standard PLDs: PROM, PAL, and PLA

                                                                                            PLD1 / page 5
Hong Kong Institute of Vocational Education
Electrical and Electronic Engineering Discipline        Digital Electronics




                           Internal Structures of PLD




                                                                   PLD1 / page 6
Hong Kong Institute of Vocational Education
Electrical and Electronic Engineering Discipline         Digital Electronics




                           Internal Structures of PROM




                                                                    PLD1 / page 7
 Hong Kong Institute of Vocational Education
 Electrical and Electronic Engineering Discipline                                                Digital Electronics




                            PROM
 The PROM
             The input lines to the AND array are hard-wired and the output lines to the OR
              array are programmable
             Each AND gate generates one of the possible AND products (i.e., minterms)
   Example : Program output of the function given in the truth table
    D     C   B    A    O3
    0     0   0    0    1
    0     0   0    1    1                      O3 = 0 for other
    0     0   1    0    1                      combination of D,C,B,A
    0 0 1 1 1                                  (Fuses are blown to program output according to the
    0 1 1 1 1                                       truth table. Refer to Fig 11-21b, page 708, Tocci)
    1 0 1 1 1
    1 1 1 1 1

                                                                                                            PLD1 / page 8
    Hong Kong Institute of Vocational Education
    Electrical and Electronic Engineering Discipline                         Digital Electronics




                               PROM
 Refer to Fig 11-21b, page 708, write down the outputs O3, O2 and O1 in term
       of inputs D,C,B,A.

 How many output functions and how many inputs for each function can be
       programmed in a 512x4 ROM?



      PROM is suitable for those applications where every possible input
       combination is required to generate the output functions; e.g., code converters
       and data storage tables.




                                                                                        PLD1 / page 9
Hong Kong Institute of Vocational Education
Electrical and Electronic Engineering Discipline       Digital Electronics




                           Programmable Array Logic (PAL)




                                                                 PLD1 / page 10
 Hong Kong Institute of Vocational Education
 Electrical and Electronic Engineering Discipline                  Digital Electronics




                            PAL
 Programmable Array Logic (PAL)
            The input lines to the AND array are programmable and the
             output lines to the OR array are hard-wired
            Simplify the logic function (e.g. using K-map) before putting
             design into PLA.
                     K-maps




                                                                             PLD1 / page 11
Hong Kong Institute of Vocational Education
Electrical and Electronic Engineering Discipline   Digital Electronics




                           PAL




                                                             PLD1 / page 12
Hong Kong Institute of Vocational Education
Electrical and Electronic Engineering Discipline                          Digital Electronics




                           Programmable Logic Array (PLA)




                                             See Fig.11-23, P712, Tocci




                                                                                    PLD1 / page 13
Hong Kong Institute of Vocational Education
Electrical and Electronic Engineering Discipline                                      Digital Electronics




                           Programmable Logic Array (PLA)
   See Fig.11-23, P712, Tocci
   Programmable Logic Array (PLA)

                  Both input lines to the AND array and output lines to the OR array are
                   programmable
                  The IC also includes a programmable output polarity feature that permits the
                   designer the option of inverting any of the outputs


   For the previous example,
                   O3=AB+C’D’                      O2=AB’C
                   O1=ABC’D’+A’B’CD                O0=A+BD’+CD’




                                                                                                PLD1 / page 14
Hong Kong Institute of Vocational Education
Electrical and Electronic Engineering Discipline                                Digital Electronics




                           Programmable Logic Devices

                                              PROM         PAL          PLA
   Input lines                                hard-wired   prog.        prog.
   Output lines                               prog.        hard-wired   prog.
   Versatility                                low          moderate     high
   Difficulty in                              low          moderate     high
    manufacturing,
    programming and
    testing




                                                                                          PLD1 / page 15
Hong Kong Institute of Vocational Education
Electrical and Electronic Engineering Discipline                          Digital Electronics




                           Generic Array Logic (GAL)
  Instead of using one-time programmable fuse links, GAL use an
   EEPROM array.
  Block diagram of GAL 16V8A

                                            See Fig. 12-1, P.775, Tocci

  8 dedicated input pins
  2 special function pins (CK, OE)
  8 pins that can be used as inputs or outputs



                                                                                    PLD1 / page 16
Hong Kong Institute of Vocational Education
Electrical and Electronic Engineering Discipline     Digital Electronics




                           Output Structure in PLD
   Output logic marcrocells of 16V8R




                                                               PLD1 / page 17
Hong Kong Institute of Vocational Education
Electrical and Electronic Engineering Discipline          Digital Electronics




                           Output Structure in PLD
 The macrocell can be individually configured to bypass the
      flip-flop.

 The output can either be programmed to be registered (with
      flip-flop) or combinational (flip-flop bypassed).

 The PLD can be programmed as sequential or combinational
      logic.




                                                                    PLD1 / page 18
Hong Kong Institute of Vocational Education
Electrical and Electronic Engineering Discipline              Digital Electronics




                           Practical Design of using PLD
  Simple combinational logic implementation
                Example 12-1 and Fig. 12-6, P.780, Tocci

  Simple sequential logic implementation
                Example 12-2 and Fig. 12-8, P.782-3, Tocci




                                                                        PLD1 / page 19
  Hong Kong Institute of Vocational Education
  Electrical and Electronic Engineering Discipline             Digital Electronics




                             Programming PLD
 Equipment to design and build circuits using PLDs (Fig. 12-11, P.787)
             personal computer
             PLD development software
             programming fixture
             software to drive the programming fixture
             PLD


 JEDEC - a standard format for transferring programming data
     for PLDs (independent of PLD manufacturers or software)



                                                                         PLD1 / page 20
 Hong Kong Institute of Vocational Education
 Electrical and Electronic Engineering Discipline                        Digital Electronics




                            Development Software
 Allow users to enter their design in some convenient way
 Automatically create a JEDEC file
 Original software - PALASM (PAL assembler)
 Powerful development software tools are referred as compiler. They can
  accept more abstract representation of same design and translate it into
  hardware details necessary to program the PLD.
  e.g. CUPL, ABEL
 Some high-level compiler include schematic capture option allowing entry
  operation by drawing a logic circuit diagram
 Logic compiler also allow to enter the design in the form of truth table or state
  table. Some even accept timing diagram as input.



                                                                                   PLD1 / page 21

				
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