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A novel process for ultrathin monocrystalline silicon solar cells

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A novel process for ultrathin monocrystalline silicon solar cells Powered By Docstoc
					    14TH EUROPEAN PHOTOVOLAIC SOLAR ENRGY CONFERENCE                              BARCLONA, SPAIN            30 JUNE-4 JULY 1997




               A novel process for ultrathin monocrystalline silicon solar cells on glass


                                                         Rolf Brendel
                  Max Planck Institut für Festkörperforschung, Heisenbergstr. 1, D-70569 Stuttgart, Germany
                Phone: +49-711-6891606, Fax +49-711-6891010, E-mail: brendel@quasix.mpi stuttgart.mpg.de




      ABSTRACT: We introduce the perforated silicon process (ψ-process) for the fabrication of ultrathin silicon lay-
      ers with efficient light trapping. A silicon layer grows epitaxially on the porous surface of a textured monocrys-
      talline Si substrate. Mechanical stress cracks the porous layer and thereby separates the epitaxial layer from the
      substrate. According to x-ray diffraction analysis, our Wf = 5.8 µm thick Si layer is monocrystalline. Reflectance
      measurements and ray tracing simulations predict a maximum short circuit current of jsc * = 36.5 mA/cm2 for the
      waffle shaped film when attached to glass. Transport simulations forecast cell efficiencies η = 16 to 19% for film
      thicknesses of Wf = 2 to 3 µm.
       Keywords: Thin Film - 1: Porous Silicon - 2: Ray Tracing - 3




1. INTRODUCTION                                                           substrate wafer prohibit the application of this technique to
     The challenge of thin film crystalline silicon solar cells           photovoltaics for cost reasons.
[1] consists of three major tasks: (i) The growth of a high                    In contrast, the process introduced in this contribution
quality large grained crystalline Si layer on a cheap sub-                is applicable to photovoltaics because the process facili-
strate, (ii) the incorporation of a light trapping scheme to              tates light trapping, avoids bonding, and saves the substrate
compensate for the intrinsically weak near infrared absorp-               wafer. Figure 1a to f illustrates step by step the process
tion of crystalline Si, and (iii) an effective passivation of             that produces a textured monocrystalline Si-film on glass:
grain boundaries and surfaces.                                                 a) A monocrystalline Si substrate wafer receives a
     A textured monocrystalline Si layer on a float glass                 surface texture by any type of etching or mechanical grind-
would contribute to all three tasks: (i) Monocrystalline                  ing. Textures much more complex than the regular inverted
material has a potentially high volume quality and float                  pyramids of period p in Fig. 1a are possible.
glass is a cheap substrate. (ii) Innovative film textures [2-4],               b) The surface of the substrate is transformed into a
such as the Pyramidal-Film texture [4], facilitate efficient              porous Si layer (PSL) of thickness WPS. The orientation of
light trapping. (iii) The monocrystallinity avoids grain                  the Si in the PSL mediates the information of substrate
boundary recombination and enables efficient surface pas-                 orientation.
sivation at low temperatures [5]. Such a fabrication of thin                   c) Hence, Si grows epitaxially on the PSL. A low tem-
and textured monocrystalline Si layers has not been demon-                perature epitaxial technique is of advantage, since the sur-
strated in the literature yet.                                            face mobility of the Si atoms on the inner surface of PSL
     In this contribution we introduce the novel perforated               leads to a sintering process at temperatures above 850 °C
silicon process to fabricate textured monocrystalline thin                [7].
films on float glass. We study the light trapping perform-                     The front surface of the epitaxial layer is freely accessi-
ance of such films experimentally and analyze the effi-                   ble at this stage. Any process at temperatures lower than
ciency potential of the novel film structure theoretically.               around 850°C may be used to form the cell emitter. An
                                                                          epitaxial emitter as well as an inversion layer or a hetero-
                                                                          junction emitter seems attractive. Surface passivation and
2. PERFORATED SILICON PROCESS                                             grid formation should utilize innovative techniques de-
     Epitaxy on porous Si was thoroughly studied for the                  scribed elsewhere [5, 8, 9].
fabrication of thin monocrystalline Si layers on insulating                    d) A superstrate (e.g. glass) is attached to the front
substrates [6]. In this process, an epitaxial layer grows by              surface by a transparent encapsulant. The temperature
chemical vapor deposition at temperatures T > 1000°C on a                 resistance of the superstrate and the encapsulant deter-
plane monocrystalline Si wafer with a porous surface. The                 mines the maximum process temperature of all subsequent
epitaxial layer is then transferred to an insulator by wafer              process steps.
bonding. Thereafter mechanical grinding removes the sub-                       e) We utilize the low mechanical strength of the PSL
strate wafer. Subsequent chemical etching of the residual                 compared to bulk Si to separate the cell from the substrate.
porous layer completes the process. The lack of light trap-               A variety of treatments seem appropriate: Shock heating,
ping, the bonding process, and the consumption of the                     filling the pores with liquids or gases that are forced to



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   14TH EUROPEAN PHOTOVOLAIC SOLAR ENRGY CONFERENCE                              BARCLONA, SPAIN          30 JUNE-4 JULY 1997




                                                                                                     a)




                                                                                                     b)
                                                                         Fig. 2: Perspective view of a free standing Si waffle pro-
Fig. 1: Perforated silicon process. (a) A moncrystalline Si              duced by the Ψ-process: (a) view from top and (b) obliquely
wafer receives a surface texture of period p. (b) A surface              viewing at the cross section.
layer of thickness WPS is transformed into a porous Si layer
(PSL). (c) An epitaxial Si layer (epi-Si) of thickness Wf                times until a new texturing of the substrate wafer becomes
grows. (d) A glass superstrate is attached to the epitaxial              necessary.
layer. (e) The mechanically weak PSL functions as a perfo-
ration within Si and allows separation of epi-Si and sub-                EXPERIMENTAL
strate. (f) A detached back surface reflector enhances light             3.1 Sample preparation
trapping and forms point contacts simultaneously.                            A p + -type, 1019 cm–3 boron doped, (100)-oriented
                                                                         monocrystalline Si wafer of 4" in diameter receives inverted
                                                                         pyramids of period p = 13 µm by photolithography and
expand, distortion of the PSL by compressive or tensile                  anisotropic etching with KOH. Anodic etching in diluted
stress, or ultrasonic treatment. In any case the PSL layer               HF produces a WPS = 6 µm thick porous silicon layer in
functions like a perforation within silicon (psi), hence the             approximately two minutes time. Prior to epitaxy we heat
name Ψ-process.                                                          the sample to 850°C for 10 min to remove the native oxide
     f) The back side of the cell is accessible for surface              from the PSL surface. An epitaxial, Ga-doped Si film of
passivation and formation of a reflector. A detached reflec-             thickness Wf = 5.8 µm grows by the ion assisted deposition
tor may also serve to form point contacts, that are benefi-              (IAD) technique [10] at 700°C. The growth rate is 4 µm/h
cial for small minority carrier recombination.                           on flat surfaces. Transparent poly-(ethylen-phtalate) fixes
     The free accessibility of the back and the front surface            glasses of 2x2 cm2 in size to the epitaxial layer. A 2 min
is an intrinsic advantage of the Ψ-process over processes                ultrasonic treatment destabilizes the PSL layer and facili-
that deposit Si directly onto an insulating substrate.                   tates mechanical removal of the epitaxial layer without
     Formation of the PSL consumes a thickness WPS/cos(α)                chemical etching. In some cases we separate the epitaxial
of the substrate wafer that is textured with facets inclined             layer and substrate even without the application of ultra-
by an angle α relative to the macroscopic cell surface. After            sound.
removal of all residual porous Si, the substrate retains the
initial surface morphology (Fig. 1a) provided WPS/p << 1.                3.2 Sample characterization
Otherwise, edges and tips become rounded with a curvature                    Figure 2 shows scanning electron microscope images of
of radius WPS, as indicated in Fig. 1e. Hence, for sufficiently          a free standing Si waffle produced with the Ψ-process. We
small ratios WPS/p the substrate may be re-used several                  used no cleaning other than ultrasonic treatment prior to



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            14TH EUROPEAN PHOTOVOLAIC SOLAR ENRGY CONFERENCE                                                     BARCLONA, SPAIN      30 JUNE-4 JULY 1997




                     106                                                               0.6 µs is caused by de-trapping of carriers in shallow levels.
                                                                  (400)                We did not measure the electron mobility. However, con-
                     105                                                               sidering the measured hole mobility µ = 186 cm2/Vs as a
  INTENSITY [a.u.]




                                                                                       lower bound for the electron mobility we calculate a minor-
                     104                                                               ity carrier diffusion length L > 11 µm, which is larger than
                                                                                       the film thickness Wf = 5.8 µm.
                     103
                                textured Si film on glass                                   For thin film cells light trapping is essential. Unfortu-
                          2                                                            nately, the optical performance of the encapsulated waffle
                     10
                                                                                       structure, with an Al-mirror behind the sample as shown
                     101                                                               schematically in Fig. 1f, cannot be measured without con-
                                     monocrystalline substrate
                                                                                       tacting the sample. Therefore, we estimate the short circuit
                          30°      40°       50°  60°            70°      80°          current potential of our sample from a comparison of a
                                            ANGLE 2 θ                                  measured hemispherical reflectance and a ray tracing simu-
Fig. 3: X-ray diffraction spectra of the epitaxial Si waffle                                                                     1
                                                                                       lation with the program SUNRAYS [ 3]. The detached
shown in Fig. 2 and of the monocrystalline substrate wafer.                            reflector has proven to reduce the optical losses in the Al
Note the logarithmic intensity scale.                                                  significantly [2].
                                                                                            Figure 5 shows the measured (solid line) and the calcu-
scanning electron microscope investigations. The perspec-                              lated (circles) hemispherical reflectance. The ray tracing
tive top view of Fig. 2 a shows regular inverted pyramids                              simulation almost reproduces the measurement without
that are replica of the initial surface texture of the substrate                       adjustment of optical parameters. Small deviations between
wafer. Figure 2 b views obliquely at the cross section of the                          measurement and simulation are qualitatively explained by
waffle. The pyramidal tips point downwards. We find no                                 the micro-roughness of the pyramidal facets that was not
cracks. The film thickness, normal to the pyramidal facets,                                                             2
                                                                                       included into the simulation [ ]. SUNRAYS calculates a
is Wf = 5.8 µm. The top surface shows pitches of less than                             maximum short circuit current jsc * = 36.5 mA/cm2 ± 0.5
0.1 µm in depth and diameter (not visible in Fig. 3) thus                              mA/cm2 from the simulated absorption (triangles) for the
introducing a kind of micro roughness. These pitches are                               Wf = 5.8 µm thick waffle structure with a texture period p =
related to the IAD-technique since they also appear on flat                            13 µm under AM1.5G spectrum of 1000 W/m2.
epitaxial films that grow on non-textured bulk-Si.
     Hall measurements of a film co-deposited onto a high
resistivity non-textured monocrystalline substrate yield an
electrically active Ga dopant concentration of 2x1017 cm–3
and a hole mobility of 186 cm2/Vs.
     Figure 3 shows the CuKα x-ray diffraction spectrum of
the Si waffle on glass in comparison to the spectrum of the
monocrystalline Si substrate. Note the logarithmic intensity
scale. All peaks are at the same angles, thus our Si waffle is
monocrystalline with the same orientation as the substrate
wafer. Only the large (400) peak originates from Si. All
other peaks are more than 2 orders of magnitude smaller
and are artifacts of the x-ray machine. The larger back-                                          1000
                                                                                        REFLECTANCE DR [a.u]




ground intensity of the epitaxial film is caused by the
amorphous glass substrate. Consequently, the IAD tech-
nique [10] allows eptiaxial growth on porous substrates.
                                                                                                                                   t = 0.27 µs ± 0.08 µs
     The bulk minority carrier life time is one of the crucial
material parameters for a solar cell. The surface has to be                                                    100
well passivated in order to measure the bulk lifetime.
Therefore, we oxidize a free standing Si waffle on both
sides at 1000°C and charge the surfaces with a corona
discharge chamber [11] in order to repel the minority carri-
ers from the recombination centers at the surface.                                                             10
     Figure 4 shows the microwave reflectance transient                                                          -0.2   0.0   0.2 0.4 0.6        0.8   1.0
after a 20 ns optical puls excitation. We place the sample a                                                                   TIME t [µs]
quarter of the microwave wavelength above a metal reflec-
                                                                                       Fig. 4: Transient microwave reflectance ∆R of the Wf = 5.8
tor to obtain optimum sensitivity [12]. The decay is not
                                                                                       µm thick Si waffle shown in Fig. 2 after optical excitation
strictly mono-exponential but may serve to estimate the
                                                                                       with a 20 ns laser puls. Minority carrier life time is τ = 0.27
lifetime τ = 0.27 µs ± 0.08 µs. The slow decay for times t >
                                                                                       µs as deduced from the slope of the linear fit.


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                    14TH EUROPEAN PHOTOVOLAIC SOLAR ENRGY CONFERENCE                                BARCLONA, SPAIN            30 JUNE-4 JULY 1997




                                                                                            to optimize the cell thickness Wf in order to adequately
                  DIFFUSION LENGTH L [µm]

                                            100                                             assess the efficiency potential for fixed L and S [14]. There-
                                                     24% 10 µm                              fore, the simulation varies the film thickness W for opti-
                                                     7 µm
                                                                                            mum cell efficiency. We assume a Si cell with a 1019 cm–3 P-
                                                    5 µm 22%
                                                                                            doped and 0.5 µm thick emitter and a base that is 1018 cm–3
                                                                 20%                        B-doped. At thicknesses W < 1 µm, base and emitter are of
                                             10      3µm
                                                                                            equal thickness. The diffusion length L and SRV S are taken
                                                       2 µm            18%
                                                                                            equal for the base and the emitter in order to reduce the
                                                                         16%                number of free parameters. We account for recombination
                                                                             14%            in the space charge region [15]. Mobility values and band-
                                                           1µm
                                             1                         10%     12%          gap narrowing parameters of c-Si are taken from Ref. [14].
                                              10 0 10 1 10 2 10 3 10 4   105                     Figure 6 shows the efficiency (solid line) at optimum
                                            RECOMBINATION VELOCITY S [cm/s]                 cell thickness (broken line) for a large range of parameters S
                                                                                            and L. At a diffusion length L = 11 µm we calculate an
Fig. 6: Theoretical energy conversion efficiency (solid                                     energy conversion efficiency of 16 to 19% at an optimum
lines) and optimum cell thickness (broken lines) for cells                                  cell thickness of 2 to 3 µm, depending on SRV S (dots). An
with surface recombination velocities S and minority carrier                                efficiency of 16%, corresponding to a SRV S = 104 cm/s,
diffusion length L. The simulation assumes the waffle texture                               would be a great success for a 2 µm thin crystalline silicon
of Fig. 2. For L = 11 µm efficiencies ranging from 16 to                                    solar cell on glass. The deposition of a Wf = 2 µm thin film
19% are feasible depending on SRV S (dots).                                                 takes 50 min with the currently employed IAD-technique.

                                                                                            5. CONCLUSIONS
 REFLECTANCE, ABSORPTION




                      1.0                                                                        We introduced the novel perforated silicon process (Ψ-
                                                                                            process). Epitaxy on a textured monocrystalline Si sub-
                      0.8                                                                   strate and mechanical separation of the epitaxial layer from
                                                  simulated absorption
                                                                                            the substrate yield ultrathin monocrystalline textured Si
                      0.6                                                                   films on any type of glass. Reflectance measurements
                                                                                            demonstrate an optical absorption that corresponds to a
                      0.4                                                                   maximum short circuit current density jsc * = 36.5 mA/cm2.
                          measured reflectance                                              Theoretically, the material quality is sufficient for efficien-
                      0.2 simulated reflectance                                             cies from 16 to 19% with at an optimum cell thicknesses
                                                                                            ranging from Wf = 2 to 3 µm.
                      0.0                                                                        Further development of the Ψ-process aims at a small
                        300                          500 700  900 1100                      porous layer thickness WPS < 1 µm to reduce material
                                                     WAVELENGTH [nm]                        consumption and to demonstrate frequent reusability of the
                                                                                            substrate wafer. A further increase of deposition rate is also
Fig. 5: Measured hemispherical reflectance of encapsulated
                                                                                            important. We do not see obstacles to produce ultrathin
waffle structure (solid line). Calculated reflectance and
                                                                                            layers of 100 cm2 in size.
absorption spectra (symbols). The simulated absorption
spectrum corresponds to a short circuit current potential
                                                                                            ACKNOWLEDGMENTS
jsc * = 36.5 mA/cm 2. The error bars are due to the statistics
                                                                                                The author thanks J. H. Werner (Institut für Physika-
of the Monte Carlo simulation.
                                                                                            lische Elektronik Univ. Stuttgart), H. J. Queisser, J. Küh-
                                                                                            nle, and R. B. Bergmann for delightful discussions and their
                                                                                            encouragement to leave beaten paths. Thanks to H. Art-
4. EFFICIENCY POTENTIAL
                                                                                            mann and W. Frey (Robert Bosch GmbH, Zentralbereich
    We investigate the efficiency potential of crystalline Si
                                                                                            Forschung und Vorausentwicklung, Abt. FV/FLD) for
films with the shape shown in Fig. 2 by theoretical model-
                                                                                            preparation of the porous Si and to S. Oelting (Antec) for
ing. The optical model applies ray tracing by SUNRAYS as
                                                                                            epitaxy. Technical assistance by B. Fischer and N. Jensen
described above. The minority carrier generation rate is
                                                                                            was of indispensable help. This work is supported by the
taken spatially homogeneous in the Si film and is calculated
                                                                                            German BMBF under contract no. 0329634, which is
from jsc * and the cell volume. In addition to the optical
                                                                                            gratefully acknowledged.
model an electronic transport model is required. We a      p-
proximate the complex three-dimensional charge carrier
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   14TH EUROPEAN PHOTOVOLAIC SOLAR ENRGY CONFERENCE                  BARCLONA, SPAIN   30 JUNE-4 JULY 1997




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Description: Silicon chip with the basic integrity of the crystal lattice structure. Different directions of a different nature, is a good semiconductor material. Purity of 99.9999%, even up to 99.9999999% or more. For the manufacture of semiconductor devices, solar batteries. High-purity polysilicon used in the single crystal drawn from the furnace.