CMOS Fabrication Process (PDF)

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					     Silicon Fabrication
    The nMOS Process
 Example Mask Layouts




CMOS Fabrication Process


              Dr DC Hendry




             September 2007




         Dr DC Hendry      Digital Systems
                         Silicon Fabrication
                        The nMOS Process
                     Example Mask Layouts


Outline I

  1   Silicon Fabrication

        Photolithography



  2   The nMOS Process


  3   Example Mask Layouts

        A Single Transistor

        Two Transistors in Series


                             Dr DC Hendry      Digital Systems
                       Silicon Fabrication
                      The nMOS Process       Photolithography
                   Example Mask Layouts


Electronic Grade Silicon



      Silicon devices are constructed using a planar process.




                           Dr DC Hendry      Digital Systems
                       Silicon Fabrication
                      The nMOS Process       Photolithography
                   Example Mask Layouts


Electronic Grade Silicon



      Silicon devices are constructed using a planar process.
      This means that all processing steps are applied to one side of
      a silicon wafer.




                           Dr DC Hendry      Digital Systems
                       Silicon Fabrication
                      The nMOS Process       Photolithography
                   Example Mask Layouts


Electronic Grade Silicon



      Silicon devices are constructed using a planar process.
      This means that all processing steps are applied to one side of
      a silicon wafer.
      The wafers used are extremely pure and free from defects.




                           Dr DC Hendry      Digital Systems
                       Silicon Fabrication
                      The nMOS Process       Photolithography
                   Example Mask Layouts


Electronic Grade Silicon



      Silicon devices are constructed using a planar process.
      This means that all processing steps are applied to one side of
      a silicon wafer.
      The wafers used are extremely pure and free from defects.
      The degree of purity is at least “nine nines” - 99.9999999%
      pure.




                           Dr DC Hendry      Digital Systems
                       Silicon Fabrication
                      The nMOS Process       Photolithography
                   Example Mask Layouts


Electronic Grade Silicon



      Silicon devices are constructed using a planar process.
      This means that all processing steps are applied to one side of
      a silicon wafer.
      The wafers used are extremely pure and free from defects.
      The degree of purity is at least “nine nines” - 99.9999999%
      pure.
      Such wafers are grown as a large single ingot and then sliced
      into wafers about 1mm thick.




                           Dr DC Hendry      Digital Systems
                      Silicon Fabrication
                     The nMOS Process       Photolithography
                  Example Mask Layouts


Photolithography



     Photolithography is a basic step used throughout silicon
     fabrication.




                          Dr DC Hendry      Digital Systems
                      Silicon Fabrication
                     The nMOS Process       Photolithography
                  Example Mask Layouts


Photolithography



     Photolithography is a basic step used throughout silicon
     fabrication.
     A photolithography step transfers a pattern from mask to the
     silicon wafer using a layer of photoresist.




                          Dr DC Hendry      Digital Systems
                      Silicon Fabrication
                     The nMOS Process       Photolithography
                  Example Mask Layouts


Photolithography



     Photolithography is a basic step used throughout silicon
     fabrication.
     A photolithography step transfers a pattern from mask to the
     silicon wafer using a layer of photoresist.
     Various processing steps may then be applied to the material
     exposed by the developed photoresist, for example, etching of
     exposed aluminium metal.




                          Dr DC Hendry      Digital Systems
                         Silicon Fabrication
                        The nMOS Process       Photolithography
                     Example Mask Layouts


Masks


        The pattern to be transferred is prepared using a variety of
        computer programs.




                             Dr DC Hendry      Digital Systems
                         Silicon Fabrication
                        The nMOS Process       Photolithography
                     Example Mask Layouts


Masks


        The pattern to be transferred is prepared using a variety of
        computer programs.
        The pattern might for example represent the metal wires to
        be placed on one of the metal layers of the design.




                             Dr DC Hendry      Digital Systems
                         Silicon Fabrication
                        The nMOS Process       Photolithography
                     Example Mask Layouts


Masks


        The pattern to be transferred is prepared using a variety of
        computer programs.
        The pattern might for example represent the metal wires to
        be placed on one of the metal layers of the design.
        A mask is first prepared, this consists of an optical flat onto
        which the pattern is placed using for example chromium metal.




                             Dr DC Hendry      Digital Systems
                         Silicon Fabrication
                        The nMOS Process       Photolithography
                     Example Mask Layouts


Masks


        The pattern to be transferred is prepared using a variety of
        computer programs.
        The pattern might for example represent the metal wires to
        be placed on one of the metal layers of the design.
        A mask is first prepared, this consists of an optical flat onto
        which the pattern is placed using for example chromium metal.
        A full mask set can be expensive, for a 0.18µm process a
        mask set is approximately $250K.




                             Dr DC Hendry      Digital Systems
                         Silicon Fabrication
                        The nMOS Process       Photolithography
                     Example Mask Layouts


Masks


        The pattern to be transferred is prepared using a variety of
        computer programs.
        The pattern might for example represent the metal wires to
        be placed on one of the metal layers of the design.
        A mask is first prepared, this consists of an optical flat onto
        which the pattern is placed using for example chromium metal.
        A full mask set can be expensive, for a 0.18µm process a
        mask set is approximately $250K.
        A full mask set for a 0.10µm process is approximately $1M.




                             Dr DC Hendry      Digital Systems
                       Silicon Fabrication
                      The nMOS Process       Photolithography
                   Example Mask Layouts


Photoresist

      Photoresist is a compound that is sensitive to light (usually
      UV or soft X-Ray).




                           Dr DC Hendry      Digital Systems
                       Silicon Fabrication
                      The nMOS Process       Photolithography
                   Example Mask Layouts


Photoresist

      Photoresist is a compound that is sensitive to light (usually
      UV or soft X-Ray).
      A thin layer of photoresist is spun onto the wafer.




                           Dr DC Hendry      Digital Systems
                       Silicon Fabrication
                      The nMOS Process       Photolithography
                   Example Mask Layouts


Photoresist

      Photoresist is a compound that is sensitive to light (usually
      UV or soft X-Ray).
      A thin layer of photoresist is spun onto the wafer.
      The mask is placed on top of the photoresist and exposed to
      light.




                           Dr DC Hendry      Digital Systems
                       Silicon Fabrication
                      The nMOS Process       Photolithography
                   Example Mask Layouts


Photoresist

      Photoresist is a compound that is sensitive to light (usually
      UV or soft X-Ray).
      A thin layer of photoresist is spun onto the wafer.
      The mask is placed on top of the photoresist and exposed to
      light.
      The photoresist is then developed, and either the exposed or
      the unexposed photoresist removed (either positive or negative
      photoresist).




                           Dr DC Hendry      Digital Systems
                       Silicon Fabrication
                      The nMOS Process       Photolithography
                   Example Mask Layouts


Photoresist

      Photoresist is a compound that is sensitive to light (usually
      UV or soft X-Ray).
      A thin layer of photoresist is spun onto the wafer.
      The mask is placed on top of the photoresist and exposed to
      light.
      The photoresist is then developed, and either the exposed or
      the unexposed photoresist removed (either positive or negative
      photoresist).
      The exposed material below may then be processed, for
      example, removal by an etching chemical.




                           Dr DC Hendry      Digital Systems
                       Silicon Fabrication
                      The nMOS Process       Photolithography
                   Example Mask Layouts


Photoresist

      Photoresist is a compound that is sensitive to light (usually
      UV or soft X-Ray).
      A thin layer of photoresist is spun onto the wafer.
      The mask is placed on top of the photoresist and exposed to
      light.
      The photoresist is then developed, and either the exposed or
      the unexposed photoresist removed (either positive or negative
      photoresist).
      The exposed material below may then be processed, for
      example, removal by an etching chemical.
      The accuracy of the photolithographic step (or patterning
      step) is fundamental to VLSI processing.

                           Dr DC Hendry      Digital Systems
                      Silicon Fabrication
                     The nMOS Process
                  Example Mask Layouts


The nMOS Process
  The n-channel MOSFET in cross section was:



                                            Gate                    Thin oxide


           Source - N+                                           Drain - N+

                                 Substrate - P-


  where:

      N+ indicates heavily doped N type material

                          Dr DC Hendry         Digital Systems
                      Silicon Fabrication
                     The nMOS Process
                  Example Mask Layouts


The nMOS Process
  The n-channel MOSFET in cross section was:



                                            Gate                    Thin oxide


           Source - N+                                           Drain - N+

                                 Substrate - P-


  where:

      N+ indicates heavily doped N type material
      P- indicates lightly doped P type material
                          Dr DC Hendry         Digital Systems
                        Silicon Fabrication
                       The nMOS Process
                    Example Mask Layouts


Fabrication of nMOS devices



  Fabrications starts with a lightly p-doped wafer, On top of this a
  layer of SiO2 is grown:




                            Dr DC Hendry      Digital Systems
                        Silicon Fabrication
                       The nMOS Process
                    Example Mask Layouts


Fabrication of nMOS devices



  Fabrications starts with a lightly p-doped wafer, On top of this a
  layer of SiO2 is grown:


                              Field Oxide - SiO2

                                   P- Substrate




                            Dr DC Hendry      Digital Systems
                       Silicon Fabrication
                      The nMOS Process
                   Example Mask Layouts


Diffusion Mask


  The first mask used opens the field oxide (usually just referred to
  as FOX or just oxide) where n-channel mosfets will be constructed.
  The wafer then becomes:




                           Dr DC Hendry      Digital Systems
                       Silicon Fabrication
                      The nMOS Process
                   Example Mask Layouts


Diffusion Mask


  The first mask used opens the field oxide (usually just referred to
  as FOX or just oxide) where n-channel mosfets will be constructed.
  The wafer then becomes:




                                  P- Substrate




                           Dr DC Hendry      Digital Systems
                         Silicon Fabrication
                        The nMOS Process
                     Example Mask Layouts


Deposition of Thin Oxide (Thinox)


  The next step is to deposit a thin layer of very high quality silicon
  dioxide across the entire wafer. This layer will become the thinox
  beneath the gates of the MOSFETs. The wafer becomes:




                             Dr DC Hendry      Digital Systems
                         Silicon Fabrication
                        The nMOS Process
                     Example Mask Layouts


Deposition of Thin Oxide (Thinox)


  The next step is to deposit a thin layer of very high quality silicon
  dioxide across the entire wafer. This layer will become the thinox
  beneath the gates of the MOSFETs. The wafer becomes:




                                    P- Substrate




                             Dr DC Hendry      Digital Systems
                        Silicon Fabrication
                       The nMOS Process
                    Example Mask Layouts


Poly Mask


  On top of this thinox layer a complete layer of polycrystalline
  silicon is grown.

  The second mask, the poly mask, then determines where
  polysilicon will remain. The wafer now becomes:




                            Dr DC Hendry      Digital Systems
                        Silicon Fabrication
                       The nMOS Process
                    Example Mask Layouts


Poly Mask


  On top of this thinox layer a complete layer of polycrystalline
  silicon is grown.

  The second mask, the poly mask, then determines where
  polysilicon will remain. The wafer now becomes:


                                          Gate

                                   P- Substrate




                            Dr DC Hendry      Digital Systems
                         Silicon Fabrication
                        The nMOS Process
                     Example Mask Layouts


Self Aligned Step


    1   A short etching step with no pattern applied then removes the
        exposed thinox.




                             Dr DC Hendry      Digital Systems
                         Silicon Fabrication
                        The nMOS Process
                     Example Mask Layouts


Self Aligned Step


    1   A short etching step with no pattern applied then removes the
        exposed thinox.
    2   The substrate is then only open where the sources and drains
        of MOSFETs are needed.




                             Dr DC Hendry      Digital Systems
                         Silicon Fabrication
                        The nMOS Process
                     Example Mask Layouts


Self Aligned Step


    1   A short etching step with no pattern applied then removes the
        exposed thinox.
    2   The substrate is then only open where the sources and drains
        of MOSFETs are needed.
    3   Note that one of the elements covering the substrate is the
        poly gate of the transistor.




                             Dr DC Hendry      Digital Systems
                         Silicon Fabrication
                        The nMOS Process
                     Example Mask Layouts


Self Aligned Step


    1   A short etching step with no pattern applied then removes the
        exposed thinox.
    2   The substrate is then only open where the sources and drains
        of MOSFETs are needed.
    3   Note that one of the elements covering the substrate is the
        poly gate of the transistor.
    4   Now diffuse in an N+ dopant to construct the source and
        drain diffusions.




                             Dr DC Hendry      Digital Systems
                          Silicon Fabrication
                         The nMOS Process
                      Example Mask Layouts


Self Aligned Step


    1   A short etching step with no pattern applied then removes the
        exposed thinox.
    2   The substrate is then only open where the sources and drains
        of MOSFETs are needed.
    3   Note that one of the elements covering the substrate is the
        poly gate of the transistor.
    4   Now diffuse in an N+ dopant to construct the source and
        drain diffusions.
    5   Self aligned step




                              Dr DC Hendry      Digital Systems
                        Silicon Fabrication
                       The nMOS Process
                    Example Mask Layouts


Wafer after Diffusion of Source and Drain




                                          Gate

           Source                  P- Substrate                 Drain




                            Dr DC Hendry      Digital Systems
                         Silicon Fabrication
                        The nMOS Process
                     Example Mask Layouts


Deposition of Connections



    1   The remaining steps in the process add layers of insulation
        and metal to form connecting wires.




                             Dr DC Hendry      Digital Systems
                          Silicon Fabrication
                         The nMOS Process
                      Example Mask Layouts


Deposition of Connections



    1   The remaining steps in the process add layers of insulation
        and metal to form connecting wires.
    2   Each layer of insulating material, silicon dioxide or silicon
        nitride, is patterned to allow connections.




                              Dr DC Hendry      Digital Systems
                          Silicon Fabrication
                         The nMOS Process
                      Example Mask Layouts


Deposition of Connections



    1   The remaining steps in the process add layers of insulation
        and metal to form connecting wires.
    2   Each layer of insulating material, silicon dioxide or silicon
        nitride, is patterned to allow connections.
    3   Insulation openings on the first layer of insulation are referred
        to as contact cuts, on subsequent layers as vias.




                              Dr DC Hendry      Digital Systems
                          Silicon Fabrication
                         The nMOS Process
                      Example Mask Layouts


Deposition of Connections



    1   The remaining steps in the process add layers of insulation
        and metal to form connecting wires.
    2   Each layer of insulating material, silicon dioxide or silicon
        nitride, is patterned to allow connections.
    3   Insulation openings on the first layer of insulation are referred
        to as contact cuts, on subsequent layers as vias.
    4   Each layer of metal is patterned to form wires.




                              Dr DC Hendry      Digital Systems
                          Silicon Fabrication
                         The nMOS Process
                      Example Mask Layouts


Deposition of Connections



    1   The remaining steps in the process add layers of insulation
        and metal to form connecting wires.
    2   Each layer of insulating material, silicon dioxide or silicon
        nitride, is patterned to allow connections.
    3   Insulation openings on the first layer of insulation are referred
        to as contact cuts, on subsequent layers as vias.
    4   Each layer of metal is patterned to form wires.
    5   Finally, an overglass layer is applied to protect the device.




                              Dr DC Hendry      Digital Systems
                         Silicon Fabrication
                        The nMOS Process
                     Example Mask Layouts


Summary of Basic nMOS Masks



  For a very basic nMOS process then, the masks needed are:

    1   The diffusion mask, usually drawn in green.




                             Dr DC Hendry      Digital Systems
                         Silicon Fabrication
                        The nMOS Process
                     Example Mask Layouts


Summary of Basic nMOS Masks



  For a very basic nMOS process then, the masks needed are:

    1   The diffusion mask, usually drawn in green.
    2   The polysilicon mask, usually drawn in red.




                             Dr DC Hendry      Digital Systems
                         Silicon Fabrication
                        The nMOS Process
                     Example Mask Layouts


Summary of Basic nMOS Masks



  For a very basic nMOS process then, the masks needed are:

    1   The diffusion mask, usually drawn in green.
    2   The polysilicon mask, usually drawn in red.
    3   The contact cut mask for the first insulation layer, draw in
        black in outline.




                             Dr DC Hendry      Digital Systems
                         Silicon Fabrication
                        The nMOS Process
                     Example Mask Layouts


Summary of Basic nMOS Masks



  For a very basic nMOS process then, the masks needed are:

    1   The diffusion mask, usually drawn in green.
    2   The polysilicon mask, usually drawn in red.
    3   The contact cut mask for the first insulation layer, draw in
        black in outline.
    4   The metal-1 mask, usually drawn in blue.




                             Dr DC Hendry      Digital Systems
                        Silicon Fabrication
                                                  A Single Transistor
                       The nMOS Process
                                                  Two Transistors in Series
                    Example Mask Layouts


A Single Transistor
  The construction of a single transistor is extremely simple, here is
  the mask layout for an n-channel MOSFET. This layout does not
  include any connections to the transistor that are clearly essential
  in a real layout.


                                        Gate

                         Source                          Drain


                                                               W




                                              L

                            Dr DC Hendry          Digital Systems
                         Silicon Fabrication
                                               A Single Transistor
                        The nMOS Process
                                               Two Transistors in Series
                     Example Mask Layouts


Two Transistors in Series
  This circuit is for two transistors in series. The connections to the
  two devices are not shown.




                             Dr DC Hendry      Digital Systems

				
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