Computer Security Cv Template

							                        Theocharis Theocharides, Ph.D
Contact Information
 Department of Electrical and Computer Engineering       Tel: + 357 22892259
 University of Cyprus                                    Fax: + 357 22892260
 75 Kallipoleos Avenue
 P.O. Box 20537                                          Email: ttheocharides@ucy.ac.cy
 1678, Nicosia, Cyprus                                   Web: http://www.eng.ucy.ac.cy/theocharides/



Education
       December 2005
       Ph.D. in Computer Science and Engineering
       Pennsylvania State University, University Park, PA, 16802
       Thesis Title: “Embedded Hardware Face Detection for Digital Surveillance Systems”

       May 2002
       B.Sc. in Computer Engineering with Minor in Mathematics
              Pennsylvania State University, University Park, PA, 16802

Research Interests
   •   High-Performance, Reliable and Energy Efficient Systems-on-Chip and Intelligent Embedded
       Systems
   •   Application-Specific Hardware Architectures targeting Multimedia, Artificial Intelligence, Signal
       Processing and Machine Vision Algorithms and Applications
   •   Computer Arithmetic, VLSI Design, Microprocessor Architectures
   •   On-Chip Intelligent System Management
   •   Embedded Systems Simulation and Emulation Techniques, Hardware/software Co-design.
   •   Multicore and Manycore Systems

Teaching Interests
   •   General Courses
          o Embedded and Real-Time Systems, FPGA Design
          o Computer Architecture and Organization, Digital Logic Design, VLSI Design, Digital
             Integrated Circuits and Systems

   •   Focused Topics
          o Energy – Reliability – Performance tradeoffs for embedded systems and ASIC Design
          o Design, Simulation, Estimation and Evaluation Tools
          o Application-Specific and Embedded Microprocessors
          o Computer Arithmetic
          o Computer Vision and Image Processing
          o Electronic Design Automation and Synthesis
          o Hardware/Software Co-Design Techniques
          o System Level Optimization, Game Theory and Linear Programming




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Curriculum Vitae                                                                 Theocharis Theocharides



Academic and Professional Experience
December 2006 – Present
Lecturer, Department of Electrical and Computer Engineering (ECE), University of Cyprus

       Teaching (3XX/4XX – Undergraduate, 6XX – Graduate)

           •   ECE 312 - Computer Architecture (SP’06, FA’05, FA’06, FA’07, FA’08, FA’09)
                 o Introductory concepts of computer architecture, instruction level parallelism,
                     datapath design, memory hierarchy, interconnects, application-specific
                     architectures, microarchitectures. Course includes a lab session.
           •   ECE 656 - Advanced Computer Architecture (SP’06, SP’07)
                 o Memory coherency, multicore/manycore architectures, systolic arrays, vector
                     processors, emerging architectures and microarchitectures.
           •   ECE 408 - Digital Design with FPGAs (FA’06, FA’07, FA’08, FA’09)
                 o FPGA Architectures, Design Flow, Logic Synthesis, Placement and Routing,
                     Emerging FPGA applications, Reconfigurable logic. Course includes a lab session.
           •   ECE 664 – Advanced Digital Design with FPGAs (FA’06, FA’07, FA’08)
                 o Emerging FPGA architectures and design methodologies, embedded, signal
                     processing and general purpose FPGA design, design tools and design flow.
                     Course includes significant laboratory time.
           •   Embedded and Real-Time Systems Design (SP’09)
                 o Real-Time vs. General computing, requirements and specifications, hardware,
                     software, embedded operating systems (task allocation, scheduling), optimization
                     methodologies. Course includes significant laboratory time.
           •   ECE 653 – Advanced Embedded and Real-Time Systems (SP’10)
                 o Emerging topics in ES and RT systems, hardware/software co-design,
                     multi-variable multi-objective optimization algorithms, power aware design, reliable
                     systems. Course includes significant laboratory time.
           •   ECE 317 - Software Engineering (SP’08)
                 o Software requirements and specifications, modeling, implementation strategies,
                     testing, verification and validation, ethics, project management, teamwork skills.

       Academic Advising

       Current Students

           •   Andreas Savva, Ph.D. Student (admitted Spring’08).
                  o Research Area: Simulation and Evaluation Frameworks for Manycore Architectures
           •   Agathoklis Papadopoulos, Ph.D. Student (admitted Fall’09).
                  o Research Area: Run-Time Intelligent Management for Embedded Systems
           •   Christos Kyrkou, Ph.D. Student (admitted Fall’10).
                  o Research Area: Hardware Architectures for Pattern Recognition Algorithms
           •   Christos Ttofis, M.Sc. Student, (admitted Fall’09)
                  o Research Area: Application-Specific Processors and Embedded Computer Vision

       Graduated Students

           •   Christos Kyrkou, M.Sc., June 2010
                  o Thesis Title: Embedded Hardware Architectures for Object Detection


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Curriculum Vitae                                                                Theocharis Theocharides



       Selected Senior Design Projects – Supervision (15 students supervised between 2007-2010)

           •   Christos Kyrkou, 2007-2008, “FPGA Implementation for Neural Network Face Detection”,
               Best Senior Design Project in Computer Engineering
           •   Christos Ttofis, 2008-2009, “An FPGA Implementation of a 16-core processor for
               Embedded and Mobile Applications”, Best Senior Design Project in Computer Engineering,
               co-advised with Maria K. Michael
           •   Stavros Hadjitheofanous 2008-2009, “Stereoscopic 3-D Reconstruction on FPGAs”
           •   George Touloupos, 2009-2010, “Runtime Resource Allocation in Large-Scale on-chip
               Multicore Systems”, co-advised with Maria K. Michael.

Research Activities
       Embedded and Application Specific Systems-on-Chip Laboratory (Director)
       http://www.ece.ucy.ac.cy/labs/easoc/index.html

       Research activities
          • Image Processing and Computer Vision hardware architectures
          • FPGA implementations of classification and pattern recognition algorithms
          • System Level, on-chip, dynamic optimization of Manycore/Multicore Architectures
          • Wireless and Mobile SoC architectures
          • Methodologies and architectures for autonomous, self-healing Systems-on-Chip
          • Simulation and evaluation tools and methodologies for MPSoCs and ASICs
          • Bioinformatics on reconfigurable hardware
          • Automotive applications (obstacle avoidance and collision detection algorithms)

       Funded Proposals (total funding received as PI for UCY: ~ € 500,000)

           • “SAFEMETAL: Increasing EU Citizen security by utilizing innovative intelligent signal
               processing systems for Euro-coin validation and metal quality testing”, 2011-2013,
               Research for the benefit of SMEs, 7th Framework Program, EU, UCY’s Principal
               Investigator, €1,252,484
               (~€260,000 to UCY)
                   o Proposal Successfully Evaluated, Currently in Negotiation with EU, Estimated Start
                       Date: December 2010. Collaborators include:
                           • Ardoran (Coordinator), Tallinn University of Technology, Metrosert,
                               Electronics Design – Estonia
                           • Algosystems, Tellecommunications Systems Institute – Greece
                           • Sciensoria – France
                           • Dunvegan Systems – United Kingdom
                           • Riga Technical University – Latvia
           • “KIOS Research Center for Intelligent Systems and Networks”, 2010 – 2015, Cyprus
               Research Promotion Foundation, Research Partner (with M. Polycarpou, C. Panayiotou,
               G. Ellinas, E. Kyriakides, C. Pitris, M. Michael, C. Hadjicostis and J. Georgiou),
               €1,100,000.
           • “Validation of Distributed Collaboration for Chip Multi-Processors”, 2006-2007, Intel
               Corporation (Microprocessor Technology Labs, CA-USA), Co-Investigator with M.
               Polycarpou and M. K. Michael, $25,000 (€ 19,938).




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Curriculum Vitae                                                                   Theocharis Theocharides



           • “Energy Efficient Embedded and Mobile Multiprocessor System-on-Chip Architectures”,
               2008-2010, Cyprus Research Promotion Foundation, Principal Investigator, €130,000.
                  o Collaboration with Cyprus University of Technology and Signal Generix Ltd.
           • “A Simulation and Evaluation Framework for Manycore Architectures”, 2008-2010, Cyprus
               Research Promotion Foundation, Principal Investigator, €90,000.
                  o Collaboration with Cyprus University of Technology
           • “Designing Reliable Next Generation Manycore Architectures”, Research Partner (PI: M. K.
               Michael), Cyprus Research Promotion Foundation, €130,000.
           • “Embedded and Application-Specific Systems on Chip Laboratory”, 2009-2010, Principal
               Investigator, University of Cyprus Internal Research Funds, Start-Up Fund, €84,000.

Publications
   Book Chapters

   B1. T. Theocharides, G. Link, N. Vijaykrishnan, M. J. Irwin, “Networks on Chip: Interconnects for
       Next Generation Systems on Chip”, in Advances in Computers, Vol. 63, Kluwer-Elsevier
       Publishing, Netherlands, 2005, pp. 35-89.
   B2. T. Theocharides, C. Nicopoulos, K. Irick, N. Vijaykrishnan and M. J. Irwin, “An Exploration of
       Hardware Architectures for Face Detection”, in the VLSI Handbook of Signal Processing, 2006.

   Refereed Journal Publications

   J1. C. Kyrkou and T. Theocharides, “A Flexible Parallel Hardware Architecture for
       AdaBoost-based Real-Time Object Detection”, IEEE Transactions on VLSI Systems, to appear,
       published online (IEEE Xplore) May 2010, pp. 1-14.
   J2. C. Kyrkou, and T. Theocharides, "SCoPE: Towards a Systolic Array for SVM Object
       Detection," IEEE Embedded System Letters, vol. 1, no. 2, August 2009, pp. 46-49.
   J3. S. Murali, T. Theocharides, L. Benini, G. De Micheli, N. Vijaykrishnan and M. J. Irwin, “Analysis of
       Error Recovery Schemes for Networks on Chip”, IEEE Design and Test of Computers, Sp.
       Issue on Networks on Chips, Volume 22, Issue 5, Sept.-Oct. 2005 Page(s):434 – 442.

   Publications in Refereed Conference and Workshop Proceedings
       Acceptance rates shown where available.

   C1. C. Ttofis, A. Papadopoulos, T. Theocharides and M.K. Michael, “A Reconfigurable MPSoC-based
      QAM Modulation Architecture”, accepted in the Proceedings of the 18th VLSI-SoC Conference,
      September 2010, to appear. (Acceptance rate: ~40%)
   C2. E. Kakoulli, V. Soteriou and T. Theocharides, “An Artificial Neural Network-Based Hotspot
      Prediction Mechanism for NoCs", to appear in the Proceedings of the IEEE Computer Society
      Annual Symposium on VLSI Design (ISVLSI'10), Kefallinia, Greece, July 2010. (Acceptance rate:
      ~35%)
   C3. S. Hadjitheophanous, C. Ttofis, A. S. Georghiades, and T. Theocharides, "Towards Hardware
      Stereoscopic 3D Reconstruction: A Real-Time FPGA Computation of the Disparity Map," in
      the Proceedings of the Design, Automation and Test in Europe Conference and Exhibition (DATE
      2010), Dresden, Germany, 2010, pp. 1743-1748. (Acceptance rate: 27%)
   C4. C Ttofis, C. Kyrkou, T. Theocharides and M. K. Michael, "FPGA-Based NoC-Driven Sequence
      of Lab Assignments for Manycore Systems", in the Proceedings of the IEEE International
      Conference on Microelectronic Systems Education (MSE 2009), San Francisco, USA, July, 2009.
      Best Paper Award. (Acceptance rate: ~35%)


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Curriculum Vitae                                                              Theocharis Theocharides



   C5. T. Theocharides, M. K. Michael, M. Polycarpou and A. Dingankar, "Towards Embedded
      Runtime System Level Optimization for MPSoCs: On-Chip Task Allocation," in the Proc. of
      the IEEE/ACM Great Lakes Symposium on VLSI Design, Boston, MA, 2009. (Acceptance rate:
      16%)
   C6. C. Ttofis, T. Theocharides, "A C++ Simulator for Evaluating NoC Communication
      Backbones", Proceedings of the 3rd Greek National Student Conference of Electrical and
      Computer Engineering, Thessaloniki, Greece, April 2009.
   C7. C. Kyrkou, T. Theocharides, "Neural Network-Based Face Detector Implementation on a
      Virtex2 Pro FPGA Platform," Proceedings of the 3rd Greek National Student Conference of
      Electrical and Computer Engineering, Thessaloniki, Greece, April 2009.
   C8. T. Theocharides, M. K. Michael and M. Polycarpou and A. Dingankar, “Dynamic Resource
      Allocation in Manycore Architectures”, HiPEAC Industrial Workshop, Paris, France, November
      2008.
   C9. T. Theocharides, M. K. Michael, M. Polycarpou and A. Dingankar, “A Novel System-Level
      On-Chip Resource Allocation Method for Manycore Architectures”, in the Proc. of the IEEE
      Computer Society Annual Symposium for VLSI Design (ISVLSI), Montpellier, France, April 2008,
      pp. 99-104. (Acceptance rate: ~30%)
   C10. T. Theocharides, N. Vijaykrishnan and M. J. Irwin, “A Parallel Architecture for Hardware Face
      Detection”, Proc. of the IEEE Computer Society Annual Symposium on Emerging VLSI
      Technologies and Architectures, March 2006 Page(s):452 – 453. (Acceptance rate: ~42%)
   C11. J. M. Kim, D. Park, T. Theocharides, N. Vijaykrishnan and C. R. Das, “A Low-Latency Router
      Supporting Adaptivity for On-Chip Interconnects”, in the Proc. of the 42nd Design Automation
      Conference, Anaheim, CA, June 2005, pp. 559-564. (Acceptance rate: ~21%)
   C12. W. Hung, C. Addo-Quaye, T. Theocharides, Y. Xie, N. Vijaykrishnan and M. J. Irwin, “Thermal
      Aware Floorplanning Using Genetic Algorithms” , Proc. of the International Symposium on
      Quality of Electronic Design, March 2005, pp. 634-639. (Acceptance rate: ~37%)
   C13. T. Theocharides, G. Link, N. Vijaykrishnan, M. J. Irwin, “Implementing LDPC Decoding on a
      Network-on-Chip”, Proc. of the International Conference on VLSI Design, January 2005, pp.
      134-137. (Acceptance rate: ~28%)
   C14. W. Hung, C. Addo-Quaye, T. Theocharides, Y. Xie, N. Vijaykrishnan and M. J. Irwin, “Thermal
      Aware Placement for NoC Architectures” , Proc. of the International Conference on Computer
      Design, September 2004, pp. 430-437. (Acceptance rate: ~28%)
   C15. B. Kang, N. Vijaykrishnan, M. J. Irwin and T. Theocharides, “Power-Efficient Implementation
      for Turbo Decoder in SDR System”, Proc. of the IEEE System on Chip Conference, September
      2004, pp. 119-122. (Acceptance rate: ~37%)
   C16. Y. Tsai, A. Ankadi, N. Vijaykrishnan, M. J. Irwin, T. Theocharides, “ChipPower:
      Architecture-Level leakage simulator”, Proc. of the IEEE System on Chip Conference,
      September 2004, pp.395-398. (Acceptance rate: ~37%)
   C17. T. Theocharides, G. Link, N. Vijaykrishnan, M. J. Irwin, V. Srikantam, “A Generic
      Reconfigurable Neural Network Architecture implemented as a Network on Chip”, Proc. of
      the IEEE International System on Chip Conference, September 2004, pp.191-194. (Acceptance
      rate: ~37%)
   C18. T. Theocharides, G. Link, E. Swankonski, N. Vijaykrishnan and M. J. Irwin, “Evaluating
      Alternative Implementations for LDPC Decoder Check Node Function”, Proc. of the IEEE
      Computer Society Annual Symposium on VLSI Design , February 2004, pp. 77-82. (Acceptance
      rate: ~25%)
   C19. T. Theocharides, G. Link, N. Vijaykrishnan, M. J. Irwin, W. Wolf, “Embedded Software Face
      Detection”, Proc. of the International Conference on VLSI Design, January 2004, pp. 133-138.
      (Acceptance rate: ~28%)




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Curriculum Vitae                                                              Theocharis Theocharides




   Invited Papers

   I1. K. Irick, T. Theocharides, N. Vijaykrishnan and M. J. Irwin, “Hardware Architectures for Face
       Detection”, Invited Paper in the Proc. of the 40th Asilomar Conference on Signals, Systems and
       Computers, Monterey, CA, October 2006.

   Non-Refereed Conference and Workshop Proceedings

   NR1. C. Ttofis, T. Theocharides and C. Panayiotou, “A Case Study on a Parallel NoC-based QAM
     Decoder”, in the 2nd Cyprus Workshop on Signal Processing and Informatics, July 2009
   NR2. C. Kyrkou and T. Theocharides, “SCoPE: Towards a Systolic Array for SVM Object Detection”,
     in the 2nd Cyprus Workshop on Signal Processing and Informatics, July 2009


   Conference Presentations and Invited Talks

   P1. “Fault-Tolerant Algorithms for Network-On-Chip Interconnect”, March 2004, GSRC
      Workshop, IBM T.J. Watson Center, Yorktown Heights, NY.
   P2. “A Generic Reconfigurable Neural Network Architecture implemented as a Network on
      Chip”, September 2004, IEEE System-on-Chip Conference, Santa Clara, CA.
   P3. “Power-Efficient Implementation for Turbo Decoder in SDR System”, September 2004, IEEE
      System-on-Chip Conference, Santa Clara, CA.
   P4. “Hotspot avoidance through process migration for NoC Designs”, September 2004, GSRC
      Workshop, Santa Clara, CA.
   P5. “Analysis of Error Recovery Schemes for Networks on Chip”, June 2005, GSRC Workshop,
      Anaheim, CA.
   P6. “A Low-Latency Router Supporting Adaptivity for On-Chip Interconnects”, June 2005,
      Design Automation Conference (DAC), Anaheim, CA.
   P7. “Development of a FPGA Prototype for Hardware Face Detection”, Technology Collaborative
       Workshop, November 2005.
   P8. “Networks on Chip – Interconnection Networks for the Next Generation Systems on Chip”,
       University of Cyprus, Electrical and Computer Engineering Seminar Series, January 2006.
   P9. “Advances in Hardware Face Detection and Recognition”, University of Cyprus, Electrical and
       Computer Engineering Seminar Series, April 2006.
   P10. “Dynamic System Level Resource Allocation for Manycore Architectures”, University of
       Cyprus, Electrical and Computer Engineering Seminar Series, December 2007.
   P11. “A Novel System-Level On-Chip Resource Allocation Method for Manycore Architectures”,
       April 2008, ISVLSI, Montpellier, France.
   P12. “Dynamic Resource Allocation in Manycore Architectures”, HiPEAC Industrial Workshop
       2008, Paris, France, November 2008.
   P13. “Towards Embedded Runtime System Level Optimization for MPSoCs: On-Chip Task
       Allocation”, May 2009, GLSVLSI, Boston, MA.
   P14. “An Artificial Neural Network Hotspot Predictor for NoCs”, July 2010, ISVLSI’10, Kefallinia,
       Greece.

Professional Activities
    Memberships and Affiliations



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Curriculum Vitae                                                              Theocharis Theocharides



       •   IEEE Member, 2006 – Present
       •   IEEE Computer Society Member, 2007-Present
       •   High Performance Embedded Architectures and Compilation, HiPEAC Network of Excellence,
           Member, 2009 – Present (Affiliate Member 2006-2009).
       •   IEEE Student Member, 1999 – 2005
       •   IEEE Computer Society Student Member, 1999-2002.
       •   Student Member of Gigascale Systems Research Center, http://www.gigascale.org.


   Professional Service

   Organizational and Chair Activities
      • Co-Organizer of the Annual HiPEAC Workshop on Design for Reliability, serves on the Technical
      Program Committee and Organizing Committee. Program Co-chair for 2009, 2010 and 2011
      workshops.
      • Session Chair Activities
             o      ISVLSI’10, Kefallonia, Greece, July 2010.

   Editorial Activities
      • ACM Journal of Emerging Technologies in Computing Systems, Information Director,
      2010-Present




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Curriculum Vitae                                                               Theocharis Theocharides



   Organizing and Technical Program Committee Memberships
      • Organizing Committee Member for IEEE Annual Great Lakes VLSI Symposium, 2008-Present.
      • Organizing Committee Member for IEEE Computer Society Annual Symposium on VLSI, 2009.
      • Technical Program Committee Member:
         o Design, Automation and Test in Europe (DATE), 2010-Present.
         o IEEE Annual Great Lakes VLSI Symposium, 2008-Present.
         o IEEE Computer Society Annual Symposium on VLSI, 2009-Present.
         o Symposium on Integrated Circuits and Systems Design, SBCCI 2010 - Present.
         o Valuetools 2008

   Manuscript Reviewer
     • IEEE Transactions on VLSI (TVLSI).
     • IEEE Transactions on Computer Aided Design (TCAD).
     • IEEE Transactions on Circuits and Systems for Video Technology.
     • IEEE Transactions on Computers.
     • IEEE Embedded Systems Letters.
     • EURASIP Journal of Electronic Imaging.
     • EURASIP Journal of Embedded Systems.
     • Integration, the VLSI Journal, Elsevier.
     • Journal of Parallel and Distributed Systems, Elsevier.
     • Journal of Computer Architecture, Elsevier.
     • Microprocessors and Microsystems, Elsevier.
     • Reviewer for numerous IEEE/ACM conferences (DAC, DATE, GLSVLSI, VLSID, ISCA,
        MICRO, ISVLSI)

Fellowships, Honors and Awards and Professional Achievements
    Awards
       •   Best Paper Award, IEEE Microelectronics Systems in Education (MSE) Conference, July
           2009.
       •   Recipient of the Robert M. Owens Memorial Scholarship for exceptional graduate research
           work, in the Department of Computer Science & Engineering, Penn State University, 2005.
       •   Recipient of Lockheed Martin’s Design Excellence Award for Senior Project Design awarded to
           the best Senior Project, Penn State University, 2001
       •   Recipient of the DAC Young Scholar Award for attending the Design Automation Conference in
           2002.
       •   Recipient of Cyprus – America Scholarship Program’s (Fulbright) Full Scholarship, 1998 –
           2002.
       •   Recipient of Penn State University Office of International Programs Award, 2000.

    Student Awards
       •   Christos Ttofis and Christos Kyrkou, Best Paper Award, IEEE Microelectronics Systems in
           Education (MSE) Conference, July 2009.
       •   Christos Kyrkou, Best Senior Project Design in Computer Engineering, 2008.
       •   Christos Ttofis, Best Senior Project Design in Computer Engineering, 2009.

    Professional Certifications
       • Recipient of the Pittsburgh Digital Greenhouse Certificate in System-on-Chip Design,
          2005


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Curriculum Vitae                                                                  Theocharis Theocharides




Academic and Departmental Service
   •   Co-Organized the 3rd Annual Texnopleysi Contest directed towards high-school and technical
       school students in 2008 and the 2007 ECE Department Open Day event.
   •   Co-Organized the 1st and 2nd Summer School on Computing, June 23rd-27th 2008 and June 22nd
       -23rd 2009, held in collaboration with the department of Computer Science and sponsored by IEEE
       Cyprus Section.
   •   Departmental Committee of Information Technology and Website – President
   •   Departmental Committee of Undergraduate Affairs – Member
           o Computer engineering curriculum matters
   •   Supervised 15 undergraduate senior students in their Senior Design Project (until 2010)
University Service
   •   Representative of Engineering School in the Executive Council of the Center of Teaching and
       Learning, Aug. 2009- Present
   •   Tender Evaluation Committee for Personal Computer University Purchases - 2008
   •   Instructor - Center for Teaching and Learning Lecture Series for University Faculty, Students and
       Staff
           o Effective Report Writing Techniques, Fall 2007
           o Technical Power Point Presentations, Spring 2008


Former Professional and Academic Experience
       January 2006 – November 2006
       Visiting Lecturer, Department of Electrical and Computer Engineering (ECE), University of
       Cyprus

       Teaching Experience
          • Course Instructor for the Computer Architecture course and the FPGA Design Course
       Research Activities
          • Chip multiprocessor architectures for reliability and performance, using distributed
             collaboration concepts.

       August 2002 – December 2005
       Graduate Research and Teaching Assistant, Dept. of Computer Science and Engineering,
       Penn State University, Member of the Embedded and Mobile Computing Design Center.

               Research Experience
               Thesis-Related Research:
                  • Research in energy efficiency and reliability of SoC architectures.
                  • Research in developing embedded processors for multimedia applications and
                      computer vision applications, related to security and control systems.
               Proposals Funded:
                  • “Embedded Hardware Face Detection and Classification”, funded by the
                      Technology Collaborative, (http://www.techcollaborative.org/), in collaboration with
                      VideoMining Solutions, http://www.videomining.com/ formerly known as Advanced
                      Interfaces Inc.


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Curriculum Vitae                                                                 Theocharis Theocharides




               Teaching Experience
                  • Lecturer and Teaching Assistant for the Advanced VLSI Design Course (Graduate
                     Level)
                  • Instructor for the Introductory Digital Circuit Design Lab (Undergraduate Level)
                  • Teaching Assistant for the Senior Microcomputer Design Lab (Undergraduate
                     Level)
                  • Teaching Assistant for the FPGA/Rapid Prototyping Design Course (Undergraduate
                     Level)
                  • Teaching Assistant and Instructor for the Functional Verification Course
                     (Undergraduate/Graduate Level)

       August 1998 – July 2002
       Computer Lab Consultant and Supervisor, Information Technology Services, Penn State
       University
                  • Provided technical assistance to Penn State students, faculty and staff, towards
                      hardware and software troubleshooting.
                  • Lectured in Various Seminars and Webminars, (Topics in both Hardware and
                      Software)
                  • Assisted with development of various tutorials and brochures aimed at informing
                      Students, Faculty and Staff about the use of Hardware, Software and Operating
                      Systems at Penn State.
                  • Trained and supervised junior lab consultants
       August 1996 – July 1998
       Military Service
                  • Attended Reserve Officer Military Academy in Athens, Greece. Served as a Reserve
                      Officer specialized in Military Battle tanks. Served as Tank Platoon Commander
                      (responsible for four tanks and crew). Currently a Reserve Officer with the rank of
                      2nd Lieutenant.

       June 1994 – August 1996
       Intern, NCR Cyprus
                 • Helped with servicing Automated Teller Machines and Payment Terminals in Gas
                    Stations
                 • Helped in developing accounting and database software




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