QualComm_ IMEC 3D release by jlhd32

VIEWS: 1,967 PAGES: 5

More Info
									NE WS RELEA SE


              Javelin Design Automation And IMEC
  Extend Javelin PathFinding Design Technology For 3D Stacked
                              ICs
                      j360 Silicon PathFinder™ 3D Platform Supports
       3D Stacked IC Design using Through Silicon Vias (TSV), with ThreeDimensional
                   Floorplanning Capabilities and up Ten Tiers of Silicon



SARATOGA, California and Leuven, Belgium – February 16, 2008 – Javelin Design Automation,
the leading provider of PathFinding solutions, announces a revolutionary solution for the rapid design
exploration and optimization of three dimensional stacked ICs (3D SIC). Developed in close
collaboration with IMEC, Europe's leading independent nanoelectronics research center, and
Qualcomm, a partner in IMEC’s 3D integration program, 3D PathFinding extends the Javelin
PathFinding methodology and j360 Silicon PathFinder™ platform to support virtual chip design for
co-optimization of system design and 3D interconnect-packaging technologies. Designers of 3D ICs
are now empowered to rapidly explore many potential 3D design implementations for their technical
value propositions, and to identify and mitigate risks-benefits and optimize value.


3D SIC design is an emerging and rapidly adopted methodology for advanced semiconductor
companies. To support PathFinding for 3D technologies, the joint team developed a detailed 3D flow
that provides accurate performance/power/cost estimates for a 3D stack. With turnaround times of a
few hours or days, designers can evaluate and optimize their system and micro-architecture to best
exploit 3D technology options; and silicon process engineers can fine-tune their technology to the
system architecture specs. This 3D PathFinding leverages Javelin’s newly announced j360 Silicon
Pathfinder™ platform with enhanced PathFinding technology for fast physical design prototyping of
multi-stack silicon.


Pol Marchal, principal scientist of IMEC, stated, “Javelin’s Silicon PathFinder™ 3D allows us to assess
the impact of various 3D interconnect strategies throughout the IC design and fabrication process,
and to adapt our technology to our partners’ specs.”
“We validated and used the PathFinding flow on an IMEC 3D case-study to quantify how various
implementations of 3D interconnect technologies resolve the DDR2 DRAM bottleneck in an AVC
H.264 encoder to achieve HD1080 quality for smart-phone applications,” said Roger Carpenter, CTO
of Javelin. “The PathFinding results indicate close to 10 times decrease in dynamic interconnect
power of the IO interface using 3D interconnect technologies, subsequently allowing the bus-width
to increase by 16 times in 3D implementation, without exceeding the power of the original SIP
implementation. This sample design case shows how TSV technology can remove the bottleneck
between processor and memory”.


"We believe PathFinding is critical to the success of 3D integration technology and we are excited to
work with Javelin in this area;" said Luc Van den hove, chief operation officer at IMEC. "We are
confident that strong industry collaboration among foundries, IDMs, fables companies, EDA vendors,
packaging and assembly companies, and equipment suppliers within our 3D integration research
program at IMEC will advance the development of innovative 3D products."


"Three-dimensional design will allow Qualcomm to offer superior features and performance in our
products;" said Jim Clifford, senior VP and general manager, Qualcomm CDMA technologies.


“Customers with high-volume applications drive standardization and cost-effectiveness of innovative
technologies;” said Diana Feng Raggett, CEO and co-founder of Javelin. “Javelin is pleased to be
working collaboratively with Qualcomm and IMEC to accelerate the use and deployment of such
disruptive, innovative technologies, and to provide a design methodology and commercial design
platform that also enables other standards-based specialized tools to contribute to a full solution
faster than ever before.”
                                               ---ends---


About Javelin Design Automation
Javelin is the leading provider of PathFinding solutions for the co-optimization of architecture, RTL
and Physical design that enable the development of innovative Systems-in-Silicon Semiconductor
solutions. Javelin specializes in improving design efficiency and reducing design iterations, chip re-
spins or false starts by early physical prototyping. Its j360 TrueFit™, TruePlan™, TruePro™ and
Silicon Pathfinder™ 2D and 3D products are used by some of the worlds most advanced SOC design
teams. Headquartered in California, the company has development operations in Silicon Valley and
Ottawa, Canada as well as sales in Asia, Japan and the USA. To learn more, please visit
http://www.javelin-da.com.


About IMEC
                                              Page 2 of 5
IMEC is a world-leading independent research center in nanoelectronics and nanotechnology. IMEC
vzw is headquartered in Leuven, Belgium, has a sister company in the Netherlands, IMEC-NL, offices
in the US, China and Taiwan, and representatives in Japan. Its staff of more than 1600 people
includes more than 500 industrial residents and guest researchers. In 2008, its revenue (P&L) was
estimated EUR 262 million.


IMEC's More Moore research aims at semiconductor scaling towards sub-32nm nodes. With its More
than Moore research, IMEC looks into technologies for nomadic embedded systems, wireless
autonomous transducer solutions, biomedical electronics, photovoltaics, organic electronics and GaN
power electronics.


IMEC's research bridges the gap between fundamental research at universities and technology
development in industry. Its unique balance of processing and system know-how, intellectual
property portfolio, state-of-the-art infrastructure and its strong network worldwide position IMEC as
a key partner for shaping technologies for future systems. Further information on IMEC can be found
at www.imec.be.


For more information:
Javelin: Francine Bacchini, T: +1.408.267.6602 - francine@franbinc.com
IMEC: Katrien Marent, Director of External Communications, T: +32 16 28 18 80, Mobile : +32 474
30 28 66, katrien.marent@imec.be



#             #              #
Javelin and its logo are registered trademarks of Javelin Design Automation, Inc. All other company
or product names are the registered trademarks or trademarks of their respective owners.




                                             Page 3 of 5
PathFinding – performing virtual chip design to fine-tune technology and adapt system design to
physical-design realities of 3D technology.




The PathFinding flow – from system design to GDSII in no time.




                                              Page 4 of 5
Comparison of 3D stacked DRAM power for various 3D integration options and different applications.




                                           Page 5 of 5

								
To top