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Basics of Computer Memory

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					COMPUTER MEMORY
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    Historically, the limiting factor in a computer’s performance has been memory access time

            –   Memory speed has been slow compared to the speed of the processor

            –   A process could be bottlenecked by the memory system’s inability to “keep up” with the
                processor

    Our goal is to study the development of an effective memory organization that supports the
     processing power of the CPU

            –   General memory organization and performance

            –   “Internal” memory components and their use

            –   “External”memory components and their use

Terminology
    Capacity: the amount of information that can be contained in a memory unit-- usually in terms
     of words or bytes

    word: the natural unit of organization in the memory, typically the number of bits used to
     represent a number

    Addressable unit: the fundamental data element size that can be addressed in the memory--
     typically either the word size or individual bytes

    Unit of transfer: the number of data elements transferred at a time-- usually bits in main
     memory and blocks in secondary memory

    Transfer rate: rate at which data is transferred to/ from the memory device

Access Time

    For RAM, the time to address the unit and perform the transfer

    For non-random access memory, the time to position the R/W head over the desired location

Memory Cycle Time

    Access time plus any other time required before a second access can be started.

Access Techniques


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 Random Access:

       –   Each location has a unique physical address

       –   Locations can be accessed in any order and all access times are the same

       –   What we term “RAM” is more aptly called read/write memory since this access
           technique also applies to ROMs as well

       –   Example: Main memory

 Sequential Access:

       –   Data does not have a unique address

       –   Must read all data items in sequence until the desired item is found

       –   Access times are highly variable

       –   Example: tape drive units

 Direct Access:

       –   Data items have unique addresses

       –   Access is done using a combination of moving to a general memory “ area” followed by
           a sequential access to reach the desired data item

       –   Example : disk drives

 Associative Access:

       –   A variation of random access memory

       –   Data items are accessed based on their contents rather than their actual location

       –   Search all data items in parallel for a match to a given search pattern

       –   All memory locations searched in parallel without regard to the size of the memory

                Extremely fast for large memory sizes

       –   Cost per bit is 15-10 times that of a “normal” RAM cell

       –   Example : some cache memory units

 The memory of hierarchy works because of locality of reference

       –   Memory references made by the processor, for both instructions and data, tend to
           cluster together

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                    Instruction loops, subroutines

                    Data arrays, tables

           –   Keep these clusters in high speed memory to reduce the average delay in accessing data

           –   Over time, the clusters being referenced will change– memory management must deal
               with this

Memory Hierarchy

    Major design objective of any memory system

           –   To provide adequate storage capacity at

           –   An acceptable level of performance

           –   At a reasonable cost

Four interrelated ways to meet this goal

    Use a hierarchy of storage devices

    Develop automatic space allocation methods for efficient use of the memory

    Through the use of virtual memory techniques, free the user from memory management tasks

    Design the memory and its related interconnection structure so that the processor can operate
     at or near its maximum rate

Basis of the memory hierarchy

    Registers internal to the CPU for temporary data storage for data processing ( small in number
     but very fast )

    External storage for data and programs (relatively large and fast)

    External permanent storage (much larger and much slower)

Characteristics of the memory hierarchy

    Consists of distinct “levels” of memory components

    Each level characterized by its size, access time, and cost per bit

    Each increasing level in the hierarchy consists of the modules of larger capacity, slower access
     time, and lower cost/bits

Goal of the memory hierarchy


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    Try to match the processor speed with the rate of information transfer from the lowest element
     in the hierarchy

The Memory Hierarchy




Memory Hierarchy Design (1)




                                                4
Memory Hierarchy Design (2)


    Registers          Cache (one or           Main               Disk
     (CPU)              more levels)          Memory             Storage


          Specialized bus        Memory bus            I/O bus
        (internal or external
              to CPU)

Typical Memory Parameters

                  Memory           Technology             Size             Access Time
                   Type
                   Cache          Semiconduct          128-512KB              10 ns
                                    or RAM
                   Main           Semiconduct          4-128MB                50 ns
                 Memory             or RAM
                 Magnetic          Hard Disk           Gigabyte             10 ms, 10
                   Disk                                                      MB/sec
                Optical Disk           CD-ROM          Gigabyte            300 ms, 600
                                                                             KB/sec
                  Magnetic              tape            100sMB              Sec-min,
                   tape                                                    10MB/min
                                                  5
Main Memory

     Core Memory

            –   Used in generations 2 and 3

            –   Magnetic cores used to store logical 0 or 1 state by inducing an E-field in them
                (hysteretic loop)

                     1 core= 1 bit of storage

            –   Required addressing and sensing wires ran through each core destructive readout

            –   Obsolete

                     Replaced in the 1970s by semiconductor memory

     Semiconductor memory

            –   Typical random access

            –   RAM: actually read-write memory

            –   Volatile

            –   Temporary storage

            –   Static or dynamic

Dynamic RAM

Bits stored as charge in capacitors

     Charges leak

     Need refreshing even when powered

     Simpler construction

     Smaller per bit

     Less expensive

     Need refresh circuits

     Slower

     Main memory

     Very high packaging density

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    Essentially analogue

             –   Level of charge determines value

Static RAM

    Bits stored as on/off switches

    No charges to leak

    No refreshing needed when powered

    More complex construction

    Larger per bit

    More expensive

    Does not need refresh circuits

    Faster

    Cache

    Digital

             –   Uses flip-flops

SRAM v DRAM

    Both volatile

             –   Power needed to preserve data

    Dynamic cell

             –   Simpler to build, smaller

             –   More dense

             –   Less expensive

             –   Needs refresh

             –   Larger memory units

    Static

             –   Faster



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          –   Cache

Read Only Memories (ROM)

    “Permanent” data storage

    ROMs

          –   Data is “wired in” during fabrication at a chip manufacturer’s plant

          –   Purchased in lots of 10k or more

    PROMs

          –   Programmable ROM

          –   Data can be written once by the user employing a PROM programmer

          –   Useful for small production runs

    EPROM

          –   Erasable PROM

          –   Programming is similar to a PROM

          –   Can be erased by exposing to UV light

    EEPROMS

          –   Electrically erasable PROMs

          –   Can be written to many times while remaining in a system

          –   Does not have to be erased first

          –   Program individual bytes

          –   Writes require several hundred usec per byte

          –   Used in systems for development, personalization, and other tasks requiring unique
              information to be stored

    Flash Memory

          –   Similar to EEPROM in using electrical erase

          –   Fast erasures, block erasures

          –   Higher density than EEPROM

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    Improvement to DRAM

           –   Basic DRAM design has not changed much since its development in the 70s

           –   Cache was introduced to improve performance

                    Limited to no gain in performance after a certain amount of cache is
                     implemented

           –   Enhanced DRAM

                    Add fast 1-line SRAM cache to DRAM chip

                    Consecutive reads to the same line are from this cache and thus faster than the
                     DRAM itself

                    Tests indicate these chips can perform as well as tradition DRAM-cache
                     combinations

           –   Cache DRAM

                    Use larger SRAM cache on the chip as a true multi-line cache

                    Use it to a serial data stream buffer for block data transfer

Error Correction

    Semiconductor memories are subject to errors

           –   Hard (permanent) errors

                    Environmental abuse

                    Manufacturing defects

                    wear

           –   Soft (transient) errors

                    Power supply problems

                    Alpha particles

                           –    Problematic as feature sizes shrink

           –   Memory systems include logic to detect and/or correct errors

                    Width of memory word is increased

                    Additional bits are parity bits

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 Number of parity bits required depends on the level of detection and correction
  needed




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Description: Basics of computer memory, how its created and used