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									Faraday Technology
Corporation

                     Excel Your Idea to Silicon




    Your Virtual Design Center
                              2005 Q3




Table of Contents
 About Faraday
 Technology Roadmaps
 Quality Assurance
 ASIC Design Services
 IP Solutions
 Heading for the Future




                          2
About Faraday
          Excel Your Idea to Silicon
                                                                                          2005 Q3




A Brief Introduction
Faraday Technology Corporation, headquartered in
Taiwan, provides design and silicon solutions that enrich
product competitiveness and innovation


Faraday offers:
                                                   Platform



                            Consulting
                            IP Service
    ASIC Design Services




                                                                        Design Services
                                           IP                 Library

                                           SoC Design Methodology
    SoC Design Services                             Mask
                            Operations
                            Production



                                         Foundry (UMC Strong Support)

    Proven IP Solutions                      Assembly and Testing
                                                  Shipment




                                                                           4
                                                                              2005 Q3




Major Milestones 2005
2005


   Announced 0.18µm Ultra-High-Density Silicon IP platform – “ miniIP™”

   Unveiled the fastest Time-to-Market Structured ASIC for peripheral
   interface chips – “PeripheralComposer”

   Introduced industry's smallest USB2.0 PHY IP

   Announced low power dissipation platform solution – “PowerSlash™”




                                                                          5
                                                                                 2005 Q3




Major Milestones 2004
2004

       Introduced its first silicon-proven TFT LCD T-CON Platform “FT-300”

       Awarded “ The Most Outstanding Award of Industrial Technology
       Advancement” by MOEA, R.O.C.

       Announced its first generic platform “SoCreative!”

       Introduced a series of most integrated and application focus platforms,
       including Internet/Audio/Video/Wireless platforms.

       Awarded “ 2004 Technology Fast 500 in Asia Pacific” by DeloitteTouche
       Tohmatsu ("DTT").




                                                                             6
                                                                          2005 Q3




Major Milestones 2003
2003

       Launched the 2nd ARM based CPU core “ FA526 “

       Introduced USB OTG IP

       Introduced Structured ASIC technology “MPCA”
       Introduced its first SoC platform solution “IA-ComposerTM”
       Introduced 0.18µm IPs for “Serial ATA II PHY” and Controller




                                                                      7
                                                                                      2005 Q3




Major Milestones 2002 ~ 2000
2002

       Launched its first ARM based CPU Core “ FA510”
       Developed a full portfolio of comprehensive IPs for UMC 90nm process and
       beyond

2001


       Certified as “ ARM Design Center”
       Set up Europe & China office
       Introduced 0.13µm libraries for UMC process

2000


       Set up Japan office
       Awarded “The Best New Company of the Year” by Asia Money Magazine


                                                                                  8
                                                                                  2005 Q3




Major Milestones 1999 ~ 1993
1999

       Listed on Taiwan Security Exchange (TAIEX:3035)
        Awarded “Design Company with the Most Potential” by Business Weekly
       Magazine
1998
       Began providing world-class silicon Intellectual Properties (IPs)
1997
       ISO 9001 certified

1995

       Set up US office
1993

       Founded in Hsinchu Science Park, Taiwan

       The first fabless ASIC design service provider in Asia

                                                                              9
                                                 2005 Q3




Our Commitment

We are committed to providing reliable,
state-of-the-art technologies that keep a
step ahead of the ever-changing needs
of our customers




                                            10
                                                                                          2005 Q3




 Financial Achievements
                                                                       YoY= 33.9%
              6,000

                                                                       159 Million USD
              5,000



              4,000
Million NTD




              3,000



              2,000



              1,000



                 0
                      1997   1998   1999   2000   2001   2002   2003    2004



                                                                                     11
                                                   2005 Q3




Sales Breakdown by Billing Method
           2004                     2003
            IP                        IP
          11.2%                     13.6%
Design
Service
10.3%                     Design
                          Service
                          12.7%




                                             ASIC
                   ASIC                     73.7%
                  78.5%




                                              12
                                                                               2005 Q3




  Sales Breakdown by Geography
              2004                                 2003

      Korea    Europe                           Korea   Europe
       1.1%     2.6%    China                   0.8%     0.9% China
                        1.9%                Japan              2.6%
  Japan
                                            4.1%
  6.2%


 USA
                                          USA
14.2%
                                         26.3%




                                                                      Taiwan
                                                                      65.3%
                                Taiwan
                                 74%




                                                                          13
                                                        2005 Q3




Sales Breakdown by Customer Type

             2004                         2003

                             System
System                        House
House                        34.4%
35.3%


                    Design                       Design
                    House                        House
                    55.8%                        56.4%


                             Foundry
   Foundry
                              6.9%
    8.0%
              IDM                       IDM
             0.9%                      2.3%




                                                   14
                                                                                                    2005 Q3




   Sales Breakdown by Application
                   2004                                                  2003
                        Audio
                Image   0.7%
                 1.8%                                                    Image   Others
                                   Others                                5.1%    2.1%
                                   3.2%
      Consumer                                                                            Peripheral
        8.5%                                               Consumer
                                                                                           31.2%
                                                            13.8%
                                            Peripheral
                                             38.4%


    Video/                                                 Video/
    Display                                                Display
    12.2%
                                                            10%

Communication
   9.6%                                                  Communication
                                                            11%
                                                                                    Storage
                                                                                    26.8%
                         Storage
                         25.6%




                                                                                               15
                                                                                2005 Q3




Sales Breakdown by Technology
                 2004                              2003

         0.5µm    0.6µm                            0.6µm
                  1.1%    0.18µm                             0.18µm
         11.2%                                     2.5%
                          12.9%            0.5µm             10.8%
0.45µm                                     18.0%
 2.9%
                                                                      0.25µm
                                                                      17.3%

                                        0.45µm
                                         5.7%




                               0.25µm
                               43.6%
  0.35µm
  28.3%
                                                           0.35µm
                                                           45.7%




                                                                           16
                                                                                              2005 Q3




 Our Unique Market Position
                                                                    System Integration
                                                                    Design Methodology
                                                                    Production Management
                                                                    Quality Assurance




        Foundry         ASIC / SoC Design Services      System Companies
    Assembly Houses                                  Fabless IC Design Houses
     Testing Houses            IP Licensing                    IDMs




Library Porting
IP Verification
Testability
Production Management
Quality Assurance



                                                                                         17
                                                                  2005 Q3




Faraday-
Your Virtual Design Center

                  Integration Methodologies




  Competitive
  Specification   Virtual Design Center       Cost Control
    Analysis




                      Quality Assurance



                                                             18
Technology
Roadmap
             Excel Your Idea to Silicon
Technology Roadmap
-Structure ASIC & IP

             Excel Your Idea to Silicon
                                                                                                                                              2005 Q3




    Structured ASIC Family Roadmap
                                        90nm SP MPCA Library             90nm LL MPCA Library
                                                                                                                                          90nm
                                                        90nm SP MPIO                90nm LL MPIO
90nm                                                                                                                                     130nm

              130nm           130nm                                                                                                      0.15µm
              HS MPCA         HS MPIO
                                                                                                                                         0.18µm
              130nm             130nm             130nm MP-Ware multi RWRF      130nm MP-Ware ROM/FIFO                                   0.25/0.22
              LL MPCA           LL MPIO
                                                                                                                                         µm
              130nm            130nm              130nm TEMPLATE Producer II
              SP MPCA          SP MPIO

130nm         130nm TEMPLATE FIT9500              130nm Application Specific TEMPLATE

                                                                        New 130nm MPCA/MPIO
              0.15µm          0.15µm
0.15µm        SP MPCA         SP MPIO



              0.18µm          0.18µm
              GII MPCA        LL MPCA

              0.18µm          0.18µm
0.18µm        GII MPIO        LL MPIO


              0.25/
              0.22µm
0.25/0.22µm   MPIO

         2004-07         10     2005-01       4           7        10     2006-01       4            7          10      2007-01
                              Legend Description: Hvt: High Threshold Voltage               Note: The right edge of each block
                                                  SP : Standard Performance                 denotes the IP’s formal release date. For
                                                  LL :Low Leakage                           more details, please visit our website at:
                                                  MPCA:Metal Programmable Cell Array        www.faraday-tech.com
                                                  MPIO:Metal Programmable IO                                                             21
                                                  HS:High Speed
                                                                                                                                       2005 Q3




   Cell Library Roadmap
                                                                                                                             65nm
65nm                                                                           65nm SP/Low-K
                                                                                                                             90nm

                                                                             90nm SP-Hvt / Low-K                             130nm
                                                                                                                             0.15µm
                                          90nm LL-Rvt / Low-K
 90nm
                                                                                                                             0.18µm
                                  90nm SP-Rvt / Low-K


                                                         90nm SP-Hvt / Low-K




130nm        130nm L130E SP / FSG         130nm HS/ FSG PowerSlash




0.15µm            0.15µm SP


                            0.18µm GII miniLib
0.18µm                         0.18µm GII miniIO

         2004-7        10       2005-01     4        7          10       2006-01       4           7        10          2007-01

                         Legend Description:Rvt: Regular Threshold Voltage
                                                                                           Note: The right edge of each block denotes
                                            Hvt: High Threshold Voltage                    the IP’s formal release date. For more details,
                                            SP : Standard Performance                      please visit our website at:
                                            LL : Low Leakage                               www. faraday-tech. com
                                                                                                                                  22
                                                                                                                                        2005 Q3




        Memory Compiler Roadmap
65nm                                                                                                    65nm SP
                                                                                                                                   65nm

                                                         90nm LL-Rvt / Low-K                                                       90nm

                                                                       90nm SP-Rvt / Low-K UHS SP                                  130nm
                                                                                                                                   0.15µm
                                                       90nm SP-Rvt / Low-K
                                                                                                                                   0.18µm
90nm                                                                                         90nm SP-Hvt / Low-K


               130m L130E HS / FSG             130nm HS/FSG PowerSlash SP


              130m L130E Fusion / FSG                       130nm HS/FSG PowerSlash ROM


                   130nm L130E LL / FSG                              130nm HS/FSG PowerSlash DP


130nm              130nm L130E SP / FSG                                  130nm L130E HS / FSG Red. DP


                              0.15µm SP
0.15µm

         2004-07    10     2005-01        4        7          10     2006-01      4          7          10      2007-01

                            Legend Description:Rvt:Regular Threshold Voltage          Note: The right edge of each block
                                               HS: High Speed                         denotes the IP’s formal release date. For
                                               Hvt:High Threshold Voltage
                                                                                      more details, please visit our website at:
                                               SP :Standard Performance
                                               LL:Low Leakage
                                                                                      www. faraday-tech. com
                                                                                                                                   23
                                                                                                                                                  2005 Q3




      Analog Essential IP Roadmap
                                                                                90nmSP / FSG 1GHz PLL
                                                                                                                                          90nm
                                                                  130nm HS / FSG 400MHz PLL         90nm SP / FSG 2GHz PLL

                                                                     130nm HS / FSG 1GHz PLL                                              130nm

                                                               130nm HS / FSG 1.6GHz PLL                                                  0.15µm
                                                                    0.15µm 1.5V 300MHz PLL
PLL
                            130nm HS / FSG MiniPLL                                                                                        0.18µm
                                       0.18µm GII MiniPLL

REG                  0.18µm REG                            130nm REG                                 90nm REG
                                   0.15µm REG
POR / BG     0.18µm GII POR             130nm BG                           0.15µm POR               90nm BG

                                130nm HS / FSG 533Mb/s DLL                               90nm SP / FSG 800Mb/s DLL

             130nm HS / FSG 400Mb/s DLL              130nm HS / FSG Wide Range DLL

DLL                                   0.15µm 1.5V 400Mb/s DLL

PWM          0.18µm GII > 50mA PWM            130nm HS > 50mA PWM                                   90nm SP PWM

RC-OSC      0.18µm GII RC-OSC          130nm RC-OSC

VDT          0.18µm GII VDT                 130nm HS VDT          90nm SP / FSG RC-OSC                  90nm VDT
           2004-07     10        2005-01      4            7          10       2006-01       4      2006-07        10       2007-01



                                     Legend Description:    HS : High Speed                  Note: The right edge of each block
                                                            SP : Standard Performance        denotes the IP’s formal release date. For
                                                                                             more details, please visit our website at:
                                                                                             www. faraday-tech. com
                                                                                                                                            24
                                                                                                                                              2005 Q3




 Analog Data Conversion &
 Serial Link IP Roadmaps
                                   130nm 8-bit 125MHz ADC                                                                                130nm
                                                                 130nm 10-bit 40MHz ADC

ADC           0.25µm 6-bit 44MHz ADC                 0.18µm 10-bit 10Mhz ADC                                                             0.18µm
                               0.18µm 10-bit 80MHz ADC
                       130nm 12-bit 100MSPS DAC                                                                                          0.25µm
DAC                   0.18µm 8-bit 44MSPS DAC                      130nm 10-bit 40Mhz DAC
                                                                                                                                         0.35µm
              0.25µm 10-bit 150MSPS
              3-channel DAC
                           0.18µm 10-bit 150MSPS 3-channel DAC
3-channel
DAC                                     130nm 10-bit 150MSPS 3-chanel DAC
              0.25µm
              16-bit      0.25µm 18-bit
              Audio Codec Audio Codec

Sigma-Delta             0.18µm 16-bit Audio Codec               130nm Multi-bit Audio Codec
Codec                                               130nm 16-bit Audio Codec
                                          0.25µm RSDS
RSDS TX             0.35µm RSDS


                            0.25µm LVDS              0.18µm LVDS                                     130nm LVDS

LVDS                                      0.25µm mini                     0.18µm 1.8V
TX / RX         0.35µm LVDS               LVDS                            LVDS

          2004-07         10       2005-01      4            7           10    2006-01           4          7           10     2007-01


                                                                                         Note: The right edge of each block
                                                                                         denotes the IP’s formal release date. For
                                                                                         more details, please visit our website at:
                                                                                         www. faraday-tech. com
                                                                                                                                         25
                                                                                                                                            2005 Q3




   USB IP Roadmap
                 FPGA USB2.0 Host PIE                                                                                                90nm
                 FUSBH200
USB 2.0 Host                                                                                                                         130nm
                                                              FPGA USB2.0 2-port
Controller                                                  Host Controller FUSBH210
                                                                                                                                     0.18µm

USB 2.0 OTG      FPGA USB2.0 OTG                        FPGA USB2.0 OTG                                                              0.25µm
Controller       FOTG200                                FOTG210
                                                                                                                                     FPGA
USB2.0
                                 130nm USB 2.0 2-port PHY
2-port PHY

USB 2.0
                                                      0.18µm USB 2.0 Device PHY v36
Device PHY


                 0.25µm USB2.0                                                        90nm USB 2.0 OTG PHY
                 OTG PHY

                 130nm HS USB2.0                                130nm LL USB 2.0 PHY FZOTG230
USB 2.0 OTG      OTG PHY
                       *
PHY



               2004-07     10         2005-01     4            7          10           2006-01      4           7         10


                          Legend Description: HS:High Speed                             Note: The right edge of each block
                                              LL:Low Leakage                            denotes the IP’s formal release date. For
                                                                                        more details, please visit our website at:
                                                                                        www. faraday-tech. com                        26
                                                                                                                              2005 Q3




Serial-ATA IP & PCI Express IP &
Ethernet Roadmaps
              0.25µm10/100
                 Ethernet                                                                                            130nm
                   PHY
                                                                                                                     0.18µm
                                   0.18µm 10/100
10/100                              Ethernet PHY                                                                     0.25µm
Ethernet
                                                          130nm HS 10/100 Ethernet PHY                               FPGA
PHY
                                                 130nm 3Gbps SATA PHY
Serial-ATA                                                      130nm Multi-Port SATA PHY
PHY
                                                                             FPGA Serial-ATA Controller
Serial-ATA                                                                        With AHB I/F
Controller
                                                  0.18µm PCI Express PHY x 1 lane

                                               130nm PCI Express PHY x 1 lane
PCI Express
PHY                                                             130nm PCI Express PHY x 4 lane

PCI Express                       FPGA PCI Express Controller
Controller                             End-point (PIPE)

             2004-07        10       2005-01      4         7           10      2006-01        4          7


                       Legend Description:HS:High Speed                 Note: The right edge of each block denotes
                                                                        the IP’s formal release date. For more
                                                                        details, please visit our website at:
                                                                        www. faraday-tech. com                          27
                                                                                                 2005 Q3




Faraday StarCell™ IP
The list below is Faraday’s comprehensive portfolio of peripheral IPs
available right now:
   System Controllers                       Ancillary Peripheral
       AMBA System Controller                   UART/Fast IrDA Controller
       AHB to APB Bridge                        Timer
       DMA Controller                           Watchdog Timer
       PCI 33/66                                Real Time Clock
       LCD Controller                           Interrupt Controller
       TV Encoder                               KBD / Mouse Controller
   Memory Controller                            Synchronous Serial Port / I2S/AC97
       Static Memory Controller                 GPIO
       SDRAM Controller                         I2C Controller
       DDR Memory Controller                Standard Card Interface
   Data Transmission                            CF Host Controller
       10/100M Ethernet Controller              Memory Stick Host Controller
       10/100/1000 Ethernet Controller          Smart Media Host Controller
       USB Full/High Speed OTG Controller       SD/MMC Host Controller
       USB 1.1 Device Controller            Storage
       USB 2.0 Device Controller                IDE Host Controller
                                                Serial ATA Controller

                                                  Note: For more details please visit our
                                                  website at: www. faraday-tech. com
                                                                                            28
Technology Roadmap
-CPU & Platform

           Excel Your Idea to Silicon
                                                                                                                                 2005 Q3




       Faraday CPU Roadmap
Clock (MHz)

                                                                                                                            90nm
 800                                                                                         90nm HS FA626
                                                                                                                           130nm

                                                                                                                           0.18µm

 500

                                                 130nm HS FA626
 400


                                      130nm HS FA526
 300


 200            0.18µm FA526

          0.18µm FA510                                         130nm LL FA526

 100                                            0.18µm LL FA510


       2004-7    10      2005-01      4          7            10    2006-01     4            7          10

                          Legend Description:HS:High Speed                          Note: The right edge of each block denotes
                                             LL:Low Leakage                         the IP’s formal release date. For more
                                                                                    details, please visit our website at:
                                                                                    www. faraday-tech. com
                                                                                                                            30
                                                                                                                     2005 Q3




Audio Platform Roadmap
                                                                          FIE7020 (flash/disc audio)
                                                             FIE7020      •32-bit audio process with coprocessor
                                                                          •95dB ; Power : 30mW
                                                                          •18bit codec
                                                                          •ADPCM Codec/MP3 decoder/WMA v9 decoder/AAC
                                                                          decoder/DRM10/OGG/JPEG decoder


                                        FIE7010 (internet streaming)
                                        •32-bit audio processor
                        FIE7010         •93dB ; Power : 70mW
                                        •16bit codec
                                        •32bit AHB extension                                 FIE7025
                                        •ADPCM Codec/MP3 decoder/WMA v9
                                        decoder/AAC decoder/DRM10

                                                                                  FIE7025 (DAB)
                   FIE7005 (flash audio)
                                                                                  •32-bit audio process with coprocessor +
    FIE7005        •16-bit audio processor                                        demodulator
                   •90 dB ; Power : 50mW                                          •95dB ; Power : 20mW
                   •16-bit codec                                                  •ADPCM Codec/MP3 decoder/WMA v9
                   •16-bit AHB extension                                          decoder/AAC decoder/AAC+ decoder
                   •ADPCM Codec/MP3 decoder/WMA v8 decoder                        /DRM10/OGG/JPEG decoder/uPnP




2005Q2        Q3                Q4           2006 Q1             Q2               Q3                   Q4



                                                                                                                31
                                                                                                                                          2005 Q3




        Networking Platform Roadmap
                                    NC-1                                                              NC-2
High-end SOHO / SMB
   Enterprise NIC /




                                                                       SerDes                                     SerDes
                                                                                                                                          PCI-Exp
                      GbE                      PCI-X 66/133 MHz
                                                                                                                GbE                       (x4/x8)
                      GbE                      PCI 2.0 33/66 MHz    GbE                         PCI-Exp (x4)
                                                                                                                       XAUI
                                                                   S-ATA                                       10GbE


                                                                                                                                DDR-2 MPIO
                                  DDR-1 MPIO                                       DDR-2 MPIO                                200/266 MHz
                                 150 MHz                                        200/266 MHz




                                                                                            Secure Wireless CPE
Low-end SOHO / SMB/




                                                                                               Applications
     CPE / NAS




                                                                           10/100/GE
                                                                                                                  Wi-Fi 802.11

                                                                           USB 2.0


                                                                                                  DDR-1    MPIO




                            Q4
                                  2005 Q1             Q2            Q3                 Q4         2006 Q1                     Q2
                                                                                  Note: For more details, please visit our
                                                                                  website at: www.faraday-tech.com                   32
                                                                                                                                        2005 Q3




   Multimedia Platform Roadmap
                                             MDC-II (FIC8125)                                MDC-III (FIE8130)
                                             (06’/Q3)                                        (06’/Q4)
                                             •450MHz FA626                                   •450MHz FA626
                                                                             FIC8125         •H.264 codec 120fps/D1       FIC8130
                                             •MPEG4 Codec 120fps/D1
                                                                                             •Dual DDR Controller
Surveillance




                                             •Dual DDR Controller
                                                                                             •PCI-Express (RC)
  Platform




                                             •Dual MPEG4 Codec
                                             •PCI host bridge                                •Gigabit MAC
                                             •Gigabit MAC
                                                                                               IP Camera
                                    MDC-I (FIC8120)                          IP Camera
                                                                              IP Camera        •200MHz FA526
                                    •200 MHz FA526                                             •2M pixel CMOS/CCD ISP
                     FIC8120                                                                   •MPEG4 Encoder 30 fps/D1
                                    •MPEG4 Codec 30fps/D1
                                    •PCI host bridge                                           •PCI host bridge
                                    •IDE Controller                                            •USB OTG
                                    •USB OTG                                                   •SD/MMC Controller
Evaluation
 Platform




                          MDE-I (FIE8100)                              MDE-II (FIE8150)
               FIE8100    •200MHz FA526              FIE8150           •200MHz FA526
                          •MPEG4 Codec 30fps/D1                        •Enhanced MPEG4 Codec 30fps/D1
                          •AHB Extension                               •AHB Extension
                          •TV encoder                                  •10/100 MAC, IDE, PCI, USB OTG
                          •USB device                                  •Audio Codec




           2005/Q2         Q3                 Q4            2006/Q1                    Q2              Q3                 Q4
                         * Extra 60K logic gate count and <28K byte memory              Note: For more details, please visit our
                         * <10 MIPS CPU resource required for high performance needs    website at: www.faraday-tech.com
                                                                                                                                   33
                                                                                                                                        2005 Q3




         Wireless Platform Roadmap
                                                                                                                          Wireless
  UWB




                                                                                                                           USB


                                                                                                                       Wireless USB
                                                                                                                       •0.13µm process
                                                                                                                       • UWB MAC+BBP+RF
                                                                                                                       •ADC/DAC included




                               FTWLAN                                                        FTWLAN
                                 210                                                          2212
  WLAN




                                FTWLAN210
                                                            FTWLAN                       FTWLAN2212
                                •0.18µm process
               FTWLAN                                        2204                       •0.13µm process
                                • IEEE802.11b+i,
                 220                                                                    • WLAN 802.11b/g+i+e
                                • ADC/DAC included
                                                                                        • ADC/DAC included
          FTWLAN220                                        FTWLAN2204
          •0.18µm process                                 •0.18µm process
          • IEEE802.11b/g+i,                              • Low-cost IEEE802.11b/g+i,
          • ADC/DAC included                              • ADC/DAC included



2005      Q2                    Q3                   Q4                2006 Q1                  Q2                       Q3
                                                                                        Note: For more details, please visit our
                                                                                        website at: www.faraday-tech.com
                                                                                                                                   34
Technology Roadmap
-Display Solutions

           Excel Your Idea to Silicon
                                                                                                                     2005 Q3




 Solutions Overview
             Spec: Customization, TCON for all sizes: SXGA/XGA/UXGA/WUXGA
  Panel      Application: Portable DVD, In-car TV, PMP
             Interface: Parallel/Serial RGB, CCIR656/610
   2.5”                                                        CCIR-
                                                                          Source
                                                                656
                          PWM+
   5”                               DAC        TCON
              CCIR656      PLL
                                                               TCON       Gate
              /Parallel
   7”          /Serial
                          MACE+
                                    OSD        Gamma
                          ACSE                                 PWM        DC-DC
  10”

                              Spec: Customization
  12”         L
                          T   Application: NB, Monitor, LCD TV
              V
                  TCON    T   Interface: LVDS_RX, RSDS_TX, mini-LVDS_TX
              D
                          L
  14”         S


                                                                                              Mini
                               L   TCON L          TCON        L                   L   Reg     L
  15”         L           R
                               V         V
                                               L           R
                                                               V                   V           V
              V           S                    V           S       TCON   TTL
                  TCON         D MACE D            MACE        D                   D           D
              D           D                    D           D
                               S +ACSE S           +ACSE       S                   S   TCON    S
              S           S                    S           S
  17”                         (Rx)      (Tx)                                                  (Tx)
                                    BR                BR

  19”             TCON
              L           R
              V           S
30” to 40”    D    BR     D
              S           S                                                                          Exist IP   New IP
                  MACE+
                  ACSE
                                                                                                                36
                                                                                                                                                          2005 Q3




Serial Link Solution Roadmap
                                            •Serial Link Solution :

                                                                                            0.35um                  0.25um               0.18um
                                                                                            (3.3V)                (2.5V/3.3V)            (3.3V)

                                                                 LVDS Rx                      ˇ                        ˇ                     ˇ

                                                                 LVDS Tx                       --                      ˇ                     ˇ

                                                              Mini-LVDS Tx                     --                      ˇ                 Q1/2006

                                                                 RSDS Tx                      ˇ                    Q4/2005               Q1/2006


Display System Block for L/M Size Panel    •High Speed I/O Interface




                                                             0.25/0.18um          0.25µm                0.18µm                0.13µm             90nm
                                              LVDS(Tx)          8bits              10bits                10bits                10bits            10bits

                                                              0.25µm              0.18µm                0.13µm                 90nm
                                              LVDS(Rx)         8bits
                                                              0.25µm               10bits            LVDS(Rx)-10bits       LVDS(Rx)-10bits
                                                               10bits


                                              RSDS(Tx)     0.35µm       0.25µm               0.18µm                 0.13µm               90nm
                                                            8bits        10bits               10bits                 10bits              10bits

                 BR
                                                                0.25µm                    0.18µm
                                          Mini-LVDS(Tx)
                                                             Mini-LVDS (Tx)            Mini-LVDS (Tx)



                                                          2005-01       7     2006-01          7       2007-01        7        2008-01       7      2009-01

                                                                                  MP           ES         Developing          Planning


                                                                                                                                                  37
                                                                                                                                                    2005 Q3




          Serial I/O Roadmap

               0.25/0.18um              0.25µm                      0.18µm                       0.13µm                          90nm
  LVDS(Tx)    LVDS(Tx)-8bits         LVDS(Tx)-10bits             LVDS(Tx)-10bits              LVDS(Tx)-10bits                LVDS(Tx)-10bits


                0.25µm
                                        0.18µm                          0.13µm                     90nm
  LVDS(Rx) LVDS (Rx)-8bits           LVDS(Rx)-10bits                 LVDS(Rx)-10bits           LVDS(Rx)-10bits
                0.25µm
             LVDS(Rx)-10bits



              0.35µm          0.25µm                   0.18µm                         0.13µm                         90nm
  RSDS(Tx) RSDS(Tx)        RSDS (Tx)-10bits         RSDS(Tx)-10bits                RSDS(Tx)-10bits               RSDS(Tx)-10bits



  RSDS(Rx)                            0.35µm - HV                        0.25µm - HV
                                       RSDS (Rx)                          RSDS (Rx)



                       0.25µm                          0.18µm
Mini-LVDS(Tx)       Mini-LVDS (Tx)                  Mini-LVDS (Tx)


                                                      0.35µm - HV                       0.25µm - HV
Mini-LVDS(Rx)                                        Mini-LVDS (Rx)                    Mini-LVDS (Rx)

          2005-01           7          2006-01           7              2007-01        7              2008-01          7             2009-01


                                                                                                            Note: The right edge of each block
                                        MP              ES             Developing          Planning         denotes the IP’s formal release date.

                                                                                                                                            38
                                                                                                                2005 Q3




   Color Management Roadmap


  G1/ACSETM+MACETM                     •G2
                                                                          •G3
  • Anti-color shift by normal angle   • Color checker
                                                                          • 2D gamut mapping
  • Multi-axis color enhancer          • Multi-axis hue control
                                                                          • Color reproduction
  • Auto adjustment system             • Advanced color preference
                                                                          •Δuv, γswitched by temperature
  • Color preference simulation        simulation
  • Color temperature adjustment       • Fitting to different standards




Color
Management




                                                                                                           39
                                                                                                                                       2005 Q3




      Contrast/Viewing Angle IPs &
      Platform
                                                         •G1/Contrast
                                                         • Contrast ratio: 1000~                    •G2
                                                         • Backlight control                        • New driving method
                                                         • Frame image counting &                   • Code mapping method
                                                         gamma switching                            • Viewing angle improvement
                                                         • Histogram type switching                 on Δuv
                                                         • Viewing angle improvement



Contrast &
Viewing Angel



                •G1/TCON Platform                                               G2/Smart Integrated Platform
                • 6~10bit LVDS/RSDS/mLVDS                                       •flexible interface/new interface
                interface                                                       • New driving scheme and layout
                • Support 1ch/2ch                                               • Resolution up to HDTV
                • Resolution up to HDTV                                         • Embedded advanced Video IPs
                • Embedded advanced digital IPs for                             for different markets
                different markets                                               • Real time operation
                • Real time operation                                           • Includes gamma and power
                • Includes gamma and power circuits                             circuits
Platform        • Construct design ability to handle                            • Bundle sailing of driver?
                driver IC board

                      Q3, 4                            Q1,2                    Q3,4                            Q1,2
                                     2006                                                     2007


                                                                                                                                  40
Quality Assurance

            Excel Your Idea to Silicon
                                                                                                                2005 Q3




         Major Quality Functions
                                                       President




Verification & Application          IC Service               Production Service        Quality Management
    Development (VT)              (RA, FD & PT)                  (PS / QM)                    (QMD)




  IP Verification Technology   Failure Analysis             Subcontractor Management   TQA Culture Shaping

  Compatibility Test           Yield Mgmt. and Improve      Incoming Quality Control   Quality System Develop
                               Reliability Qualification    Outgoing Quality Control   Design Quality Assurance
                               and Monitoring
                                                                                       ASIC Quality Assurance

                                                                                       Test Chip Management

                                                                                       IP Management Center

                                                                                       Document Control Center

                                                                                       Customer Satisfaction
                                                                                                          42
                                                            2005 Q3




ISO 9001:2000 Certificate
                  1st Issue Date : August 12, 1997
                  Revision Date: August 12, 2003
                  In Compliance with:
                  ISO 9001, 2000
                  Scope of Registration:
                  The design and development of sub-
                  micron ASIC libraries including digital
                  cells, mix-signal cells, memory
                  modules and megacell element

                  The supply of ASIC design flow
                  including IC pre-simulation, IC place-
                  route, IC post-simulation and sample
                  testing

                  The provision of management
                  services for subcontracted processes
                  including mask-tooling, fab
                  processing, packaging and testing
                                                       43
                                                2005 Q3




IECQ Certificate

                   IECQ :
                   International
                   Electrotechnique
                   Commission
                   Quality
                   Assessment System for
                   Electronic Component




                                           44
                                                                                     2005 Q3




Green Environmental Protection Policy

                                         產品設計符合國際法規
                             Offer product designs that are compliant with the
                             international environmental laws and regulations
                                         生產服務禁用有害物質
                             Provide production services that prohibit the use of
                                           hazardous substances
                                         善用資源有效防治汚染
                             Use green resources in an effective way to prevent
                                                 pollution
                                         貫徹員工環保責任意識
                                 Instill employees with ecological ethics and
                                                responsibilities
                                         綠色環保企業始為職志
                            Strive to become one of the best green companies in
                                       terms of environment protection



         Applicable for customer specified green products only

                                                                                45
                                                                                                       2005 Q3




  Beyond ISO 9001:2000

                             Faraday’s IP Design Teams

                                                        QA system


                       MSD     IPD       CTD          DD     SIS…
                                                                                          Successful
                                                                                          ASIC projects
                                                                                          with silicon
                                                                                          proven IPs


                                                                QDS: Quick-Use
Faraday’s Production Teams               Faraday’s
                                          Silicon               Development System




                                                                                          FIRST
                QA system                Test Chips                 Central IP Database


                                                               Cell Library   Memory IP
  PS                ICS
                                     ATE Test Report
                                      ATE Test Report           Digital IP    Analog IP

                                     System Test
                                      System Test
                                     Report
                                      Report                   IP-Based Design Flow



                                                                                                  46
                                                              2005 Q3




FIRST at a Glance
           What is “FIRST”?
           What is “FIRST”?
                  Faraday IP Reuse Standard
                 Faraday IP Reuse Standard
           Why “FIRST”?
           Why “FIRST”?
                  To consolidate the reusability of
                 To consolidate the reusability of
                  Faraday’s IPs in IP designs and chip
                 Faraday’s IPs in IP designs and chip
                  integration
                 integration
           What’s inside “FIRST”?
           What’s inside “FIRST”?
                  IP Classifications
                 IP Classifications
                  Functional Verifications
                 Functional Verifications
                  IP Interfaces
                 IP Interfaces
                  Integration
                 Integration
                  Full Chip Simulations
                 Full Chip Simulations
                  IP Certifications
                 IP Certifications

                                                         47
                                                                       2005 Q3




Major Manufacturing Partners
     Foundry
           UMC : United Microelectronics Corporation (Hsinchu, Taiwan)

     Circuit Probing
           KYEC : King Yuan Electronics Co., LTD (Hsinchu, Taiwan)
           WSC : Winstek Semiconductor Corp. (Hsinchu, Taiwan)

     IC Assembly & Package
           SPIL : Siliconware Precision Industries Co. (Taichung, Taiwan)
           ASE : Advanced Semiconductor Engineering, Inc. (Kaohsiung,
           Taiwan)

     Final Testing
           KYEC : King Yuan Electronics Co., LTD (Hsinchu, Taiwan)
           WSC : Winstek Semiconductor Corp. (Hsinchu, Taiwan)



                                                                  48
ASIC Design Services

            Excel Your Idea to Silicon
                                                                                             2005 Q3




From Concept to Silicon

         IP                  ASIC Front-End                   ASIC Back-End

                        Architecture Specifications           Mask Tooling
 Libraries / Memories
                            Behavior Modeling
                                                      Wafer Manufacturing Services
                          RTL Code Generation
   Microprocessors
                                Synthesis                 IC Packaging Services

                          Gate Level Verification
                                                      Circuit Probing & Final Testing
   Digital / Analog
                         Test Pattern Generation
                                                         Reliability Test Services
                        Physical Implementation

      Platform           Post Layout Verification          Product Engineering



                            System-on-a-Chip



                                                                                        50
                                                                                               2005 Q3




 Our Design Methodology
Faraday offers a combination of commercial and in-house design kits, design flows, and
methodologies that are backed by world-class technical support that greatly increases
design productivity and strives to achieve “first-time-right” ASIC designs.


       Design review
       Power estimation       Design Entry and Review
       Chip size estimation
                                                                     RTL code assessment
                                                                     DFT planning
                                   Design Planning                   Logical floorplanning
                                                                     Netlist / package checking




Design Implementation                                         Design Verification

     Logical synthesis                                              Gate-level simulation
     DFT synthesis / ATPG                                           Formal verification
     Physical synthesis                                             Static timing analysis
     Clock tree synthesis                                           Power calculation
     Noise-aware synthesis                                          Physical verification
                                                                    ESD protection checking
                                                                    Noise analysis        51
                                                                                                       2005 Q3




 Supported Design Kits (1/2)
Design Stage            Major Tasks             Design Kits and EDA Tools
Design Implementation   Logical Synthesis       Faraday facs
                                                Synopsys Design Compiler
                                                Cadence BuildGates
                                                Incentia DesignCraft
                                                Synplicity Synplify ASIC
                                                Magma BlastRTL
                        DFT Synthesis / ATPG    Faraday fiolt / fmbist
                                                Synopsys DFT Compiler / TetraMax
                                                Syntest Turbo Scan
                                                Mentor Graphics DFT Advisor / Fast Scan / MBIST
                                                Architect
                        Physical Synthesis      Cadence SoC-Encounter / PKS / Silicon Ensemble
                                                Synopsys Physical Compiler
                                                Magma BlastFusion
                        Clock Tree Synthesis    Faraday ftcp
                                                Cadence CT-Gen / CTPKS / FE-CTS
                        Noise-aware Synthesis   Faraday ppg
                                                Cadence SoC-Encounter
                                                Magma BlastNoise


                                                                                                  52
                                                                                      2005 Q3




Supported Design Kits (2/2)
Design Stage          Major Tasks               Design Kit and EDA Tools
Design Verification   Gate-Level Simulation     Faraday fsim
                                                Cadence Verilog-XL / NC-Sim

                      Formal Verification       Faraday flec
                                                Cadence Conformal LEC

                      Static Timing Analysis    Faraday fsta
                                                Synopsys PrimeTime

                      Power Calculation         Faraday powercat

                      Physical Verification     Cadence Dracula / Diva
                                                Mentor Graphics Calibre


                      ESD Protection Checking   Faraday fesd

                      Noise Analysis            Faraday ppg
                                                Cadence SoC-Encounter / Celtic
                                                Synopsys PrimeTime-SI




                                                                                 53
                                                                                                                                                       2005 Q3




    ASIC Technology
     Type                                                                    Standard Cell

                                                           0.18µm               0.15µm                          130nm                     90nm
   Process         0.35µm          0.25µm
                                                                                    SP                                                      SP
                                                   GII              LL                             HS             LL           SP

  Operation                         2.25V ~       1.62V ~       1.62V ~                          1.08V ~         1.08V ~     1.08V ~
                   3.0V ~ 3.6V                                                 1.35V ~ 1.65V                                             0.9V ~ 1.1V
  Voltages                           2.75V         1.98V         1.98V                            1.32V           1.32V       1.32V


Core Voltages         3.3V            2.5V          1.8V            1.8V           1.5V            1.2V           1.2V         1.2V         1.0V


 I/O Voltages       3.3V / 5V      2.5V / 3.3V   1.8V / 3.3V   1.8V / 3.3V      1.5V / 3.3V        3.3V           3.3V         3.3V      1.0V / 3.3V


 Propagation
                                    57.2ps /      41.2ps /      55.9ps /                         21.1ps /       51.9ps /     28.8ps /     16.2ps /
     Delay        77.8ps / stage                                               29.8ps / stage
                                    stage @       stage @       stage @                          stage @        stage @      stage @      stage @
(2 Input NAND,        @ 3.3V                                                       @ 1.5V
                                      2.5V          1.8V          1.8V                             1.2V           1.2V         1.2V         1.5V
   F.O. = 1)
   Power            0.334µW /      0.087µW /      0.029µW /    0.029µW /                        6nW / gate       6nW /        6nW /       4.5nW /
Consumption                                                                    17.7nW / gate
                   gate / MHz      gate / MHz    gate / MHz    gate / MHz                        / MHz @       gate / MHz   gate / MHz   gate / MHz
                                                                                / MHz @ 1.5V
 (2 Input NAND,       @ 3.3V         @ 2.5V         @ 1.8V       @ 1.8V                            1.2V          @ 1.2V       @ 1.2V       @ 1.0V
     F.O. = 2)

   Density            22.5K           67K           110K            110K           150K           250K            250K        250K          400K
  (Gates / mm2)

                                                                                                      •   The above data is based on UMC processes




                                                                                                                                               54
                                                                                                                                                   2005 Q3




         Structured ASIC Technology I
      Type                                                 Metal Programmable Core Cell Library

                                                                 0.18µm                0.15µm                       130nm                   90nm
    Process          0.35µm           0.25µm
                                                                                          SP                                                  SP
                                                          GII                LL                            HS          LL          SP

  Operation                                                                1.62V ~      1.35V ~          1.08V ~     1.08V ~     1.08V ~     0.9V~
                    3.0V ~ 3.6V     2.25V ~ 2.75V     1.62V ~ 1.98V
  Voltages                                                                  1.98V        1.65V            1.32V       1.32V       1.32V       1.1V


Core Voltages          3.3V             2.5V              1.8V              1.8V         1.5V             1.2V        1.2V        1.2V        1.0V

 Propagation
                                                                           54.4ps /     36.2ps /         24.9ps /    65.5ps /    38.8ps /   24.5ps /
     Delay     94.6ps / stage @     61.1ps / stage   45.1ps / stage @
                                                                           stage @      stage @          stage @     stage @     stage @    stage @
(2 Input NAND,       3.3V              @ 2.5V              1.8V
                                                                             1.8V         1.5V             1.2V        1.2V        1.2V       1.0V
   F.O. = 1)
    Power                                                                 0.028µW /     18.6nW /
                                                                                                         8.1nW /
                                                                                                                     7.7nW /
                                                                                                                                 7.8nW /    4.33nW /
 Consumption       0.338µW / gate   0.116µW / gate   0.032µW / gate /                                     gate /                  gate /      gate /
                                                                          gate / MHz   gate / MHz                   gate / MHz
  (2 Input NAND,    / MHz @ 3.3V     / MHz @ 2.5V       MHz @ 1.8V                                       MHz @                   MHz @       MHz @
                                                                            @ 1.8V       @ 1.5V                       @ 1.2V
      F.O. = 2)                                                                                            1.2V                    1.2V        1.0V

Programming
                      metal2-4         metal2-4          metal2-4         metal2-4     metal2-4         metal3-5    metal3-5     metal3-5   metal3-5
   Layers

 Raw Density            15K              45K               80K               80K         120K             174K        174K        174K        355K
  (Gates / mm2)


                                                                                                    •   The above data is based on UMC processes


                                                                                                                                            55
                                                                                                                                2005 Q3




Structured ASIC Technology II
      Type                                         Metal Programmable I/O Library

                                                       0.18µm                             130nm                130nm
     Process                0.25µm
                                                         GII                                  HS                   HS


  Core Voltages               2.5V            1.8V                   1.8V                     1.2V                 1.2V


                         2.5V/3.3V                                 2.5V/3.3V              2.5V/3.3V           2.5V/3.3V
  I/O Voltages                                1.8V
                     (2.5V for SSTL-2)                         (2.5V for SSTL-2)      (2.5V for SSTL-2)   (2.5V for SSTL-2)

                                                                                                          LVTTL
                    LVTTL                                   LVTTL                    LVTTL
                                                                                                          PCI-66
  Supported I/O     PCI-66               LVCMOS             PCI-66                   PCI-66
                                                                                                          PCI-X
    Standards       PCI-X                SSTL-18            PCI-X                    PCI-X
                                                                                                          SSTL-2 Class I, II
                    SSTL-2 Class I, II                      SSTL-2 Class I, II       SSTL-2 Class I, II
                                                                                                          LVDS


Programming Layer            metal3          metal3                 metal3                   metal3               metal3


 Formal Release             2006 Q1          2005 Q2               2005 Q3                2005 Q4              2006 Q2


                                                                              •    The above data is based on UMC processes




                                                                                                                           56
                                                                                                  2005 Q3




 Package Services
Categories      Types & Features
BGA Family       Cavity up BGA     PBGA, LBGA, MCMBGA, EDHSBGA and Flip chip package.
                 Cavity down BGA      L2BGA, EBGA, CDTBGA
                 Bumping Technology        WLCSP, Ultra CSPL.
                 Lead-free and green package optional

CSP Family       LFBGA, TFBGA, VFBGA, LTBGA, TFTBGA, QFN and LGA.
                 Ball pitch: 0.4 ~ 1.0mm
                 Lead-free and green package optional

Module Family    MMC, STFBGA, S2BGA, and TCP
                 Lead-free and green package optional

Quad Family      PLCC, QFP, thermally enhanced QFP (DHS-QFP / DPH-QFP / EDHS-QFP), LQFP, thermally
                 enhanced LQFP (E-pad LQFP/ DPH-LQFP / EDHS-LQFP), TQFP and E-pad TQFP
                 Lead-free and green package optional

Dual Family      PDIP, Skinny, SOJ, SOP, SSOP, TSOP I, and TSOP II
                 Lead-free and green package optional



                                                                                             57
                                                                                                                            2005 Q3




Systematic Test Management
                             Testing Plan




                                                            Faraday Testing Turn Key Services
                     Testing Specification Review                                               Mass Production
              Testing Program Development & Debugging

             Characterization Testing Program Development
 ASIC & IP




              Testing Program Release To Mass Production
                                                                                                   Quality Control &
                                                                                                 Test Program Version
                         Testing Documents
                                                                                                        Control

                      Training and Future Testing
                       Technology Development

              Testing Program Release Form Management
                                                                                                  Engineering
                   Testing Accessory Management




                            DFT, ATPG, BIST                                                       Yield Monitoring &
                                                                                                    Enhancement
             In-House Testing Program Generation


                                                                                                                       58
                                                                        2005 Q3




On-Line Services
From Project Concept to Final Goods Delivery
                                      • Personalized Homepage
                                      • Web-Based Queries
                                      • Web-Based Monitoring
                                        Functions
                                      • Real-Time Status Updates




                                                                   59
                                                                   2005 Q3




Customized Business Models
                             Architecture Specification

                                 Behavior Modeling
        Design Services
                               RTL Code Generation

                                      Synthesis

                               Gate Level Verification

                              Test Pattern Generation

                              Physical Implementation

                              Post Layout Verification

                                   Mask Tooling

                           Wafer Manufacturing Services
      Production
       Services




                               IC Packaging Services

                          Circuit Probing and Final Testing

                              Reliability Test Services

                                Product Engineering


                                                              60
IP Solutions

               Excel Your Idea to Silicon
                                                                                         2005 Q3




 Best IP Provider
Per
   pet                                                                    &
      ual                                                            ility bility
          IP   Dev                                                ab
                                                             eus Porta
                   elo
                      pm                                I P R l o gy
                        ent                                  o
                                                  T   e chn


                                 if (a<b) t
  Industrial Standard              z <= ‘1’

       Adopter
                                 else
                                   z <= ‘0’
                                                Full Customer Support



                      n                           Cus
                olutio                                tom
         le te S r                                        ized
     Comp rovide                                       Prov Serv
                                                            ider ice
         P


                                   ASIC
                              Mass Production
                                Verification
                                                                                    62
                                                                                                   2005 Q3




    Our IP Catalogs
Embedded CPUs and DSPs:
                                             Standard Cells & Libraries:
- Dedicated technical service group with
  excellent design experience                - Open architecture of standard cell and I/O to
                                               facilitate the integration of customized blocks with
- Complete software development                Faraday’s IPs
  environment, ICE, and easy to use design
  kits
                                                           Embedded Memories:
                                                           - Rich set of low-power, high- density
Analog & Mixed Signal IPs:
                                                             or high-performance applications
- Full spectrum of mixed-signal IPs
                                                           - Parameterized power port and
- Constant development of next                               decoupling capacitance that
  generation technologies                                    guarantees high-speed performance
- Suitable for a wide range of application
  fields

Digital IPs:
- Design optimization capabilities that
  result in best cost / performance
- Platform enabled solution that shortens
  time-to-market, time-to-production and
  time-to-profit




                                                                                              63
Easy Reuse
              Quick-Use Development System (QDS) IP Central Database
                 • Central Database Management           • Knowledge Database
                 • Check in / Check out                  • Issue Tracking
                 • Version Control                       • Qualification Report



                                                                      Faraday IP Reuse
                                          IP                          Standard (FIRST)
     IP Creation                     Qualification
                                                                      - IP Deliverables
                                                                      - Documentation
     Define Spec.                         RD Internal                 - Global Guidelines
                                         Design Review
                              Fail                                    - HDL Coding
        Coding                                   Pass                 - Functional Verification
                                                                      - Scripts
                                        Cross-Division
     Verification                       Design Review                 - IP Interfaces
                             Fail                                     - Design for Test
                                               Pass
                                                                      - Back-end
         FPGA
                                                                      - Analog
                                        Standard Admin
                                          Final Check                 - SoC Integration
  Silicon Verification        Fail                                    - Full Chip Simulation
                                                Pass                  - IP Certifications

                                                                                                  64
                                                              2005 Q3




   Complete Deliverables
                         Common EDA Tools
                                     Simulation Models


                                     Synthesis Models


                                       Power Models


                                        Test Models
Combine Faraday’s
IPs with 3rd party IPs                Timing Models
to energize your IC
and SoC designs!                     Layout Abstracts


                                      GDS II Layouts


                                       Spice Netlists
                                                         65
                                                                                                               2005 Q3




    Solution-Oriented IP Roadmaps
Value
                                                                      •BSP, device D\driver,
                                                                       OS Porting, Middleware,   Embedded
                                                                      •DSP Algorithm, …           Software

                                                       •Platform solution
                                                        (network, wireless,   Platform IPs
                                                        multimedia)



                                      •CPU, MCU, DSP            Core IPs

                       •Functions
                        (MPEG, JPEG, Ethernet…)
                       •Interconnects              Standard IPs
                        (PCI, AGP, USB, LVDS, …)

        •Cell Libraries
        •Memory/Data path       Infrastructure IPs
        •Arithmetic functions

                                                                                        Differentiation


                                                                                                          66
                                                                                    2005 Q3




   Flexible Business Models
                                                          License Types
Reusability                                                  • Single Use
Portability                                                  • Multiple Use
                      Soft
 Flexibility         Cores                                   • Unlimited Use



                                Firm
                                Cores

                                                         Hard
                                                         Cores

               Delivery Types

                                  • Higher Predictability and Performance
                                  • Lower Cost
                                  • Lower Total Effort
                                  • Shorter Time-To-Market                     67
                                                                                     2005 Q3




Proactive Services
                            Training
                            • Professional Trainers
                            • Electronic Training

                                                            IP Reuse Know-How




                                Faraday’s IP
                                Service Team
    IP Delivery                                       Technical Support
    • eService System                                 • Design-in Support
    • Version Control and                             • Production Support
      Delivery                       eService




                                Customers

                                                                                68
Heading for
the Future
          Excel Your Idea to Silicon
                                                               2005 Q3




What Faraday Possesses

Core Competencies        Remarkable Capabilities

  Flexibility              Leading Technologies

  Customized Services      Robust Methodologies

  Rapid Time to Market     Proven System-Level Know-How

  Turnkey Solutions        Total Quality Management




                                                          70
                                                                 2005 Q3




Why Choose Faraday?
 A leader in silicon proven ASIC designs and IP solutions

 A diverse IP portfolio in high-growth applications

 World-class strategic partners and customers

 Cohesive, stable and experienced engineering teams

 A one-stop solution provider

 Worldwide support network



                                                            71
                                                                                                                                          2005 Q3




   Contact Faraday                                                                 www.faraday-tech.com




Faraday USA                Faraday Netherlands        Faraday Japan              Faraday China                 Faraday Taiwan (HQ)
Sunnyvale, CA              Amsterdam                  Tokyo                      Shanghai                      Hsinchu & Taipei
TEL: +1. 408.522.8888      TEL: + 31.23.56.20496      TEL: + 81.3.5214.0070      TEL: + 86.21.6406.7523        TEL: + 886.3.5787888
ussales@faraday-tech.com   eusales@faraday-tech.com   jpsales@faraday-tech.com   cnsales@faraday-tech.com.cn   twsales@faraday-tech.com




                                                                                                                                     72
                                   2005 Q3




Thank you!



 Your Virtual Design Center
                              73
                                                                             2005 Q3




Errata Data(1/2)
For 2005Q3 version, the basic structure and elements remain the
   same as Q2 version, and the milestones & roadmaps are the main
   items to be revised & updated.
   Milestones (p.5~p.9)
      Add some Award information
      List major technology transition and product launch
      Revise and make some wordings consistency
  Technology Roadmap (p.19~p.40)
      Classified into 3 categories:
          Structure ASIC & IP Roadmap
          CPU & Platform Roadmap
          Display Solutions Roadmap
       All roadmaps have been updated to the Q3, 2005
      Firstly add Display Solutions Roadmap into the company profile.



                                                                        74
                                                        2005 Q3




Errata Data(2/2)
 Others
   ASIC Technology ( p.54)
   Structure ASIC Technology I & II ( p.55-p.56)
   On-Line services (p.59)
      Change the graph of new front page




                                                   75

								
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