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Bipolar Junction Transistors

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					  Crystal Structure of Silicon

Covalent Bond:                      View along a crystallographic
Two atoms
Share two                           axis of silicon
electrons




Silicon atom: Four electrons/atom
Conductors and Semiconductors
 I                                           I  0

          VB                                            VB

        Conductor                                    I ntrinsic Silicon
     Holes (Ben Franklin)                                    Insulator
            Electrons


                         Bar of metal                                    Bar of silicon
 I                                            I

         VB                                             VB

     p-Type Silicon                                  n-Type Silicon
       Hole Conduction                               Electron Conduction




                            Semiconductors
Intrinsic Silicon

                             Temperature effects:
                             • At absolute zero all electrons are
                             bonded to neighbors. There is
                             none available for conduction.
                                  • Insulator
                             • At higher temperatures electrons
                             gain enough energy to escape the
                             bonds.
                                  • Some conduction but still
                                  basically an insulator




 Silicon: 4 electrons/atom
    Phosphorus (n-Type) Doped Silicon
• Replace silicon atom by a phosphorus atom which had five electrons
rather than four (silicon). One impurity atom for 106 to 1010 silicon
atoms.
• Extra electron is free to move in crystal allowing conduction



Phosphorus
atom has net
(+) charge                                              Extra electron (-)
which is fixed                                          which is mobile
in position



Phosphorous
atom
Simplified Representation of n-Type Silicon
• Charges are balanced: Number of (+) charges equals number of (-)charges

                      Charges due to
                      one impurity atom
                                                           Shows only impurity
                                                           atoms




 • Net positive charge of each            • Extra electron (- charge) for each
 phosphorus atom                          phosphorus atom
 • Fixed position in crystal              • Mobile: Moves around crystal due to
                                          E-field and diffusion
     p-Type Silicon
• Example with Boron doping atoms which has three electrons/atom.


                              Charges due to
                              one impurity atom




• Net negative charge of each            • Extra hole (+ charge) for each
boron atom                               boron atom
• Fixed position in lattice              • Mobile: Moves around crystal due to
                                         E-field and diffusion
Motion of Charges

Mobile charges move due to two effects:
  • Forces due to electric field: Force = charge x Electric Field
        • The resulting current is called “drift current”
  • Diffusion due to gradient in the charge density:
        • Charges move to be evenly distributed throughout space
            • Similar to perfume in room or heat in a solid.
        • The resulting current is called “diffusion current”
ELECTRICAL CONDUCTIVITY
   in order of conductivity: superconductors,
    conductors, semiconductors, insulators
   some representative resistivities ():
       R = L/A, R = resistance, L = length, A = cross section area; resistivity at 20o C
                                                                              resistivity in 
        m resistance(in )(L=1m, diam =1mm)
          aluminum 2.8x10-8              3.6x10-2
          brass                 8x10-8              10.1x10-2
          copper                1.7x10-8             2.2x10-2
          platinum 10x10-8               12.7x10-2
          silver                1.6x10-8              2.1x10-2
          carbon                3.5x10-5             44.5
          germanium             0.45                 5.7x105
          silicon                640                 6x108
          porcelain 1010 - 1012          1016 - 1018
          teflon                1014                 1020
          blood                 1.5                  1.9x106
          fat                   24                   3x107
ENERGY BANDS IN SOLIDS:
   In solid materials, electron energy levels form bands of allowed energies,
    separated by forbidden bands
   valence band = outermost (highest) band filled with electrons (“filled” = all states
    occupied)
   conduction band = next highest band to valence band (empty or partly filled)
   “gap” = energy difference between valence and conduction bands, = width of the
    forbidden band
   Note:
       electrons in a completely filled band cannot move, since all states occupied
        (Pauli principle); only way to move would be to “jump” into next higher band -
        needs energy;
       electrons in partly filled band can move, since there are free states to move to.
   Classification of solids into three types, according to their band structure:
       insulators: gap = forbidden region between highest filled band (valence band)
        and lowest empty or partly filled band (conduction band) is very wide, about 3
        to 6 eV;
       semiconductors: gap is small - about 0.1 to 1 eV;
       conductors: valence band only partially filled, or (if it is filled), the next allowed
        empty band overlaps with it
Band structure and conductivity
INTRINSIC SEMICONDUCTORS
   semiconductor = material for which gap between valence band and conduction
    band is small;         (gap width in Si is 1.1 eV, in Ge 0.7 eV).
   at T = 0, there are no electrons in the conduction band, and the semiconductor
    does not conduct (lack of free charge carriers);
    at T > 0, some fraction of electrons have sufficient thermal kinetic energy to
    overcome the gap and jump to the conduction band;
       fraction rises with temperature;                           e.g. at 20o C (293 K), Si
    has 0.9x1010 conduction electrons per cubic centimeter; at 50o C (323 K) there
    are 7.4x1010 .
   electrons moving to conduction band leave “hole” (covalent bond with missing
    electron) behind;      under influence of applied electric field, neighboring electrons
    can jump into the hole, thus creating a new hole, etc.  holes can move under
    the influence of an applied electric field, just like electrons;        both contribute
    to conduction.
    in pure Si and Ge, there are equally many holes (“p-type charge carriers”) as
    there are conduction electrons (“n-type charge carriers”);
   pure semiconductors also called “intrinsic semiconductors”.
Intrinsic silicon:




   DOPED SEMICONDUCTORS             :
       “doped semiconductor”: (also “impure”, “extrinsic”) = semiconductor with small admixture
        of trivalent or      pentavalent atoms;
    n-type material
     donor (n-type) impurities:
       dopant with 5 valence electrons (e.g. P, As, Sb)
       4 electrons used for covalent bonds with surrounding Si atoms, one electron
        “left over”;
       left over electron is only loosely bound only small amount of energy needed
        to lift it into conduction band (0.05 eV in Si)
        “n-type semiconductor”, has conduction electrons, no holes (apart from the
        few intrinsic holes)
        example: doping fraction of 10-8 Sb in Si yields about 5x1016 conduction
        electrons per cubic centimeter at room temperature, i.e. gain of 5x106 over
        intrinsic Si.
n-type material


p-type material

     acceptor (p-type) impurities:
        dopant with 3 valence electrons (e.g. B, Al, Ga, In)  only 3 of the 4
         covalent bonds filled  vacancy in the fourth covalent bond  hole
        “p-type semiconductor”, has mobile holes, very few mobile electrons
         (only the intrinsic ones).
     advantages of doped semiconductors:
        can”tune” conductivity by choice of doping fraction
        can choose “majority carrier” (electron or hole)
        can vary doping fraction and/or majority carrier within piece of
         semiconductor
         can make “p-n junctions” (diodes) and “transistors”
p-type material
   p-n JUNCTION:
       p-n junction = semiconductor in which impurity changes abruptly from p-
       type to n-type ;
      “diffusion” = movement due to difference in concentration, from higher to
       lower concentration;
      in absence of electric field across the junction, holes “diffuse” towards and
       across boundary into n-type and capture electrons;
       electrons diffuse across boundary, fall into holes (“recombination of
       majority carriers”);  formation of a “depletion region”
                                   (= region without free charge carriers)
                                   around the boundary;
      charged ions are left behind (cannot move):
          negative ions left on p-side  net negative charge on p-side of
           the junction;
          positive ions left on n-side  net positive charge on n-side of the
           junction
            electric field across junction which prevents further diffusion.
   p-n JUNCTION:
    
Pn junction
    Formation of depletion region in pn-junction:
Forward biased pn-junction
   Depletion region and potential barrier
    reduced
Reverse biased diode
   Depletion region becomes wider,
      barrier potential higher
Diodes (The PN Junction)
Diodes (The PN Junction)

                           The free electrons in
                           the n region are
                           randomly drifting in all
                           directions. At the
                           instant of the pn
                           junction formation, the
                           free electrons near the
                           junction in the n region
                           begin to diffuse across
                           the junction into the p
                           region where they
                           combine with holes
                           near the junction. The
                           same is true for the p-
                           type material.
Diodes (The Depletion Region)
                      When the pn junction is
                      formed, the n region loses
                      free electrons as they
                      diffuse across the junction.
                      This creates a layer of
                      positive charges (ions)
                      near the junction. As the
                      electrons move across the
                      junction, the p region loses
                      holes as the electrons and
                      holes combine. This
                      creates a layer of negative
                      charges (ions) near the
                      junction. These two layers
                      of positive and negative
                      charges form the depletion
                      region.
Diodes (Forward Bias )




 •To bias a pn junction, apply an external dc voltage across it. Forward
 bias is the condition that allows current through a pn junction. The
 picture shows a dc voltage source connected by conductive material
 (contacts and wire) across a pn junction in the direction to produce
 forward bias.
 •This external bias voltage is designated as VBIAS. Notice that the
 negative side of VBIAS is connected to the n region of the pn junction and
 the positive side is connected to the p region. This is one requirement
 for forward bias. A second requirement is that the bias voltage, V BIAS,
 must be greater than the barrier potential (0.7V in silicon and 0.3 in
 germanium).
Diodes (Forward Bias )




Because like charges repel, the negative side of the bias-voltage source
"pushes" the free electrons, which are the majority carriers in the n region,
toward the pn junction. This flow of free electrons is called electron current. The
negative side of the source also provides a continuous flow of electrons through
the external connection (conductor) and into the n region as shown.
                             Band Diagrams
•When the P-type material is contacted with
the N-type material, the Fermi levels must be
at equilibrium.
•Band bending: The conduction and valence
bands “bend” to align the Fermi levels.
•Electrons diffuse from the N-side to the P-side
and recombine with holes at the boundary.
Holes diffuse from the P-side to the N-side and
recombine with electrons at the boundary.
There is a region at the boundary of charged
atoms –called the space-charge region (also
called the depletion region b/c no mobile
carriers in this region)
•An electric field is created which results in a
voltage drop across the region –called the
barrier voltage or built-in potential
     What happens when P-type meets N-type?
Holes diffuse from the p-type into the n-type, electrons diffuse from the n-type into the p-
type, creating a diffusion current. The diffusion equation is given by
                               dn
                 J n  qDn          where Dn is the diffusion constant
                               dx
Once the holes [electrons] cross into the n-type [p-type] region, they recombine with the
electrons [holes].
•This recombination “strips” the n-type [p-type] of its electrons near the boundary, creating
an electric field due to the positive and negative bound charges.
•The region “stripped” of carriers is called the space-charge region, or depletion region.
•V0is the contact potential that exists due to the electric field.



                  E x   
                               dV
                               dx
•Some carriers are generated (thermally) and make their way into the depletion region
where they are whisked away by the electric field, creating a drift current.
         E-field and Built-in Potential
•Diffusion is balanced by drift due to bound
charges at the junction that induce an E-field.
•Integrating the bound charge density gives us
the E-field



                               x dx
                              x
         Ε x  
                      1
                     r o    

Integrating the E-field gives the potential
gradient

       Ε x   
                     dV
                     dx

                    
                        x
        V x    E x dx
                      
            Junction Built-In Voltage
•With no external biasing, the voltage across the depletion region is:

                                 N AND
                    Vo  VT ln
                                  ni2

 –Typically, at room temp, V0 is 0.6~0.8V
 •How does V0 change as temperature increases?

 –Note that there is no measurable potential difference between the n-type
 and p-type materials of pn junction when in equilibrium. The
 electrochemical potentials (Fermi levels) are the equal.
                Width of Depletion Region
•The depletion region exists on both sides of the
junction. The widths in each side is a function of
the respective doping levels. Charge-equality
gives:
              qx p AN A  qxn AN D
                   xn       NA
                        
                  xp        ND

 •The width of the depletion region can be
 found as a function of doping and the built-in
 voltage…
                          2 s  1
                                     1 
      Wdepl  xn  x p                Vo
                           q  N A ND 
                                            
s is the electrical permittivity of silicon =
11.7ε0 (where ε0 = 8.854E-14 F/cm)
     Pn Junction in Reverse Bias (1)


•As the depletion region grows, the capacitance across the diode changes.

                                   2 s    1    1 
             Wdepl  x n  x p            N  N Vo  VR 
                                                   
                                    q      A     D 

  –Treating the depletion region as a parallel plate capacitor…
                        C jo
                 Cj 
                           VR
                        1
                           Vo
            pn Junction in Forward Bias (1)
•Now let’s look at the condition where we
push current through the pn junction in the
opposite direction.
–Add more majority carriers to both sides
shrink the depletion region lower
V0diffusion current increases
•Look at the minority carrier concentration…
–lower barrier allows more carriers to be
injected to the other side
•Note that np0= ni2/NA and
pn0= ni2/ND

–This comes from two equations…


 n  ni e   EF  Ei  / kT   p  ni e Ei EF  / kT
•The forward bias voltage causes excess minority carriers to be injected
across the junction.
                 pn xn   pnoeV / VT
•The distribution of excess minority hole concentration in the n-type Siis an
exponentially decaying function of distance from xn
                                                x '  / L p
                pn x'  pno   pn xn   pno e
  –where Lp is the diffusion length (steepness of exponential decay) and is
  set by the excess-minority-carrier lifetime, p. The average time it takes for
  a hole injected into the n region to recombine with a majority carrier
  electron
                                            L p  D p p
   –The diffusion of holes leads to the following current density vs. x

                           JP  q
                                    Dp
                                    Lp
                                                       
                                         pno eV / VT  1 e
                                                              x  xn  / L p
•In equilibrium, as holes diffuse away, they must be met by a constant supply of
electrons with which they recombine. Thus, the current must be supplied at a rate
that equals the concentration of holes at the edge of the depletion region (xn).
Thus, the current due to hole injection is:

                         JP  q
                                Dp
                                Lp
                                            
                                   p no eV / VT  1      
  •Current due to electrons injected into the p region is…

                       Jn  q
                                 Dn
                                 Lp
                                            
                                    n po eV / VT  1     
  •Combined…
                           Dp                 V /V
                    I  qA
                           Lp
                               p no 
                                      Dn
                                      Ln
                                                   
                                         n po  e T  1
                                              
                                                             
                                             

                                       
                     I  I s eV / VT  1  I s eV / VT
             Minority Carrier Concentration and
             Current Densities in Forward Bias

•Current is due to the
diffusion of holes and
electrons. Current is
dominated by holes or
electrons depending on
the relative doping of NA
vs. ND

•Is NA> ND or NA<ND in this
example?
The Junction Transistor
   First BJT was invented early in 1948, only
    weeks after the point contact transistor.
   Initially known simply as the junction
    transistor.
   It did not become practical until the early 1950s.
   The term “bipolar” was tagged onto the name to
    distinguish the fact that both carrier types play
    important roles in the operation.
   Field Effect Transistors (FETs) are “unipolar”
    transistors since their operation depends
    primarily on a single carrier type.
Bipolar Junction Transistors (BJT)

   A bipolar transistor
    essentially consists of a pair of
    PN Junction diodes that are
    joined back-to-back.
   There are therefore two kinds
    of BJT, the NPN and PNP
    varieties.
   The three layers of the
    sandwich are conventionally
    called the Collector, Base, and
    Emitter.
Modern Transistors
    BJT Structure - Discrete




   Early BJTs were fabricated using alloying - an complicated
    and unreliable process.
   The structure contains two p-n diodes, one between the
    base and the emitter, and one between the base and the
    collector.
BJT Structure - Planar




The “Planar Structure” developed by
Fairchild in the late 50s shaped the basic
structure of the BJT, even up to the present
day.


   In the planar process, all steps are performed
    from the surface of the wafer
   BJTs are usually constructed vertically
       Controlling depth of the emitter’s n doping sets the
        base width


                        E          B             C


                    n
              p
                        n
Advanced BJT Structures
   The original BJT structure survived, practically
    unchanged, since the mid 60’s.
   As the advances in MOS development appears,
    some of the fabrication technology are also applied
    to the BJT.
       Low defect epitaxy
       Ion implant
       Plasma etching (dry etch)
       LOCOS (local oxidation of Si)
       Polysilicon layers
       Improved lithography
Isolation Methods

   The most significant advances in reducing overall device
    size and packing density have come from improved
    isolation methods.
   The traditional junction isolation technique requires the
    p+ deep diffusion to be aligned to the n+ buried layer
    that is covered by a thick epitaxial layer.
   The area (and hence junction capacitance) is determined
    by alignment tolerance, area for side diffusion, and
    allowance for the spread of the depletion region.
   Modern isolation techniques: oxide isolation, and trench
    isolation.
Oxide & Trench Isolation




   Oxide isolation processes were intorduced in the late 70’s. They utilize wet
    anisotropic etch (KOH) of the <100> Si wafer with Si3N4 as mask.
   The KOH etch will erode the <111> plane. Oxide is either deposited or
    grown to fill the V-grooves.
   The base and emitter are formed on the large mesa and the collector on the
    small mesa.
   To further reduce the area between adjacent mesa, trench isolation can be
    used, making use of trench etching.
   The trench is typically 2µm wide and 5µm deep. The trench walls are
    oxidized and the remaining volume is filled with polysilicon.
Example of BJT Specification Sheet
How the BJT works
                             Figure shows the energy
                              levels in an NPN transistor
                              under no externally applying
                              voltages.
                             In each of the N-type layers
                              conduction can take place by
                              the free movement of
                              electrons in the conduction
                              band.
                             In the P-type (filling) layer
                              conduction can take place by
                              the movement of the free
                              holes in the valence band.
                             However, in the absence of
                              any externally applied electric
                              field, we find that depletion
                              zones form at both PN-
 NPN Bipolar Transistor       Junctions, so no charge
                              wants to move from one layer
                              to another.
How the BJT works
                                    What happens when we
                                     apply a moderate voltage
                                     between the collector and
                                     base parts.
                                    The polarity of the applied
                                     voltage is chosen to
                                     increase the force pulling
                                     the N-type electrons and P-
                                     type holes apart.
                                    This widens the depletion
                                     zone between the collector
                                     and base and so no current
                                     will flow.
                                    In effect we have reverse-
Apply a Collector-Base voltage       biassed the Base-Collector
                                     diode junction.
                                    What happens when we apply a
Charge Flow
                                
                                    relatively small Emitter-Base voltage
                                    whose polarity is designed to forward-
                                    bias the Emitter-Base junction.
                                   This 'pushes' electrons from the
                                    Emitter into the Base region and sets
                                    up a current flow across the Emitter-
                                    Base boundary.
                                   Once the electrons have managed to
                                    get into the Base region they can
                                    respond to the attractive force from
                                    the positively-biassed Collector
                                    region.
                                   As a result the electrons which get
                                    into the Base move swiftly towards
                                    the Collector and cross into the
                                    Collector region.
Apply an Emitter-Base voltage      Hence a Emitter-Collector current
                                    magnitude is set by the chosen
                                    Emitter-Base voltage applied.
                                   Hence an external current flowing in
                                    the circuit.
Charge Flow                         Some of free electrons crossing
                                     the Base encounter a hole and
                                     'drop into it'.
                                    As a result, the Base region
                                     loses one of its positive
                                     charges (holes).
                                    The Base potential would
                                     become more negative
                                     (because of the removal of the
                                     holes) until it was negative
                                     enough to repel any more
                                     electrons from crossing the
                                     Emitter-Base junction.
                                    The current flow would then
Some electron fall into a hole       stop.
Charge Flow                         To prevent this happening we
                                     use the applied E-B voltage to
                                     remove the captured electrons
                                     from the base and maintain the
                                     number of holes.
                                    The effect, some of the
                                     electrons which enter the
                                     transistor via the Emitter
                                     emerging again from the Base
                                     rather than the Collector.
                                    For most practical BJT only
                                     about 1% of the free electrons
                                     which try to cross Base region
                                     get caught in this way.
                                    Hence a Base current, IB,
                                     which is typically around one
Some electron fall into a hole
                                     hundred times smaller than the
                                     Emitter current, IE.
BJT in Active Mode




   Operation
       Forward bias of EBJ injects electrons from emitter into base
        (small number of holes injected from base into emitter)
       Most electrons shoot through the base into the collector across
        the reverse bias junction (think about band diagram)
       Some electrons recombine with majority carrier in (P-type) base
        region
   “field-effect transistor” (FET)
       in a pnp FET, current flowing through a thin channel of n-type material is
        controlled by the voltage (electric field) applied to two pieces of p-type material on
        either side of the channel (current depends on electric field).




       Many different kinds of FETs
       FETs are the kind of transistor most commonly used in computers.
JFETs




Symbol: n-channel
JFET                D


D = Drain       G                                  +   D ID
G = Gate            S                            VGD
S = Source                                   _                 +
(Note: the circle
                                    IG
                                   G                          VDS
around the transistor
                                         +                     _
is optional)
Discuss:                                     VGS _
• Current relationship using KCL
                                                       S IS
• Voltage relationship using KVL
• Typical values
• n-channel vs. p-channel




                                                                    55
Output characteristics: n-channel JFET (typical)

                                                       VP = VGS(off) = pinchoff voltage
               ID
                                                       I DSS = I D   VGS =0, VDS  VGS  VP


                                                                 VGS = 0V
IDSS = 10 mA


                                                                 VGS = -0.5V



                                                                 VGS = -1.0V


                                                                 VGS = -1.5V


                                                           VGS = VP = -2.0V
          0                                                                             VDS (V)
               0         5            10              15                    20


JFET’s have two regions of operation:                      Note:
1) Ohmic (VDS < VGS - VP)                                  Two key specifications for
2) Saturation (or Beyond Pinchoff) (VDS > VGS - VP)        the JFET are IDSS and VP


                                                                                                  56
    Output characteristics: n-channel JFET (typical)

                   VP = VGS(off) = pinchoff voltage
                   I DSS = I D    VGS =0, VDS  VGS  VP

               ID

                                    Boundar y defi ne d by VDS = VG S - VP
                                                                             VGS = 0V
IDSS = 10 mA

                      Ohmic                Saturation
                                                                             VGS = -0.5V



                                                                             VGS = -1.0V


                                                                             VGS = -1.5V


                                                                       VGS = VP = -2.0V
          0                                                                                VDS (V)
               0              5               10                 15                20

                                                                                               57
Ohmic Region: n-channel JFET (typical) Ohmic Region defined by: VDS < VGS - VP
                ID

                                       Boundar y defi ne d by VDS = VG S - VP
                                                                                VGS = 0V
IDSS = 10 mA

                      Ohmic                   Saturation
                                                                                VGS = -0.5V



                                                                                VGS = -1.0V


                                                                                VGS = -1.5V


                                                                          VGS = VP = -2.0V
           0                                                                                  VDS (V)
                0               5                10                 15                20

           ID
                     VGS = 0V

                                                                                  I D    1
                                                                          slope       =
                       VGS = -0.5V                                                VDS   R SD
                              VGS = -1.0V


                         VGS = -1.5V
                              VGS = VP = -2.0V
       0                                                VDS (V)
           0                     0.5
                                                                                                        58
Ohmic Region: n-channel JFET (typical) Ohmic Region defined by: VDS < VGS - VP


           Ohmic Region Equation:
                2I DSS                        VDS 
                                                  2

           ID =     2       VGS - VP  VDS -      
                 VP                            2 
In the ohmic region the JFET acts like a voltage-controlled resistance
(called a Voltage Variable Resistor or VVR), where


  R SD = Source-to-Drain resistance       Its most common application is an
            VDS                          electronically controlled attenuator.
  R SD 
            ID




                                                                                  59
Saturation Region (or Beyond Pinchoff Region): n-channel JFET (typical)
• Saturation Region defined by: VDS > VGS - VP
The behavior of the JFET in the saturation region is modeled by the transfer
characteristic (see graph below) and by the transfer characteristic equation.
        Transfer Characteristic
                                          ID
                                  2
                   VGS 
    I D = IDSS 1 -                           IDSS

                   VP 



   VGS (V)                                     0
             VP                           0


      Transfer Characteristic Equation:
                                      2
                    VGS                                  IDSS
                                                              2  GS
                                                                 V - VP 
                                                                          2
      ID = IDSS 1 -                          or     ID =
                    VP                                   VP                   60
FET Biasing Circuits
There are various types of biasing circuits for FET’s. Several are shown below.
                    VDD        VDD       VDD               VDD       VDD        VDD


                        RD                   RD                RD                   RD
                                R1                                    R1

                    D                    D                 D                    D

                G                    G                 G                   G
           RG
                    S                    S                 S                    S
  +                            R2                 RG                 R2
  _   VG
                                                               RSS                  RSS




A) Fixed-bias                B) Fixed-bias        C) Self-bias             D) Fixed- +
Self-bias




                                                                                          61
                 Minority Carrier Concentration Profiles




   Current dominated by electrons from emitter to base (by design) b/c of the
    forward bias and minority carrier concentration gradient (diffusion) through
    the base
       some recombination causes bowing of electron concentration (in the base)
       base is designed to be fairly short (minimize recombination)
       emitter is heavily (sometimes degenerately) doped and base is lightly doped
   Drift currents are usually small and neglected
                     Diffusion Current Through the Base




   Diffusion of electrons through the base is set by concentration profile at the EBJ


   Diffusion current of electrons through the base is (assuming an ideal straight line
    case):


   Due to recombination in the base, the current at the EBJ and current at the CBJ are
    not equal and differ by a base current
                              Collector Current
   Electrons that diffuse across the base to the CBJ junction are swept across
    the CBJ depletion region to the collector b/c of the higher potential applied
    to the collector.




   Note that iC is independent of vCB (potential bias across CBJ) ideally
   Saturation current is
     inversely proportional to W and directly proportional to AE

          Want short base and large emitter area for high currents
     dependent on temperature due to ni2 term

                           Current
      Collector across the base to the CBJ junction are swept across
    Electrons that diffuse
    the CBJ depletion region to the collector b/c of the higher potential applied
    to the collector.




   Note that iC is independent of vCB (potential bias across CBJ) ideally
   Saturation current is
     inversely proportional to W and directly proportional to AE

          Want short base and large emitter area for high currents
     dependent on temperature due to ni2 term

                           Current
       Collector across the base to the CBJ junction are swept across
    Electrons that diffuse
    the CBJ depletion region to the collector b/c of the higher potential applied
    to the collector.




   Note that iC is independent of vCB (potential bias across CBJ) ideally
   Saturation current is
     inversely proportional to W and directly proportional to AE

          Want short base and large emitter area for high currents
     dependent on temperature due to ni2 term
             Base Current
   Base current iB composed of two components:
     holes injected from the base region into the emitter region




       holes supplied due to recombination in the base with diffusing electrons
        and depends on minority carrier lifetime b in the base



        And the Q in the base is

        So, current is



   Total base current is
                      Beta
   Can relate iB and iC by the following equation




    and b is



     Beta is constant for a particular transistor
     On the order of 100-200 in modern devices (but can be higher)

     Called the common-emitter current gain

   For high current gain, want small W, low NA, high ND
         Emitter Current
   Emitter current is the sum of iC and iB




    a is called the common-base current gain
            Early Effect                               Saturation region
                                                            Active region   VBE3


                                                                            VBE2


                                                                            VBE1




                    -VA                                                     VCE

   Early Effect
       Current in active region depends (slightly) on vCE
       VA is a parameter for the BJT (50 to 100) and called the Early voltage
       Due to a decrease in effective base width W as reverse bias increases
       Account for Early effect with additional term in collector current equation
       Nonzero slope means the output resistance is NOT infinite, but…
           IC is collector current at the boundary of active region
                           Early Effect
   What causes the Early Effect?
       Increasing VCB causes depletion region of CBJ to grow and
        so the effective base width decreases (base-width
        modulation)
       Shorter effective base width  higher dn/dx
             EBJ               CBJ

                   dn/dx
                                            VCB > VCB




                     Wbase
                           Early Effect
   What causes the Early Effect?
       Increasing VCB causes depletion region of CBJ to grow and
        so the effective base width decreases (base-width
        modulation)
       Shorter effective base width  higher dn/dx
             EBJ               CBJ

                   dn/dx
                                            VCB > VCB




                     Wbase
                           Early Effect
   What causes the Early Effect?
       Increasing VCB causes depletion region of CBJ to grow and
        so the effective base width decreases (base-width
        modulation)
       Shorter effective base width  higher dn/dx
             EBJ               CBJ

                   dn/dx
                                            VCB > VCB




                     Wbase