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Microsystem Integration Methodol

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					             Microsystem Integration
                  Methodology
        From Concept to Proof-of-Concept

                    Hisham El-Masry
                  September 24th, 2009


24/09/2009           CMOS ET - Vancouver 2009   1
CMC Microsystems

• An organization with a 25-year history of
  stimulating R&D
   – Discovery (leading to publications) and
   – Innovation (leading to products);
   – Involving micro- and nano-scale technologies;
   – Through delivery of research infrastructure (tools,
     IP, technology, assembly and fabrication process,
     packaging, test equipment and services)
   – A path to commercialization
  CMC enables and enhances the competitiveness of Canadian industry and
  researchers through innovation in the development and application of
  microsystems.


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 Microsystems

• Microsystems are comprised of a number of technologies integrated
  together with embedded intelligence and wireless network connectivity,
  to achieve the smallest, lowest power, highest performance solutions to a
  wide variety of problems




                                                                            ENVIRONMENT
          Transmitter                                        Sensor
                                                Signal
                         Processing
                                              Conditioning
              Receiver                                       Actuator
                                      Power

                         Fabrication/Assembly/Packaging

• CMC supports development of microsystems by providing infrastructure
  and deliverables for Design, Make, and Test

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    Sample Microsystems


Neural Sensing                                  Lab-On-Chip
System                                          System

Dr. R. Genov                                    Dr. K. Kaler
U. Toronto                                      U. Calgary




                 Vital Sign Monitoring System
                 Dr. B Kaminska
                 Simon Fraser

    24/09/2009     CMOS ET - Vancouver 2009                4
   Design for Integration

• Integration constraints should be compensated in design stage

• Constraints include inter-component functionality and manufacturing
  decisions
   – Functional constraints
        • Signal conditioning
        • Signal energy conversion
   – Manufacturing constraints
        • Material properties – electrical, mechanical, thermal, chemical, biological
        • Fabrication process – etching process, deposition process, surface/bulk post
          processing
        • Assembly – Flip chip, Interposer, Through Silicon Via
        • Packaging – consider parasitics, cavity size, bonding arrangement and pitch

• Decision of monolithic and/or hybrid integration determines emphasis
  of constraints on final device

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Functional Constraints:
Heterogeneous Co-Design
                         Microelectronics                                                                              MEMS/Microfluidics
                          Methodology                                                                                    Methodology




                                                                                                                       CAD Design Environment
                             Functional/
                                                                                                                                                System Level




                                                                                                                                                                 Training and Tutorials
                           behavioral Level

                                                CAD Design Environment         MICROSYSTEM
Training and Tutorials




                           Register Transfer                                 METHODOLOGY AND
                                Level*
                                                                                CAD DESIGN                                                      Device Level

                                                                               ENVIRONMENT
                           Logic/Gate Level*

                                                                                                                                                Physical Level


                           Circuit/transistor
                                 Level
                                                                                                                                                Process Level

                               Physical                                                System Level
                                                                         Environment




                                                                                                        Training and
                                                                         CAD Design




                             Level/Layout




                                                                                                          Tutorials
                                                                                       Physical Level

                                    Optoelectronics
                                     Methodology
                                                                                       Process Level



24/09/2009                                                                  CMOS ET - Vancouver 2009                                                             6
Methodology - Monolithic

                                System level Modeling

                         Functional model       Functional model
                           Device model           Device model
                              Layout                 Layout

                                       Fabrication
                                       Assembly
                                       Packaging

                                  Physical Validation
                                 Functional Validation


•   Monolithic integration involves 2 disparate devices fabricated on same
    substrate
•   Design for Integration constraints mainly from material properties and
    fabrication process
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Methodology - Hybrid

                                      System level Modeling

               Functional model             Functional model        Functional model
                Device model                  Device model            Device model
                   Layout                         Layout                   Layout

                 Fabrication                                 Fabrication
                                         Assembly
                                         Packaging

                                    Physical Validation
                                   Functional Validation


•   Hybrid integration involves 2 disparate devices fabricated on different
    substrates but assembled and/or packaged together for joint operation
•   Design for Integration constraints mainly from assembly and packaging

24/09/2009                        CMOS ET - Vancouver 2009                             8
Component Methodology
       DESIGN
       MAKE




                                           MNT
                MOSIS
       TEST




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Proof of Concept Environment
(PCE)

• CMC standardized environments for microsystem
  development, characterization and validation

• Incorporates platform technology, and development system
  modules, including packaging, assembly, and planar chip-scale
  technologies
     – Interoperable system, hybrid and monolithic integration
       technologies
     – User-configurable modules (useful for design of devices and of
       systems)
     – Means of providing embedded software support in a defined
       architecture
     – Pre-validated components for easy integration/customization
     – Reference designs
     – CAD tools for modeling components at the system level with the
       PCE, as well as controlling the operation of the physical system

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PCE Example: MEMS/FPGA
Platform

• Bench-top, rapid development platform for
  MEMS-based microsystems

• Incorporates application development with
  custom MEMS devices (co-design of MEMS
  and microelectronics/ESW)
     – Intelligence + sensing/actuation
     – Feedback loop control, signal processing

• Once validated, can lead to miniaturization of
  complete device
24/09/2009            CMOS ET - Vancouver 2009    11
PCE Example: MEMS/FPGA
Platform
                                                                                        Behavioral
                                                                                        Simulation
                  MATLAB          Functional/Behavioral Simulation                      Model
                                                                                                        System Level Design
                                                                                                        (MEMS Pro,
                  MATLAB               Partitioning and Analysis
                                                                                                        Coventor, Matlab)

                    ESW               Digital           Analog/RF     MEMS/mfluidic
                  Xilinx tools Matlab, Xilinx tools    Xilinx tools                    Specifications   Device Level Design
                                                                                                        (MEMS Pro, Tanner,
    Application




                                                                                                        Coventor)
                         Automated flows
                       from system-level to             COTS
                          implementation               Modules

                                                                                                        Physical Level Design
                                                                                       MEMS             (ANSYS, COMSOL,
                                                                                      Prototype         MEMS Pro, Coventor)
                     mProc

                                                      Wireless            Package
                    mProc
                                                                                                        Process Level Design
                                                                    HV                                  (MEMS Pro,
                    mProc              FPGA           Analog              Fixture
                                                                   Amp.                                 Coventor)
                                                                                         Device
                                                                                         Validation
                   Microsystems Rapid-Prototype
                                                                                    Proof of Concept, miniaturization

24/09/2009                                                   CMOS ET - Vancouver 2009                                           12
  PCE Example: MEMS/FPGA
  Platform
                                                                   Feedback
                                                                Capacitive sensor
                                                                     board




                                                       +/-10V                   +/-200V
                                                                                              “Socket”


 Application/          Embedded     Signal                        Signal                  Experimental
    User                SW and   Conversion                     Amplification                MEMS
  Interface             Digital/  (A/D, D/A)                                               Component
                        System   General Standards             Tabor 9400
    System Level                   (8-Channel,                                             Custom built,
Modeling CAD tools –                      2 MSPS,          4-Channel, 300V p-p             HV Fixture for
   CoventorWare,       Amirix AP1000     analog-in;
      MEMS Pro,                          4-channel,                                       68 PGA package
       Simulink,                          1 MSPS,
 Xilinx development                      analog-out)
       software

  24/09/2009                           CMOS ET - Vancouver 2009                                     13
PCE Example: Compact
Wireless Microsystem

• Generic, miniaturized wireless microsystem
  template developed by CMC to allow integration of
  COTS components

• Template for functional prototypes of ZigBee
  wireless-enabled microsystems

• Deliverable Includes:
     – Verified design file describing component set and
       circuit layout
     – Monitor Program software interface tool for
       developing application-specific software

24/09/2009              CMOS ET - Vancouver 2009           14
PCE Example: Compact
Wireless Microsystem

• Component Set
     – Master processor module (TI cc2430)
     – Foundation module (system interface and data
       communication) – 20 pin header, serial port level
       translation to RS232, multiple power options
     – Power module – Coin cell lithium rechargeable battery,
       local capacitors for burst power, boost converter
     – Sensor module – 3-axis linear accelerometer, 1-axis
       gyroscope
     – A/D conversion – 6-channel signal selector, 16 bit
       micropower A/D, 12-bit programmable window comparator
     – Low-Pass Filter – input filter module and amplifier, 4
       channel input (0-3V)
     – Shield module – ground plane to shield low level signals
       from MPU and RF signals
24/09/2009               CMOS ET - Vancouver 2009             15
    PCE Example: Compact
    Wireless Microsystem




                     Intermodule
                     connections




 Wireless Temp
 Sensor                   Data cable



                      TI cc2430
Thermistor       processor/radio SOC

    24/09/2009                         CMOS ET - Vancouver 2009   16
PCE Example: Compact Wireless Microsystem
                 Sensor head



                           IDC20
 3-axis
 accelerometer

                                            Data acquisition



                                                               Master processor
                                                               and radio




                        reverse side view
                 chip antenna            EMR shield layer
   24/09/2009             CMOS ET - Vancouver 2009                           17
PCE Example: Microfluidic Carrier
Platform

• The platform mediates or “carries” the electrical, optical and
  fluidic signals that comprise a microfluidic-based microsystem

• Consists of 6 main modular blocks:
     – Fluidic interface for dispensing and flow control
     – Modular optical analysis functionalities
     – Packaging and fixturing for electrical and fluidic interface to
       microfluidic chip to a driver subsystem
     – Subsystem driver for microfluidic chip
     – Chip design and fabrication services which offer user-designed
       functionalities for channel microfluidics
     – Integration of these capabilities into a prototype system
       environment for co-processing and microsystem level
       prototyping



24/09/2009                 CMOS ET - Vancouver 2009                 18
PCE Example: Microfluidic Carrier
Platform


             Driver Subsystem               Optical
                                            Module

              Data management
              Data Management
                    (ADC)
                    (ADC)


          Function
         Function
                           HV AMP
                           HV AMP             Fluidic
                                              Fluidic
          generator
         Generator
                                             Interface
                                             Interface
                                             Pump, valves
                                             flow metering




                                                               Fixturing


                                              FPGA
                                              FPGA
             Benchtop PC                      Board
                                              Board

                                      Microsystem level core
24/09/2009                          CMOS ET - Vancouver 2009               19
PCE Example: Microfluidic Carrier
Platform




               CMOS ET - Vancouver 2009

24/09/2009       CMOS ET - Vancouver 2009   20
Conclusion

• Integration constraints must be considered in
  design phase of microsystems development

• Design for Integration considers functional
  interoperability (design), physical
  implementation (make) and validation (test)
  issues in design phase

• Proof of Concept Environments provide
  framework for Design for Integration
24/09/2009        CMOS ET - Vancouver 2009      21
Comment or Questions



                Hisham El-Masry
               CMC Microsystems
             e-mail: elmasry@cmc.ca
              Phone: 1.613.530.4671




24/09/2009         CMOS ET - Vancouver 2009   22

				
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