CS220 - Logic Design TTL and CMOS by wxr16887

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									           CS220 – Logic Design                                          TTL and CMOS
             TTL and CMOS                                                 Introduction
●   Outline                                             ●   TTL and CMOS are families of digital ICs.
    –   Introduction                                        Gates within a family are ________, i.e. they
    –   Digital IC Terminology                              are easily connected together.
    –   TTL ICs                                         ●   The bipolar families (those which use a
    –   CMOS ICs
                                                            bipolar junction transistor or BJT as their
    –   Interfacing
                                                            base element) are: RTL, DTL, TTL, ECL,
●   References                                              HTL, and IIL. TTL and ECL are the most
    –   Digital Principles, Chapter 7                       commonly used.


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                 TTL and CMOS                                            TTL and CMOS
                  Introduction                                            Introduction
●   There are several types of TTL (transistor-         ●   Integrated circuits (ICs) may be grouped
    transistor logic): standard, low-power, high-           according to complexity:
    speed, Schottky, advanced Schottky, and
                                                            –   SSI: less than 12 gates on an IC (basic gates)
    advanced low-power Schottky.
                                                            –   MSI: 12 to 99 gates (adder, counters, etc)
●   The unipolar or FET or MOS families include:
    PMOS, NMOS, and CMOS. The MOS                           –   LSI: 100 to 9999 gates (clocks, calculators)
    families typically use much less ______ than
    the bipolar families. Most modern                       –   ______: 10,000 to 99,999 (microcontrollers)
    microprocessors are based upon CMOS.
                                                            –   ULSI: over 100,000 (microprocessors)
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              TTL and CMOS                                            TTL and CMOS
           Digital IC Terminology                                  Digital IC Terminology
●   Acceptable input and typical output voltage         ●   Any input between 0 V and 0.8 V is
    levels for TTL and CMOS inverters are                   acceptable as a logic 0, while an output logic
    shown on page 105.                                      0 level is guaranteed to be between 0 V and
                                                            0.4 V (typically 0.1 V). There is also a 0.4 V
●   For TTL any input between 2 V and 5 V is                low noise margin.
    acceptable as a logic 1, while an output logic
    1 level is guaranteed to be between 2.4 V           ●   Note that the noise margins for the CMOS
    and 5 V (typically 3.5 V). There is a 0.4 V             inverter (operated from a 10 V supply) are
    high ______ _______.                                    much higher, approximately 3 V (2.95 V).


                                                    5                                                            6
            TTL and CMOS                                                 TTL and CMOS
         Digital IC Terminology                                       Digital IC Terminology
●   We have assumed that the output of a gate               ●   If an input signal and output signal are
    can change instantaneously. In fact, it takes               separated by N gates, we can estimate the
    time for the output to change due to a                      worst-case total propagation delay as N
    change in input.                                            times the worst-case delay of a single gate.

      Inverter                                     1
                                                            ●   On a clocked or _____________ system, the
      Input
                        Time (ns)
                                                   0            total propagation delay will limit the clock
      Inverter                                     1            rate. (A 1 GHz clock has a period of 1 ns.)
      Output                                       0
                 tPLH ≈ 20 ns       tPHL ≈ 15 ns


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            TTL and CMOS                                                 TTL and CMOS
         Digital IC Terminology                                       Digital IC Terminology
●   In order to be compatible not only must the             ●   When a TTL output is high current flows from
    input and output voltage levels agree, but the              the output to the input of the succeeding
    input and output current directions and levels              gate. The output is said to source current.
    must match.                                             ●   Each family has a specified limit to the
●   As shown in Fig. 6-3 (pg 107), when a TTL                   number of inputs that can be connected to a
    output is low, current must flow from the input             single output. This limit is known as the
    of the succeeding gate into the output. The                 _______ of the logic family. TTL _______ is
    output is said to _______ current.                          typically 10 gates while that for CMOS is 50.


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            TTL and CMOS                                                    TTL and CMOS
         Digital IC Terminology                                                TTL ICs
●   Noise margins, propagation time, power                  ●   The six TTL __________ can be identified by
    dissipation, voltage levels, current levels and             markings on the IC. Here are the markings
    fanout are all used to characterize logic                   found on a hex inverter from each subfamily:
    families.                                                   –   Standard TTL:                  7404
                                                                –   Low Power TTL:                 74L04
●   The application may dictate the choice of
                                                                –   Low Power Schottky:            74LS04
    logic family – speed, power requirements,
                                                                –   Schottky TTL:                  74S04
    noise levels – must be considered.
                                                                –   Advanced Low Power Schottky:   74ALS04
                                                                –   Advanced Schottky:             74AS04

                                                       11                                                       12
              TTL and CMOS                                           TTL and CMOS
                 TTL ICs                                                TTL ICs
●   The subfamilies can be ranked by speed:            ●   Or by power dissipation:

      Speed TTL Subfamily                                   Power TTL Subfamily
      Fastest Advanced Schottky                              Low Low Power
              Schottky                                            Advanced Low Power Schottky
              Advanced Low Power Schottky                         Low Power Schottky
              Low Power Schottky                                  Advanced Schottky
              Standard TTL                                        Standard TTL
      Slowest Low Power                                      High Schottky

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              TTL and CMOS                                           TTL and CMOS
                 TTL ICs                                               CMOS ICs
●   The 7400 TTL series is called the                  ●   CMOS is noted for low ______ __________.
    commercial series. The 5400 series is              ●   There are three popular series: 4000, 74C00,
    known as the military (mil spec) series.               and 74HC00.
●   Unless the TTL IC is a _____ ____ device or
    has open-collector outputs, the outputs of
                                                       ●   The 4000 and 74C00 series are compatible.
    TTL gates cannot be connected together.                They can run from supply voltages of 3 to 15
                                                           V. The 74C00 series features functions and
●   Unconnected inputs will “float HIGH”, that is,         pin outs that are the same as the 7400 TTL
    act like they are connected to a logical 1. (It        series. (The 4011, 74C00 and 7400 are all
    is good practice to connect unused inputs.)            quad two-input NAND ICs.)
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              TTL and CMOS                                           TTL and CMOS
                CMOS ICs                                               Interfacing
●   The 74HC00 series is a high speed series           ●   Incompatible logic families can be connected
    with propagation delays on the order of 8 to           with additional ____________ circuitry. The
    12 ns. They also have a greater fan out than           ___________ circuitry supplies the required
    the 4000 or 74C00 series.                              voltage levels and current.
●   Special care must be used when working             ●   Interfacing TTL and CMOS is relatively
    with CMOS ICs to prevent damage due to                 straightforward when both are using a 5 V
    _______ __________. (See pg 117) It is                 supply. Refer to Fig. 6-15 (pg 119). Figs. (a)
    recommended that all unused inputs be                  and (b) use pull-up resistors to ensure
    connected to either ground or the power                sufficient current to the TTL gate when the
    supply.)                                               output is LOW.
                                                  17                                                      18
              TTL and CMOS                                            TTL and CMOS
                Interfacing                                             Interfacing
●   A CMOS gate can directly drive a single low         ●   CMOS gates can drive LED indicators using
    power TTL device. For driving multiple TTL              the circuits shown in Fig. 6-17. At voltages
    gates use a CMOS ____ as shown in Fig. 6-               greater than 5 V ____________ resistors are
    15 (d).                                                 required (Fig. 6-17 (c) – (f)).
●   Interfacing TTL and CMOS circuits that use          ●   A _____________ resistor is always needed
    different supply voltages is a bit trickier.            when driving an LED from a TTL gate.
    Some interface circuits that can be used in             (Refer to Fig. 6-18).
    this situation are shown in Fig. 6-16.


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