# Fuzzy Analog to Digital Converter

Document Sample

```					Fuzzy Analog to Digital
Converter
Santiago, Eduardo J.
Rogelio Palomera
Overview

Fuzzy Introduction
SAR Preface
Results
Conclusions
Future Work
What is Fuzzy?

It was Plato who laid the
foundation for what would become
fuzzy logic, indicating that there
was a third region (beyond True
and False) where these opposites
How Fuzzy Logic Works
Fuzzification
Ideal
Cold   Chilly           Warm    Hot
1

0
Crisp input           Temp
Inference
Ideal                          Halve       No            Halve
Cold   Chilly           Warm       Hot         Close       Change        Open
1

0
Temp
How Fuzzy Logic Works
Defuzzification
No            Halve
1
Change        Open

0
Crisp Output           Valve
Workings of a SA A/D
Binary Search

Control
S/H              Compare
Unit

– Compare Half and Half
and Half…
– Efficient Search
SAR
Algorithms
Workings of a SA A/D
Compare N times.
– Like Binary Search, Successive Approximation Takes
N Comparisons to Converge to the Desire Value
General Concept
– Applying Fuzzy to a SAR traditional
architecture.
– Fuzzification of the control unit on the SAR
– Verify speed differences
Fuzzification
– Knowledge Acquisition
– Membership Functions
– Shapes
Inference
– System Rules
– Alpha Cuts
Mamdani
– Regular Behavior
– Tolerant
Degree of wiliness to make a decision given fuzzy
information
Aggregation
– Method for fusing different implication result
into one final result.
– Union, Intersection…
Defuzzification
– Center of Gravity
Incorporates all the contributions.
Smooth Transition
Results
Number of Iterations for Convergence, FADC Vs SAR
– SAR takes an exact amount of iterations, n times for a resolution
of 2n bits. Our FADC convergence time is independent from the
resolution of the converter.
Sensitivity to Membership Function Base Width
– System present stability problems with respect to some critical
base width
– Convergence time, highly dependent on Membership Functions
shape and sizes
The Number of Iteration is Independent of the Clock
Speed
– Just like in the SAR, there is no dependence on the sampling
speed
Conclusion
Slight improvement over the traditional SAR architecture

The number of iterations is independent of the clock
speed

Shape of Membership Functions is a critical Design
Parameter, that has to be studied and analyzed more in
detail

System will converge with overshoot or in a slow steady
approach to the value, depending on the Membership
Functions shape
Future Work
VHDL
– More accurate simulation
FPGA
– Real world data collecting
– Mixed-Signal Characterization
Membership Refining Base on Statistical
Data
Questions

```
DOCUMENT INFO
Shared By:
Categories:
Stats:
 views: 63 posted: 9/3/2010 language: English pages: 15
How are you planning on using Docstoc?