Analysis and Control of Two Switches AC Chopper Voltage

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Analysis and Control of Two Switches AC Chopper Voltage Powered By Docstoc
					                                                                                Jin Nan, Tang Hou-Jun, Bai Liang-Yu,
    WSEAS TRANSACTIONS on CIRCUITS and SYSTEMS                                  Geng Xin, Yang Xiao-Liang




Analysis and Control of Two Switches AC Chopper Voltage Regulator
     Jin Nan1,2, Tang Hou-Jun1, Bai Liang-Yu1, Geng Xin1                  Yang Xiao-Liang2
                                                            1
School of Electronic, Information and Electrical Engineering      School of Electrical Engineering2
               Shanghai Jiao Tong University                  Zhengzhou University of Light Industry
                       Shanghai                                        Zhengzhou, Henan
                         China                                                 China
   {jinnan, hjtang, bailiangyu, gengxin}@sjtu.edu.cn                 yangxiaoliang@zzuli.edu.cn

Abstract: - In this paper, an improved topology of Buck type AC chopper voltage regulator and its control
strategy are proposed. This converter only using two power switches is low cost, easy implemented and the
phase synchronized circuit is not needed. The current path is provided in dead-time period by using simple
snubber circuit. The over-voltage protection varistor is also applied to absorb the voltage spikes which may
destroy the power switches. The voltage spikes in dead-time mode commutation are greatly reduced and the
power switches are protected. Furthermore, the feedforward and feedback control strategy is proposed to
suppress fluctuations and eliminate the harmonic components caused by power quality problems of the input
voltage. The proposed converter could realize wide range voltage regulation with high power transfer
efficiency and low total harmonic distortion. The steady-state equivalent circuit and the input power factor are
derived through theoretical analysis. The output filter design method is also presented. Based on the theoretical
analysis and calculation, an experimental prototype is setup. The simulation and experiment results verify the
validity of the proposed design.

Key-Words: AC chopper, Voltage Regulator, Pulse Width Modulation, Feedforward and Feedback Control,
Power Factor, Voltage Fluctuations

1 Introduction                                                 input voltage, input current or inductor current. As a
AC chopper converter has been widely used in                   result, these converters are prone to be disturbed and
automatic voltage regulators [1-3], soft-starter and           hard to be implemented. In addition, there are
speed regulator of the inductor motor [4-6], light             voltage spikes across the power switches during the
dimmer [7] and so on. There are some kinds of AC               commutation process. The previous researches have
voltage regulators such as auto-transformer and                not given enough consideration to the protection of
thyristor phase-controlled voltage regulator. Auto-            the power switches. Thus, the switching devices are
transformer has a large size and its voltage                   easy to be destroyed for lack of protection.
regulating speed is low. The thyristor phase                         In this paper, a buck type ac chopper voltage
controlled voltage regulator has a relatively fast             regulator with snubber circuit is proposed. The
response compared with the auto-transformer[8].                bilateral switch is composed of an Insulated Gate
However, the low input power factor and large                  Bipolar Transistor(IGBT) and a fast recovery diode
amount of the low-order harmonic currents are the              rectifier. Only two switching devices are used
major problems. Large passive filter is needed and             instead of three or four switches in the previous
the system cost is increased.                                  presented plans. Thus, cost is reduced and
      These problems can be solved by using PWM                commutation process is highly simplified. The
AC chopper. This chopper converter has some                    simple and effective snubber circuit consists of an
advantages such as high input power factor, fast               absorbing circuit and an over-voltage protection
dynamics and small size filter. Three switches [9,10]          varistor. When the two switches are both switched
and four switches [11-15] AC chopper are presented             off, they provide a current way to avoid high voltage
in the previous presented papers. In these researches,         spikes. Therefore, the voltage spikes are reduced
the switching patterns are critical and an alternate           and safe commutation is realized.
path has to be established in dead-time period. DC                   Based on the analysis of working principle and
regenerative snubber capacitor [1,7,11] was used to            commutation process, the equivalent circuit and the
realize safe commutation and enhance efficiency.               input power factor of the proposed converter are
However, these converters still have complex                   derived. The calculation methods of main
topologies    and      control   strategies.   These           component parameters are also investigated.
commutation strategies are related to the phase of



    ISSN: 1109-2734                                      208                            Issue 4, Volume 9, April 2010
                                                                                    Jin Nan, Tang Hou-Jun, Bai Liang-Yu,
    WSEAS TRANSACTIONS on CIRCUITS and SYSTEMS                                      Geng Xin, Yang Xiao-Liang




      The harmonic components and fluctuations in              voltage spikes will increase the switching losses and
the input voltage can also affect the quality of the           reduce the power transfer efficiency. Moreover, the
output voltage. In previous researches [6,9], peak             switching devices may be destroyed by high voltage
voltage or root-mean-square(RMS) voltage were                  spikes. In previous researches, four switches
used as the controller input. These signals change             converter and corresponding commutation strategy
only one time in each period of the input voltage.             are designed to reduce voltage spikes [15].
Thus, the low dynamic response speed is the major                    In this paper, the snubber circuits are added to
problem. In addition, the harmonic voltage problems            the power circuit to solve this problem. The snubber
caused by input voltage have not been investigated.            circuits are composed of absorbing circuits and
Therefore, in order to keep the output voltage stable,         over-voltage protection varistors. The absorbing
a voltage feedforward and feedback control strategy            circuit adopts a resistor connected in series with a
is proposed. This control strategy adopts                      capacitor to absorb the voltage spikes in dead-time
instantaneous voltage as the controller input. The             period. However, the absorbing circuit may not
output voltage can be stabilized and the dynamic               absorb the voltage spikes completely. When load is
response speed is improved. Furthermore, the                   highly inductive or the output current is high, the
proposed control strategy not only can suppress the            voltage spikes may destroy the switches directly. On
voltage fluctuations but also eliminate the harmonic           this occasion, the over-voltage protection varistor is
components caused by input voltage quality                     necessary for the safety of the switches. This
problems. As a result, this voltage regulator has              snubber circuit design can solve the problems
many advantages such as simple structure, easy                 caused by the voltage spikes in switching process
implementation, high input power factor, small size            and ensure the safety of the converter. The output
filter, low total harmonic distortion and high power           filter inductor L is used to store and transfer the
transfer efficiency. A prototype is set up based on            energy to the output side. The output filter capacitor
the theoretical analysis and calculation. The                  Co reduces the output voltage ripple.
simulation and experiment results verified the                                        R p1
validity of the proposed plan.
                                                                                      Ra1    Ca1
                                                                                                           uL        iL
2 Description of the converter                                            Li            S1                 L
There are several types of the ac chopper converter.                ii
A two switches topology is adopted and the snubber
circuits are designed to ensure safe commutation.                                                        Ra 2 R
                                                                                                                p2
The converter topology and commutation strategy                ui              Ci
                                                                                              ucp   S2               CO      RL   uo
are discussed as follows.                                                                                Ca 2


2.1 Converter topology
     The basic structure of the proposed converter is
shown in Fig.1. This Buck type AC Chopper is                                                                                 ZO
powered by the source voltage ui. Inductor Li and                                            (a)
capacitor Ci construct the input filter to absorb the
harmonic currents. S1 and S2 are bilateral switches
which are composed of IGBTs and fast recovery
diode rectifiers. This bilateral switch structure is
shown in Fig.1.b. Compared to other bilateral switch
structures, it only uses one IGBT. Thus, the driver
circuit is simplified and the cost is reduced. These
two switches work in complementary mode. In
order to avoid the two switches are on states
simultaneously, there is a small dead-time period. In
dead-time, the two switches are both switched off.                                           (b)
Thus, the inductor current is cut off. The inductive
load or output filter inductor will produce voltage            Fig. 1 - (a) The topology of two switches Buck type
spikes across the switches. In switching process, this         AC chopper voltage regulator (b) the structure of
                                                               bilateral switch



    ISSN: 1109-2734                                      209                                 Issue 4, Volume 9, April 2010
                                                                                    Jin Nan, Tang Hou-Jun, Bai Liang-Yu,
       WSEAS TRANSACTIONS on CIRCUITS and SYSTEMS                                   Geng Xin, Yang Xiao-Liang




2.2 Commutation strategy                                        ui and the output voltage uo can be considered as a
The voltage regulation function of ac chopper                   constant value in switching period. When ui>0, the
converter is realized by using PWM techniques to                operation modes and commutation strategy will be
the switching devices. The main operation modes                 discussed as follows.
are defined as: active mode and freewheeling mode.                   In kTS ~ (k+D)TS, S1 is switched on. The AC
For the sake of the safe commutation, dead-time                 chopper converter works in active mode. As shown
mode is added. The PWM control signals are shown                in Fig.3(a), the current path is ui-Li-S1-L-RL. In this
in Fig.2.                                                       mode, the inductor L stores the energy and the
                                                                current iL increases. The intermediate chopper
 us                                                             voltage ucp is equal to ui. In active mode, the power
                                                                flows from the voltage source to the load.
                                                                                   Rp1
                                                t
                                                                                  Ra1          Ca1

 Sg1
                                                                        Li              S1                            L                   io
                                                                                                             Ra 2                     
 Sg2                                                t
                                                                us           Ci                      S2             Rp2       CO RL       uo
                                                    t                                                        Ca 2                     
                    td
       Sg1

                                          t                                                            (a)
       Sg2                                                                              R p1
                                                                                  Ra1          Ca1
                                          t
         kTS     (k  D)TS    (k  1)TS
                                                                                                                         
Fig. 2 - The PWM control signals of the bilateral                       Li              S1                            L                   io
switches S1 and S2                                                                                           Ra 2                     
     Sg1 and Sg2 are the gate signals of S1 and S2. The         us           Ci                       S2            Rp2       CO RL       uo
designed PWM signals work in the complementary
mode. The commutation strategy has no relation
                                                                                                             Ca 2                     
with the phase of the input voltage or input current.
Therefore, the phase synchronized circuit is not
needed in this system. This commutation strategy                                                      (b)
not only simplifies the hardware design, but also                                       Rp1
avoids the phase detector errors. For example, in                                 Ra1          Ca1
previous researches [12,13,15], the PWM signals
are controlled by the input voltage phase. When the
input voltage contains harmonic components, the                         Li              S1                            L                   io
phase detector will be disturbed. Thus, the input                                                            Ra 2                     
voltage phase signal is not accurate. Because Sg1 and           us           Ci                      S2             Rp2       CO RL       uo
Sg2 are controlled by the input voltage phase. The                                                                                    
                                                                                                             Ca 2
disturbed PWM control signals will make the
voltage regulator work unstable. Another filter
circuit must be designed to ensure that the harmonic
components can be eliminated, and the phase                                                (c)
detector can work without harmonic disturbance.                 Fig.3 - The commutation process of ac voltage
The phase detector will make the system complex.                regulator (a) in active mode (b) in dead-time mode
As a result, commutation strategy used in this paper            (c) in freewheeling mode
has advantages such as easy implementation, low                       Ideally, at (k+D)TS, S1 is switched off and S2
cost and high stability.                                        should be switched on. However, for the sake of the
     As the switching frequency fS is much higher               safe commutation and protecting the switching
than the input voltage frequency f, the input voltage           devices, there is a small dead-time period. In this



       ISSN: 1109-2734                                    210                                        Issue 4, Volume 9, April 2010
                                                                                           Jin Nan, Tang Hou-Jun, Bai Liang-Yu,
     WSEAS TRANSACTIONS on CIRCUITS and SYSTEMS                                            Geng Xin, Yang Xiao-Liang




period, S1 and S2 are both switched off. In (k+D)TS                 ucp  g (t )ui (t )
~(k+D)TS+td, S1 and S2 are both switched off and the
                                                                                           Vim sin(kD )
                                                                                           
converter works in dead-time mode. In dead-time                      DVim sin( wt )                   sin(kS   )t
mode, there will be voltage spikes caused by the cut                                  k 1       k
off of the inductor current. These voltage spikes                                                                     (5)
may destroy S2 or cause high switching losses. The                       The first term of the right-hand side of equation
absorbing circuit composed of Ra1 and Ca1 reduces                   (5) is the fundamental component and the second
the voltage spikes. As shown in Fig.3(b), the current               term is the harmonic components around the
path is us-Li-Ra1-Ca1-L-RL. When voltage surges,                    switching frequency fS. The fundamental component
high voltage spikes or other potential over-voltage                 of ucp is proportional to the duty ratio D. When fS is
problems occur, the over-voltage protection varistor                high, the harmonic components can be absorbed by
Rp1, Rp2 can protect the switching devices.                         small-size output filter. As a result, the filtered
     At (k+D)TS+td, S2 is switched on. In (k+D)TS+td                output voltage of converter can be approximately
~(k+1)TS, S1 is off and S2 is on. The inductor current              expressed by:
freewheels through the load and S2. The current path                            ucp  g (t )ui (t )  DVim sin( wt ) (6)
is S2-L-RL shown in Fig.3(c). The inductor L
                                                                         According to equation (6), the output voltage
transfers the energy from the inductor to the load
                                                                    can be regulated by changing the duty ratio D. In
side. In this period, the converter works in
                                                                    equation (5), the lowest order harmonics of ucp
freewheeling mode.
                                                                    occurs at ωS−ω. The size of the filter components is
                                                                    inversely proportional to the orders of the harmonic
                                                                    voltage. Therefore, the switching frequency fS of the
3 System analysis and calculation                                   PWM signal should be kept high enough to raise the
To simplify the analysis and calculation, the                       order of harmonics to a high level.
following assumptions are made:
1 Because the dead-time td is short, only 1~2μs. The                 Sg1
energy stored in inductor is assumed to be constant
in dead-time mode. This mode is ignored in the
calculation of the main component parameters.
2 Input LC filter absorbs the high frequency input                                                                                 t
harmonic currents. As the switching frequency fS is
                                                                    uL
                                                                                    uS  uO
much higher than the input voltage frequency f, the
input power factor is assumed not to be affected by
the input filter.                                                                    kTS          ( k  D)TS      (k  1)TS        t
        The voltage source ui is defined as:                                                           uo
                         ui  Vim sin(t )              (1)         iL
where ω and Vim are the angular frequency and the
amplitude of the input voltage respectively.                                                     iL                                   Io
        Theoretically, the intermediate chopper voltage
ucp can be expressed as:                                                             kTS         (k  D)TS        (k  1)TS        t
                            ui      S1 is on                       uC
                     ucp                              (2)
                            0       S1 is off                                                              uC                    uo
        The PWM switching function of S1 is expressed
as:                                                                                 kTS          (k  D )TS       (k  1)TS        t
          1 kTS  t  (k  D )TS                                   Fig.4 - When ui>0,the waveforms of the inductor
 g (t )                                      k  N (3)            voltage and current, output capacitor voltage in
          0 (k  D )TS  t  (k  1)TS
                                                                    switching period
where TS and D are switching period and duty ratio
of the PWM control signal respectively. The fourier
                                                                    3.1 Input power factor analysis
series of g(t) with a switching frequency ωS is :
                                                                    Usually, in order to reduce the filter size, the
                            
                                2sin kD
             g (t )  D                  cos( kS t ) (4)         switching frequency fS is much higher than the input
                           k 1    k                               voltage frequency f. In switching period, the input
        Therefore, ucp is given by:                                 voltage ui and the output voltage uo are considered




     ISSN: 1109-2734                                          211                                  Issue 4, Volume 9, April 2010
                                                                                  Jin Nan, Tang Hou-Jun, Bai Liang-Yu,
    WSEAS TRANSACTIONS on CIRCUITS and SYSTEMS                                    Geng Xin, Yang Xiao-Liang




to be constant. When ui >0, the waveforms of                   reduces. The inductor transfers the energy to the
inductor voltage uL and current iL are shown in fig.4.         load. The inductor current ripple can be expressed
     The inductor voltage uL is :                              as:
      ui  uO kTS  t  (k  D)TS                                              ( k  D )TS u           u (1  D )TS
uL                                          (7)               iL  ki iL                  o
                                                                                                 dt   o             (15)
       uO     ( k  D)TS  t  (k  1)TS                                     kTS           L                L
                                                               where ΔiL is the inductor current ripple, ki is current
     In switching period, the average voltage of the
                                                               ripple coefficient. The inductor L has to meet the
inductor L is:
                                                               maximum ripple current :
               uL  D(ui  uO )  (1  D)uO   (8)
                                                                                                 u (1  D)TS
uL can be also expressed as :                                                               L o                      (16)
                                                                                                     iL k i
                                   di
                       u L (t )  L L         (9)                   The output filter capacitor current is : iC = iL−io.
                                   dt
                                                               The output voltage ripple Δuo is given by:
According to equation (6), the input current ii is
given by:                                                                        2 ( k  D )TS                I T
                                                                uo  uo ku   2 iL  io dt  L S                    (17)
                          ii  Di L          (10)                               C      kTS                     8Co
The average voltage of ucp is:                                 where Δuo is the output voltage ripple, ku is the
                                 diL                           voltage ripple coefficient. In order to reduce the
                 ucp  Dui  L        uO    (11)              output voltage ripple, Co has to meet the maximum
                                 dt
The equivalent circuit of equation (11) is shown in            ripple voltage:
Fig.5:                                                                                              i kT
                                                                                              Co  L i S              (18)
                                                                                                    8uo ku
            iL          L
                                                               4 Voltage control strategy design
                                                                     Voltage sags or swells are caused by the
                                                             disturbances or faults in power systems. Power line
 Dui                                  ZO     uO                disturbances in sensitive equipments such as
                                                             computers, communication equipments, and medical
                                                               equipments can often lead to the loss of valuable
                                                               data. According to equation (6), the output voltage
                                                               can be regulated by the duty ratio. The input voltage
Fig.5 - Steady-state equivalent circuit of AC                  fluctuation also affects the output voltage. Therefore,
chopper voltage regulator                                      it is necessary to design the effective controller to
     Zo is the equivalent impedance of the load R in           keep the output voltage stable.
parallel with the output filter capacitor Co. Let                    For fast output voltage control by the voltage
Z=Zo+jωL. According to the Kirchhoff’s laws:                   regulator, a fast control strategy is required.
                                  
                               DU i                            Generally, the previous research used peak voltage
                       
                       IL                    (12)             feedback control method. The peak voltage detector
                                Z
                                                               with diodes, capacitor, and resistor is used as a
The input power factor angle φ of the converter is:            voltage sensing circuit. When the input signal is
                         U              Z                    decreased, the capacitor is discharged through the
                arctg (  i )  arctg ( 2 ) (13)
                          Ii             D                     resistor, and when increased, the capacitor is
The input power factor (PF) of the two switches AC             charged. However, the peak voltage value changes
chopper voltage regulator can be expressed by:                 slowly compared to the instantaneous voltage value.
                       PF=cosφ                (14)             A fast peak voltage detector is proposed in [12].
According to equation (14), the PF is influenced by            Although it can detect the peak voltage faster, it can
output impedance and duty ratio of the control                 not eliminate the output voltage harmonics caused
signal.                                                        by input voltage.
3.2 Output filter design                                             Based on the analysis of the commutation
The output filter is used to reduce the voltage ripple         strategy and working principle, the voltage
and keep the current continuous. In ((k+D)TS+td                feedforward and feedback control strategy is
~(k+1)TS), the converter works in freewheeling                 designed. The instantaneous voltage is adopted as
mode. As shown in Fig.4, the inductor current                  the controller input. As a result, compared to RMS
                                                               voltage control or peak voltage control, the dynamic



    ISSN: 1109-2734                                      212                              Issue 4, Volume 9, April 2010
                                                                                  Jin Nan, Tang Hou-Jun, Bai Liang-Yu,
       WSEAS TRANSACTIONS on CIRCUITS and SYSTEMS                                 Geng Xin, Yang Xiao-Liang




performance is improved. In addition, the feedback              controller block and then is used to regulate the duty
control part can regulate the output voltage with no            ratio D. The duty ratio Dfk of feedback control is
steady-state error. The feedforward control part can            given by:
eliminate the voltage harmonic components and                                  D fk  k p (uor  uO )  ki m(t )
suppress the voltage fluctuations effectively. The                                                              (24)
                                                                               dm(t )
control system structure is shown in Fig.6.                                            uor  uO
                                                                                 dt
                                                                where kp, ki are proper proportional and integral
                           Df                                   gains respectively. m(t) represents the integral of the
                                                                output voltage error Δu. The integral part of the
                                                                designed controller makes the steady-state output
 ui                                                             voltage error zero. D is limited within the range
                           Dh     D               uo
 uor                                                            from 0 to 1. Thus, D can be expressed as:
                                                                          1                        D (t )  1
                                                                          
                                                                      D   D f  Dh  D fk      0  D (t )  1 (25)
 uor u                   D fk                                            
                                                                          0                        D (t )  0
                                                                     The digital signal processor is used to
                                                                implement the control algorithm and calculate the
Fig.6 - The feedforward and feedback control                    duty ratio in experiment. Then, the PWM control
system structure diagram                                        signals Sg1 and Sg2 are generated by modifying the
     The steady-state input voltage is defined as:              corresponding register value in DSP directly.
                    uir=uirpsin(314t)          (19)
The reference output voltage is:
                   uor=uorpsin(314t)           (20)             5 Simulation
uirp , uorp are the input peak-voltage and the                  The voltage regulator shown in Fig.1 is
reference output peak-voltage respectively. The                 implemented with the following parameters:
steady-state duty ratio Df at the operation point is:           fS=40kHz, Li=100μH, Ci=1μF, C=1μF, L=1mH,
                       Df =uorp/uirp           (21)             Ca1= Ca2=0.1μF, Ra1= Ra2=10Ω, Ro=40Ω.
     Because the output voltage is proportional to                   When D=0.5, the simulation results are shown
the duty ratio D. The feedforward control part is               in Fig.7. The input current is shown in Fig.7(b). The
designed as:                                                    intermediate chopper voltage and the output voltage
                     (Df+Dh)ui=uor             (22)             are shown in Fig.7(c) and Fig.7(e) respectively. The
     According to equation (22), the duty ratio Dh of           input current is nearly sinusoidal waveform. The
feedforward control part is:                                    intermediate chopper voltage ucp contains high order
                   Dh=( uor−Df ui)/ ui         (23)             harmonic components. By using the output filter,
     In previous researches, input voltage harmonics            the harmonic voltage is eliminated and the
suppression has not been investigated. The proposed             sinusoidal output voltage is obtained.
feedforward control uses the instantaneous value of                  The snubber circuits are designed to reduce the
input voltage and the reference output voltage as the           voltage spikes in commutation process. Fig.8(a)
controller input to regulate the duty ratio. At the             shows the voltage across S1 without snubber circuit.
operation point, the feedforward control can obtain             There are voltage spikes with the amplitude of 20V.
Dh to compensate the steady-state duty ratio Df . The           This will increase the power dissipation. Fig.8(b)
input voltage fluctuations can be suppressed and the            shows the simulation results using snubber circuit.
harmonics can be eliminated by the feedforward                  The voltage spikes are highly reduced. As a result,
control. In this way, the output voltage is stable with         the designed snubber circuit can reduce the voltage
low harmonic distortion. This method is simple and              spikes effectively and protect the switching devices.
effective. According to the circuit structure and the
working principle, when ui>uor , the feedforward
control can work effectively. Otherwise, the voltage
drops can not be compensated.
     The feedback PI control part is designed to
make no steady-state error. As shown in Fig.6, the
output voltage is subtracted from the reference
voltage. The error voltage passes through PI



       ISSN: 1109-2734                                    213                             Issue 4, Volume 9, April 2010
                                                                                                                 Jin Nan, Tang Hou-Jun, Bai Liang-Yu,
         WSEAS TRANSACTIONS on CIRCUITS and SYSTEMS                                                              Geng Xin, Yang Xiao-Liang




                                                                                            voltage is decayed abruptly up to 15% during 3
        400
        200
                                                                                            periods. The simulation results verified that the
          0                                                                                 proposed control plan can suppress the voltage
       -200
       -400                                                                                 fluctuations effectively.
             5                                                                                   400
                                                                                                                                                           ui
             0

             -5                                                                                                                                            uo
                                                                                                 200
        400
        200
          0
       -200                                                                                         0
       -400

             5
                                                                                                 -200
             0

             -5
                                                                                                 -400
        200                                                                                          0        0.05        0.1         0.15       0.2
             0
                                                                                            Fig.9 - Output voltage waveforms when input
       -200
                  0           0.02       0.04        0.06            0.08       0.1         voltage fluctuations occur
                                                                                                 Fig.10 shows the simulation results of the
                                                                                            output voltage waveforms when input voltage
Fig.7 - Simulation results of (a)input voltage ui                                           contains harmonic components. The total harmonic
(b)input current ii (c)intermediate chopper voltage                                         distortion (THD) in input voltage is 15.54%. By
ucp (d)inductor current iL (e)output voltage uo                                             using the proposed control method, the THD in
                                                                                            output voltage is only 0.20%. The spectrum analysis
                                                                                            is shown in Fig.6. The output voltage is a sinusoidal
                                                                                            waveform and the voltage harmonic components are
       150



       100                                                                                  highly reduced. The simulation results confirm that
                                                                                            the commutation process is not affected by the
                                                                                            harmonic voltage and the designed control strategy
        50



                                                                                            can work effectively to eliminate the harmonic
u(V)




         0                                                                      (a)
                                                                                            components.
       -50


                                                                                                 400
   -100
                                                                                                                                                            u
                                                                                                                                                                i
   -150                                                                                                                                                     u
     0.023            0.023      0.023   0.0231   0.0231    0.0231    0.0231                                                                                    o
                                           t(s)                                                  200
   150



   100
                                                                                                    0
       50
u(V)




        0                                                                       (b)              -200
       -50



   -100                                                                                          -400
                                                                                                     0   0.01 0.02 0.03 0.04    0.05 0.06 0.07 0.08 0.09        0.1
   -150
     0.023            0.023      0.023   0.0231   0.0231    0.0231     0.0231
                                           t(s)                                             Fig.10 - Output voltage waveform when input
Fig.8 - Voltage across S1 (a) without snubber                                               voltage contains harmonic components
circuits (b) with snubber circuits
     Fig.9 shows the simulation results of the output
voltage waveforms when input voltage fluctuations
occur. ui and uo are input voltage and output voltage
respectively. At 0.04s, input voltage increases
abruptly by 15% during 5 periods. At 0.08s, input



         ISSN: 1109-2734                                                              214                                Issue 4, Volume 9, April 2010
                                                                                            Jin Nan, Tang Hou-Jun, Bai Liang-Yu,
         WSEAS TRANSACTIONS on CIRCUITS and SYSTEMS                                         Geng Xin, Yang Xiao-Liang




                 1.2


                  1                                  input voltage
                                                     output voltage
   voltage THD




                 0.8


                 0.6


                 0.4


                 0.2


                  0
                       1   3   5   7   9   11   13    15   17   19
                                   harmonic orders

Fig.11 - Harmonic spectrum analysis of the input
and output voltage

6 Experiment
     The digital signal processor (DSP) can
implement with smaller size and lower cost than the
general purpose microprocessor. Moreover,
compared to the microcontroller, DSP has higher
processing speed and more powerful ability in
executing complex control algorithm. In experiment,
the overall system is divided into two parts: the
controller and the power circuit. The controller part
includes the DSP running the proposed control                               Fig.12 - (a) Control signal of the bidirectional
algorithms. The feedforward and feedback control                            switches (b) output voltage of AC chopper
algorithm of the proposed voltage regulator is
implemented using a DSPIC30f4011. Switching                                      70
period and duty ratio calculation are implemented in
software. The PWM pulses are generated by the                                    60
PWM module in the DSP. Voltage signals are
measured by using the analog digital converter
                                                                                 50
(ADC) module in DSP. The implementation of the
voltage controllers and PWM pulse generation is
performed in every switching period. The bilateral                               40
switch consists of the IGBT and the fast recovery                                                                         experiment
diode rectifier. 10A/600V IGBT and 10A/600V fast                                 30                                       calculation
recovery diodes are selected as the switching
devices. These switches are operated at a fixed
                                                                                 20
switching frequency 40kHz and a dead time of 1 us.
      In experiment, the steady-state RMS value of
the input voltage is 70V. When the duty ratio D is                               10
                                                                                  0.2        0.4         0.6           0.8              1
0.6, the ideal output voltage should be Uo=0.6Ui.
The PWM control signal is shown in Fig.12(a). The
waveform of the chopper voltage ucp is shown in
                                                                              Fig.13 - the output voltage of experiment and
Fig.12(b). The experiment results show that the
                                                                              calculation with different duty ratio
input voltage is chopped into segment and the
                                                                                  The input power factor is shown in Fig.14.
voltage spikes across the switch are reduced.
                                                                            According to equation (14), the input power factor
      The RMS value of output voltage is 41.6V. The
                                                                            can be obtained with different duty ratio. The
voltage error is caused by the voltage drop of the
                                                                            experiment results show that the lowest power
switching devices and the power loss of the
                                                                            factor is 0.97. Compared to thyristor phase control
converter. The output voltage with different duty
                                                                            circuit, the input power factor is improved. Thus,
ratio is shown in Fig.13.
                                                                            the power line transmission loss caused by reactive



         ISSN: 1109-2734                                              215                           Issue 4, Volume 9, April 2010
                                                                                        Jin Nan, Tang Hou-Jun, Bai Liang-Yu,
    WSEAS TRANSACTIONS on CIRCUITS and SYSTEMS                                          Geng Xin, Yang Xiao-Liang




power can be reduced.                                                  stable sinusoidal wave. The voltage fluctuations can
     The power transfer efficiency with different                      be suppressed and the output voltage is not
duty ratio is shown in Fig.15. In this experiment, the                 influenced by the input voltage fluctuations. The
highest power transfer efficiency can be achieved at                   proposed feedforward and feedback controller can
96.8%. The experiment results verify that the                          regulate the duty ratio and keep output voltage
proposed voltage regulator has high power factor                       stable.
and high efficiency.



       1


    0.98
                                           calculation
                                           experiment
    0.96


    0.94


    0.92
                                                                       Fig.16 - output voltage waveform in experiment
                                                                       when input voltage fluctuations occur
     0.9
             0.2        0.4         0.6         0.8          1

                                                                       7 Conclusion
Fig.14 - input power factor characteristics of                               An improved topology of two switches AC
experiment and calculation with different duty ratio                   chopper voltage regulator and the output voltage
                                                                       control strategy are proposed. The commutation
                                                                       strategy and the operation modes are investigated.
                                                                       The snubber circuit is added to reduce the voltage
       1
                                                                       spikes in dead-time period and ensure the safe
                                                                       commutation. The steady-state equivalent circuit
    0.95                                                               and the input power factor are derived through
                                                                       theoretical analysis. The output filter is designed
                                                R=40                  and the parameter calculation method is also
     0.9
                                                R=100                 presented. The proposed voltage regulator has high
                                                                       input power factor, high power transfer efficiency.
    0.85
                                                                       The feedforward and feedback control method is
                                                                       designed to keep output voltage stable. The input
     0.8                                                               voltage fluctuations can be suppressed. In addition,
                                                                       the harmonic components can also be eliminated. A
    0.75
                                                                       prototype is setup to test the performance. In
                                                                       experiment, the input power factor can be achieved
                                                                       to 0.99, and the power efficiency can reach 97.6%.
           0.2   0.3   0.4    0.5   0.6   0.7    0.8   0.9             When input voltage fluctuations occur, the output
                                                                       voltage can be regulated stable. Simulation and
Fig.15 - power transfer efficiency characteristics                     experiment results confirmed the validity of the
     When input voltage fluctuations occur, the                        proposed plan.
waveforms of input and output voltage are shown in
Fig.16. In this experiment, the RMS value of the
steady-state input voltage is 70V and the RMS value                    References:
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    ISSN: 1109-2734                                              216                            Issue 4, Volume 9, April 2010
                                                                              Jin Nan, Tang Hou-Jun, Bai Liang-Yu,
    WSEAS TRANSACTIONS on CIRCUITS and SYSTEMS                                Geng Xin, Yang Xiao-Liang




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    ISSN: 1109-2734                                    217                            Issue 4, Volume 9, April 2010