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The International Journal of Computer Science and Information Security is a monthly periodical on research articles in general computer science and information security which provides a distinctive technical perspective on novel technical research work, whether theoretical, applicable, or related to implementation. Target Audience: IT academics, university IT faculties; and business people concerned with computer science and security; industry IT departments; government departments; the financial industry; the mobile industry and the computing industry. Coverage includes: security infrastructures, network security: Internet security, content protection, cryptography, steganography and formal methods in information security; multimedia systems, software, information systems, intelligent systems, web services, data mining, wireless communication, networking and technologies, innovation technology and management. Thanks for your contributions in July 2010 issue and we are grateful to the reviewers for providing valuable comments. IJCSIS July 2010 Issue (Vol. 8, No. 4) has an acceptance rate of 36 %.
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(IJCSIS) International Journal of Computer Science and Information Security,
Vol. 8, No. 4, July 2010
Fault Diagnosis Algorithm for Analog Electronic
Circuits based on Node-Frequency Approach
S.P. Venu Madhava Rao
madhavaraosp@gmail.com
Dr. N. Sarat Chandra Babu & Dr. K. Lal Kishore
Abstract: In this paper we present a novel approach to In [5] a new method in the construction of fault
analog electronic circuits fault diagnosis based on dictionary is proposed where a combination of
selection of both nodes and frequency for the first time sensitivity based and information channel based
as far as we know. Two fault isolation and localization approaches are used. Also the construction of integer
algorithms are presented in this paper. The first coded fault dictionary using Quasi-Hamming distance
algorithm selects nodes and frequencies which isolate is proposed in this paper. Heuristic methods using
all or desired number of faults. The second algorithm evolutionary computation in combination with the
presented converts the fault dictionary contents into Fuzzy logic is presented in [6], the main purpose of
binary form. Importantly this helps in the automation such a combination is to generate an optimized
of the fault diagnosis process. frequency test set and also ambiguity sets are provided
to avoid take care of tolerance effects. An SBT based
Keywords: Fault Dictionary, Fault Isolation Table, approach is proposed in [7] where the fault dictionary
Binary dictionary, singletons. is constructed using test node voltages and the method
used to approximate is Section wise piecewise linear
I. Introduction (SPLF) method. A procedure for the selection of test
Analog Fault Diagnosis has been of immense frequencies is presented in [8]. This is based on the
research interest for the past three decades and evaluation of algebraic indices and the inverse norm of
continues to sustain the same zeal even today. The a sensitivity matrix of the circuit under test. In [9], [10]
main challenges today in analog fault diagnosis are to and [11], fault diagnosis based on different types of
design universally accepted fault models, cost neural networks has been proposed. In [12] knowledge
effective, faster and accurate diagnosis of faults. base and fuzzy logic have been used in fault diagnosis.
Importantly all this is desired even in the presence of The knowledge base is developed in two ways, one by
inherent characteristics of analog circuits like simulations and the second is based on heuristic
tolerances, non linearity, in accessible test nodes etc. symptoms observed by the operator. In [13] the
ambiguity sets are divided based on the lowest error
There are two categories of analog circuit fault probability in the construction of fault dictionaries is
diagnosis: Simulation before test (SBT) and proposed. This paper used Monte Carlo techniques for
Simulation after test (SAT) [1]. The SBT approach sensitivity analysis. In [14] a fault threshold function
involves the generation of fault dictionary by and a fault criterion have been proposed for the fault
simulating the circuit and then using pattern diagnosis of circuits with tolerance. An algorithm is
recognition to identify the faults. This is the most proposed in [15], which aims to reduce the size of the
popular method adopted. In SAT approach sufficient fault dictionary. In [16] and [17] different methods and
measurements are needed to identify faulty parameters. algorithms are used to reduce the size of the fault
In the SBT approach construction of fault dictionary is dictionaries. In [18] time slot specification based
an efficient method. Different test measurements like approach is used in analog fault diagnosis. For this
node voltages, current sources, branch currents, built in current sensors and test point insertion is used.
frequency measurements etc are used in the A sensitivity based approach using randomized
construction of fault dictionaries [2]. There are some algorithms is used to diagnose soft faults in [19].In
algorithms developed to find out testable [20] the algorithm proposed tries to find the minimum
measurements using numerical approach in [3] and [4]. number of test point for maximum fault isolation. This
approach is based on information measure of the test
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ISSN 1947-5500
(IJCSIS) International Journal of Computer Science and Information Security,
Vol. 8, No. 4, July 2010
points. The diagnosis proposed in this paper [21] is ambiguity sets. Then the original readings are replaced
based on global sensitivity analysis method. Also by integer numbers indicative of the ambiguity set to
fuzzy logic is used to obtain the sensitivity curves. In which these values belong.
[22] an efficient method is applied in the selection of
test nodes. This is done by searching for the minimum The test frequency set is represented by f1 to fM, where
entropy index based on the available test points. An N is the number of frequencies chosen.
efficient graph based method is proposed in [23].This
method can be used to select optimum test point The nodes are represented by n1 to nP, where P
selection and also can be sued to build DFT. Efficient represents the total number of nodes.
Inclusion methods and Exclusion methods are The faults are represented by F0(nominal value) to FN,
proposed in [24] to select or de select test nodes, in where N represents the total number of faults.
other words the faster selection of optimum test points.
A novel multi frequency approach is proposed in [25] Algorithm 1:
which drastically reduce the number of test frequencies
needed to achieve maximum fault diagnosis. The Step 1: Select the test frequency set (f1 to fM).
reduction achieved is better than any known methods.
The method proposed in [26] consists of two parts. Step 2: Select the test nodes (n1 to nP) which are
One is the creation of fault dictionary consisting of accessible for each frequency.
nominal and faulty states of the components and
Step 3: Note the actual readings of the circuit for the
second is a novel fault detection and localization
test frequency set and nodes chosen in steps 1 and 2.
algorithm.
Step 4: Form the integer coded dictionary using the
This paper proposes a novel approach where both test
ambiguity sets.
node and multi frequency techniques are used. This
approach is used to diagnose all the faults or the Step 5: Identify unique integer codes called singletons
desired number of faults. for each row i.e. for each of the nodes selected.
II Node-Frequency Approach Step 6: Identify the node (nK) which has maximum
number of singletons for a frequency fJ., where 1<K≤P
In the analog fault diagnosis the prominent methods
and 1<J≤M. Select this node-frequency (nK, fJ) pair. If
used are multi node or multi frequency measurements.
more than one node satisfies this condition, then go to
The research so far has been on developing methods to
step 9.
find out optimum number of test nodes or test
frequencies that can identify the desired faults. This in Step 7: If the number of singletons is equal to N+1,
some cases leads to more number of measurements then go to step 12. If else go to next step 8.
being made thus drastically increasing the size of the
dictionary. Step 8: Call Algorithm 2, to form binary dictionary
which helps in identifying other nodes from the
In this paper we have taken basically nodal analysis remaining (P-1) nodes belonging to the frequency fJ,
and then a choice of test frequencies is made based on which can identify different faults. If all faults are
[27]. The proposed algorithm selects the nodes and isolated then go to step 12.
frequencies which isolate all or desired faults.
Step 9: Find the total number of singletons for each
In this paper two algorithms are presented. The first test frequency. Then choose the node belonging to the
algorithm is for fault isolation and localization. The frequency which has the maximum number of
second algorithm converts the integer coded fault singletons. If more than one frequency satisfies this
dictionary into a binary dictionary which helps in condition choose any one of the nodes randomly.
faster fault isolation.
Step 11: If all the faults or desired number of faults are
The actual measurements of the CUT are noted down not isolated, then repeat steps from 6 with the next
and these values are normalized if necessary. From highest number of singletons.
these values we form ambiguity sets. Now we
construct another table called integer coded table using Step 12: Stop
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Algorithm 2: Table 1: Actual readings of the imaginary CUT
Step 1: Replace all the singletons by the value ‘1’ and Node Nominal Fault-1 Fault-2 Fault-3
others by ‘0’ in the integer coded table, resulting in a
binary table. Node-1 1.22 0.33 0.78 0.34
Step 2: If nK is the node chosen, then calculate (nM- Node-2 1.33 0 0.09 2.1
nK), where 1<M≤P, thus forming another table called
Node-Wise Fault Isolation table. This results in three Node-3 1.45 0 0.99 2.5
values 0,-1 or 1. The value ‘0’ indicates that the fault
has been identified by both nM and nK or both the
nodes did not isolate the fault, whereas ‘-1’ indicates As seen from the Table 1 above, we see that for
that the fault has been isolated by only nK and ‘1’ is an node -1 measurement, fault-1 and fault -3 have almost
indication that the fault has been identified by the node the same value and thus belong to the same ambiguity
of interest i.e. nM. Therefore choose the node nM which group. Also these two values are the least among all
has maximum number of 1’s. and are assigned values ‘1’. The other values do not
Step 3: Check the total number of faults isolated by the belong to any ambiguity group and are assigned values
2 for fault-2 and 3 for nominal, based on the ascending
nodes nk and nM. If this sum is equal to P, then Stop,
otherwise choose the node which has the next highest range of the values. Using the same procedure for all
the remaining nodes, integer coded fault dictionary is
number of 1’s.
formed and is shown in Table 2.
Step 4: Repeat step 3 till the desired fault isolation is
Table 2: Integer Coded Fault Dictionary
achieved or no further isolation is possible.
Step 5: Return to Algorithm 1 Node Nominal Fault-1 Fault-2 Fault-3
III. Integer coded dictionary based on ambiguity sets Node-1 3 1 2 1
The formation of the Integer coded dictionary based on Node-2 2 1 1 3
ambiguity sets is illustrated by an example in this
Node-3 3 1 2 4
section. Assume that the actual readings of an
imaginary circuit under test are given in Table 1
below.
In the Table 2, we see that node-1 has 2 singletons,
node-2 has 2 singletons and node 3 has 4 singletons.
IV Illustration
The circuit used here is a 2nd order Butterworth High
Pass Filter as shown in Fig. 1. The circuit has been
simulated using Tina Spice software.
The faults chosen are taken as 50% increase or
decrease in the component values. Thus CUT has been
simulated for these faults by changing the component
values by ±50%.
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(IJCSIS) International Journal of Computer Science and Information Security,
Vol. 8, No. 4, July 2010
Figure 1: Second Order Butterworth-High Pass Filter
R2 R3
3
V1 15
4
2
-
1 6 4
C1 C2 2 3 + OP1
+
7
V2 15
VG1
+
R5 10k
R1
R4
Using the Step1 from the Algorithm 1, we have that all these nodes are accessible. Using Step3
chosen the test frequency fT= {500Hz, 800 Hz, and 4, the CUT has been simulated and the
1000Hz, 1200Hz, and 1500Hz}. From Step 2, integer coded dictionary as shown in Table 3 is
we have chosen four nodes with the assumption formed based on the actual readings.
Table 3: Integer coded Dictionary for the HP Filter
Frequency=500Hz
Nodes/Faults F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 F10 F11 F12
N1 5 7 2 4 7 6 4 8 3 8 1 6 4
N2 2 3 1 2 3 2 2 5 6 4 1 4 1
N3 2 3 1 2 3 2 2 5 6 4 1 4 1
N4 5 6 2 4 9 7 3 10 1 7 1 8 1
Frequency =800 Hz
N1 7 6 3 5 11 10 4 12 2 9 1 8 4
N2 6 5 4 5 9 7 5 10 1 7 3 8 2
N3 6 5 4 5 9 7 5 10 1 7 3 8 2
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N4 7 6 5 5 12 10 4 11 1 8 3 9 2
Frequency=1000Hz
N1 4 3 5 3 8 6 3 7 1 5 2 5 3
N2 6 5 7 5 9 8 4 10 1 7 3 8 2
N3 6 5 7 5 9 8 4 10 1 7 3 8 2
N4 6 5 7 4 12 10 3 11 1 8 3 9 2
Frequency= 1200 Hz
N1 5 3 9 4 10 7 3 8 1 6 2 6 4
N2 6 4 9 5 11 8 4 10 1 6 3 7 2
N3 6 4 9 5 11 8 4 10 1 6 3 7 2
N4 6 5 9 4 11 9 3 10 1 7 4 8 2
Frequency=1500Hz
N1 5 2 8 3 7 6 2 6 1 5 3 5 4
N2 4 3 9 3 8 6 3 7 1 4 3 5 2
N3 4 3 9 3 8 6 3 7 1 4 3 5 2
N4 7 5 11 4 11 10 3 9 1 7 6 8 2
The number of singletons for each node for the As seen from the Table 4, node1 and node 4 of
whole frequency set is calculated (Step 5) and frequency set f2, and node 4 of frequency set f3
tabulated in Table 4. Here the frequencies are have maximum number of singletons equal to
f1=500Hz, f2=800Hz, f3=1000Hz, f4=1200Hz 11, i.e. these nodes can isolate 11 of the total
and f5=1500Hz. thirteen faults. We have chosen node 1(or even
node 4 can be chosen) of the frequency set f2 i.e.
Table 4: Total number of singletons 800Hz as it has maximum number of total
singletons (step 9). As the condition mentioned
Node/Freq f1 f2 f3 f4 f5 in step 7 is not satisfied, binary table is formed
as per step 8.
N1 4 11 6 7 4
The binary table is formed replacing Table 3
N2 2 8 7 9 7
contents by either ‘0’ or ‘1’. All the singletons
N3 2 8 7 9 7 are replaced by ‘1’and ambiguity sets by ‘0’
(step 1 of Algorithm 2). The binary fault
N4 8 11 11 9 9 dictionary is shown in Table 5.
Total 16 38 31 34 27 After the execution of the step 2(Algorithm 2),
the results are shown in the Node-wise Fault
isolation Table 6.
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Table 5: Binary Dictionary
Frequency: 800Hz
Nodes F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 F10 F11 F12
N1 1 1 1 1 1 1 0 1 1 1 1 1 0
N2 1 0 1 0 1 0 0 1 1 0 1 1 1
N3 1 0 1 0 1 0 0 1 1 0 1 1 1
N4 1 1 0 0 1 1 1 1 1 1 1 1 1
Table 6: Node-Wise Fault Isolation Table
Frequency: 800Hz
Nodes F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 F10 F11 F12
N1 1 1 1 1 1 1 0 1 1 1 1 1 0
N2-N1 0 -1 0 -1 0 -1 0 0 0 -1 0 0 1
N3- N1 0 -1 0 -1 0 -1 0 0 0 -1 0 0 1
N4- N1 0 0 -1 -1 0 0 1 0 0 0 0 0 1
From the Binary dictionary of Table 5, we can is achieved by a single test frequency of 800Hz
see that the faults isolated are F0, F1, F2, F3, F4, F5, and nodes 1 and 4.
F7, F8, F9, F10, and F11, where as faults F6 and F12
are not isolated. The faults not isolated is V. Conclusions
deduced from the ‘0’ entry in the corresponding
columns. As seen from the Table 6, the total In this paper we have presented a novel method
number of 1’s is two for (N4-N1), one for (N3- using node-frequency approach in analog fault
N1) and (N2-N1). So we choose the (N4-N1) diagnosis. We have presented two algorithms,
column, i.e. node 4 is chosen. The faults isolated the first one for choosing the frequencies and
by this node 4 are F6 and F12. As seen these are nodes for the desired fault isolation and the
the faults which are not isolated by node 1. second is for the generation of binary
dictionaries. The effectiveness of these two
In the example discussed in this paper we have algorithms was demonstrated using a HP filter
been able to achieve 100% fault diagnosis. This circuit.
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