System-Level Design Using
Y-Charts
Bart Kienhuis, UCB
Design problem
Application Architecture Integrated
Circuit
IC
Multi-Functional
Multi-Standard
Y-chart Approach
Architecture Applications
Applications
Applications
Instance
Mapping
Performance
Analysis
Performance
Numbers
Design Space Exploration
Architecture Applications
Applications Performance
Parameters Instance
Applications
Mapping Numbers
Performance
Analysis
Performance
Numbers
The Acquisition of Insight
Abstraction Pyramid
High Low
Back of the Envelope
Explore
Estimation Models
Cost of Modeling
Opportunities
Abstract
Executable Models
Cycle Accurate
Models
VHDL
Models
Low High
Stack of Y-chart Environments
Estimation
Models
Applications
Applications
Applications Levels of
Mapping Abstraction
Matlab/
Mathematica
Cycle Acc. Applications
Applications
Applications
Models
Performance
Numbers Mapping
Cycle Acc.
Simulator
Performance
VHDL Applications
Applications
Numbers Applications
Models
Mapping
VHDL
Simulator
Move Down into
Lower Abstractions
Performance
Numbers
Stepwise Exploration of the
Design Space
High
Medium
Low
Stepwise refinement of the Design Space
of an Architecture
Example
High Performance DSP Architecture
High Bandwidth
Parallelism Memory
Video Video
Programmable Communication Network
In Out
Streams PE1 PE2 PE3 General
Purpose
Processor
Controller
Weakly Programmable
Developed a Y-chart Environment for
Stream-based Dataflow Architectures
Realization of
a Y-chart Environment
• Developed a retargetable architecture
simulator for the Stream-based Dataflow
Architecture, using only concurrency
models, in particular Kahn process
networks.
• Developed a smart mapping approach
based on the notion of Models of
Computation and Models of Architectures.
Y-charts and Ptolemy
• We like to show that the Ptolemy system
is very useful to realize Y- chart
environments.
• The Ptolemy system has well established
computational models to express both
Architectures as well as Applications
• The Ptolemy system has a well engineered
software architecture