CSE ACADEMIC PLAN (2010-11) III Year B.Tech I-Semester

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CSE ACADEMIC PLAN (2010-11) III Year B.Tech I-Semester Powered By Docstoc
					                       CSE

           ACADEMIC PLAN (2010-11)

            III Year B.Tech I-Semester


1. COMPUTER GRAPHICS

2. DESIGN AND ANALYSIS OF ALGORITHMS

3. DATA   COMMUNICATION SYSTEMS

4. FORMAL LANGUAGES AND AUTOMATA THEORY

5. MICROPROCESSOR AND INTERFACING

6. SOFTWARE TESTING METHODOLOGIES
                                      COMPUTER GRAPHICS


   UNIT-I :- SYLLABUS
     Introduction, Application areas of Computer Graphics, overview of graphics systems,
     video-display devices, raster-scan systems, random scan systems, graphics monitors and
     work stations and input devices.

   LEARNING OBJECTIVES:-
   At the end of unit-I student must be able to

        Summarize the various Application areas of Computer Graphics.

        Explain the overview of Computer Graphics.

        Identify different types of video display devices.

        Distinguish raster-scan systems and random-scan systems.

        Describe graphics monitors and workstations.

        Describe various types of input devices.

LECTURE PLAN:-

 UNIT –I : 7 hours

       1st hr : Introduction to computer graphics.

       2nd hr: Application areas of computer graphics.

       3rd hr: Classification of video display devices.

       4th hr: Raster-scan systems

       5th hr: Random-scan systems.

       6th hr: Graphic monitors.

     7th hr: Work stations.
ASSIGNMENT –I:-

   1.a)what are the most popular alternatives to the raster scan CRT.Distinguish the merits and
   limitations of the video display devices.
    2)what are the major component of CRT device?explain their role in the graphical display?

    3).Write short notes on the application areas of Computer Graphics.

    4)Mention different types of video display devices.

   UNIT-II :- SYLLABUS

       Output primitives: Points and lines, line drawing algorithms, mid-point circle and
       ellipse algorithms. Filled area primitives: Scan line polygon fill algorithm, boundary-fill
       and flood-fill algorithms.

   LEARNING OBJECTIVES:-

   At the end of unit-II student must be able to

       Draw point and lines.

       Compute different types of line drawing algorithms.

       Comare mid-point circle and ellipse algorithms.

       Differentiate Scan line polygon fill algorithm,boundary fill and flood-fill algorithms.

LECTURE PLAN:-

 UNIT –II : 6 hours

       1st hr : Points and lines,line drawing algorithms.

       2nd hr:mid-point circle algorithm.

       3rd hr: Ellipse algorithms.

       4th hr: Filled area primitives.

       5th hr:Scan line polygon fill algorithm.

       6th hr: Boundary fill and flood fill algorithms.

ASSIGNMENT –II:-

1)distinguish the merits and demerits of scan line algoritham and flood fill algoritham.

2)discuss about the super sampling approach followed for antialiasing.
3)Explain various types of line drawing algorithms.

4)Write a brief note on Filled area primitives.

5)Explain boundary-fill and flood-fill algorithms.

UNIT-III :- SYLLABUS

   2-D geometrical transforms :Translation, scaling, rotation, reflection and shear
   transformations, matrix representations and homogeneous coordinates, composite transforms,
   transformations between coordinate systems


DLEARNING OBJECTIVES:-

   At the end of unit-III student must be able to

        Derive 2-D geometric             transforms(Translation,Scaling,Rotation   and   Shear
         Transformations).

        Generate matrix representations and homogeneous coordinates.

        Describe transformations between coordinate systems.


LECTURE PLAN:-

 UNIT –III : 5 hours

       1st hr : 2-D geometrical transforms: Translation, Scaling, Rotation.

       2nd hr: 2-D geometrical transforms: Reflection and Shear transformations.

       3rd hr: Matrix representations.

       4th hr: Homogeneous coordinates.

       5th hr: Transformations between coordinate systems.

ASSIGNMENT –III:-

     1)what is ment by composite transformation

   2)Write a short note on 2-D geometrical transforms.
  3)Write a short note on matrix representation of 2-D geometric transforms.

  4)Write a short note on homogeneous coordinates .

  5)Explain the transformations between coordinate systems.

UNIT-IV :- SYLLABUS

  2-D viewing: The viewing pipeline, viewing coordinate reference frame ,window to view-
  port coordinate transformation, viewing functions, Cohen-Sutherland and Cyrus-beck line
  clipping algorithms, Sutherland-Hodgeman polygon clipping algorithm.

  LEARNING OBJECTIVES:-

  At the end of unit-IV student must be able to


      Identify 2-D viewing pipeline, window to view-port coordinate transformation,
       viewing functions.

      Describe Cohen-Sutherland and Cyrus-beck line clipping algorithms.

      Compute Sutherland and Hodgeman polygon clipping algorithm.

LECTURE PLAN:-

UNIT –IV : 6 hours

      1st hr :2-D viewing pipeline.

      2nd hr: 2-D viewing coordinate reference frame.

      3rd hr: Window to view-port coordinate transformation.

      4th hr: 2-D viewing functions.

      5th hr: Cohen-Sutherland and Cyrus-beck line clipping algorithms.

      6th hr: Sutherland-Hodgeman polygon clipping algorithm.

ASSIGNMENT –IV:-

1)discuss the steps involved in mid point subdivision algorithm.

2)what are the limitations of mid point sub division algorithm?
  3)Write a short note on window to view-port coordinate transformation.

  4)Write a short note on 2-D viewing functions..

  5)Explain Cohen-Sutherland and Cyrus-beck line clipping algorithms.

  6) Write Sutherland-Hodgeman polygon clipping algorithm.


UNIT-V :- SYLLABUS

  3-D object representation: Polygon surfaces, quadratic surfaces, spline representation,
  Hermite curve, Bezier curve and B-Spline curves, Bezier and B-Spline surfaces, Basic
  illumination models, polygon rendering methods.

  LEARNING OBJECTIVES:-

  At the end of unit-V student must be able to

      Overview of 3-D object representation.

      Describe Polygon surfaces, quadratic surfaces.

      Differentiate Bezier curve and B-Spline curves.

      Differentiate Bezier curve and B-Spline surfaces

      Learn Basic illumination models .

      Define polygon rendering methods.

LECTURE PLAN:-
   UNIT –V : 6 hours

     1st hr : Polygon surfaces, quadratic surfaces.

     2nd hr: Spline representation.

     3rd hr: Bezier curve and B-Spline curves.

     4th hr: Bezier curve and B-Spline surfaces.

     5th hr: Basic illumination models.

     6th hr: polygon rendering methods
ASSIGNMENT –V:-

  !
  1) Write a short note on Polygon surfaces,quadratic surfaces.

  2) Compare and contrast Bezier curve and B-Spline curves.

  3) Mention the differences in between Bezier curve and B-Spline surfaces.

  4) Write brief notes about hermite curve.

  5) How the plane equation is defined in 3D space?expalin the steps involved in the
     transformation for mirror reflection about an arbitrary plane.


UNIT-VI :- SYLLABUS

  3-D geometrical transforms :Translation, scaling, rotation, reflection and shear
  transformations, composite transforms.
  3-D viewing: The viewing pipeline, viewing coordinate reference frame , window to view-
  port coordinate transformation, viewing functions, Cohen-Sutherland and Cyrus-beck line
  clipping algorithms, Sutherland-Hodgeman polygon clipping algorithm.

  LEARNING OBJECTIVES:-

  At the end of unit-VI student must be able to

      Derive 3-D geometric            transforms(Translation,Scaling,Rotation   and   Shear
       Transformations).

      Describe composite transformations between coordinate systems.

      Identify 3-D viewing pipeline,viewing coordinate reference frame.

      Explain window to view-port coordinate transformation.

      Compare and contrast Cohen-Sutherland and Cyrus beck line clipping algorithms.

      Compute Sutherland-Hodgeman polygon clipping algorithm.

LECTURE PLAN:-

UNIT –V I : 6 hours

     1st hr : 3-D geometrical transforms :Translation,scaling.
      2nd hr: : 3-D geometrical transforms : Reflection and shear transformations

      3rd hr: 3-D viewing pipeline and viewing coordinate reference frame .

      4th hr: window to view-port coordinate transformation,viewing functions.

      5th hr: Cohen-Sutherland and beck line clipping algorithms.

      6th hr: Sutherland-Hodgeman polygon clipping algorithm.

ASSIGNMENT –VI:-

     1)discuss about the following
       a)parametric functions
       b)mach band effect
       c)surface normal
   2)Write a short note on 3-D geometrical transforms .

   3)Mention the differences in between Cohen-Sutherland and Cyrus beck line clipping
   algorithms.

   4)Explain Sutherland-Hodgeman polygon clipping algorithm.


 UNIT-VII :- SYLLABUS

   Visible surface detection methods: Classification, back-face detection. depth buffer, scan-
   line, depth sorting, BSP-tree methods, area sub division and octree methods.

   LEARNING OBJECTIVES:-
   At the end of unit-VII student must be able to

       Identify Visible surface detection methods.

       Classify Visible surface detection methods.

       Differentiate depth-buffer and scan-line methods.

       Explain BSP-tree method.

       Compare and contrast area sub-division and octree methods.

LECTURE PLAN:-
   UNIT –V II : 6 hours
       1st hr : Classification of Visible surface detection methods.

      2nd hr: : Usage of depth-buffer and scan-line methods.

      3rd hr: BSP-tree method and area sub-division method.

       4th hr: octree methods.

ASSIGNMENT –VII:-

   1) Write a short note on Visible surface detection methods .

   2) Mention the differences in between depth-buffer and scan-line methods.

   3) Explain octree methods .


UNIT-VIII :- SYLLABUS

   Computer animation: Design of animation sequence, general computer animation
   functions, raster animation, computer animation languages, key frame systems, motion
   specifications.
   LEARNING OBJECTIVES:-
   At the end of unit-VIII student must be able to

          Design of animation sequence,general computer animation.

          Computer animation language.

          Key frame syatem.




LECTURE PLAN:-
   UNIT –V III : 6 hours

1st hr:design of animation sequence,general computer animation

2nd hr: raster animation,computer animation language.

3rd hr: key frame systems,motion specifications.
ASSIGNMENT –VIII:-

  1) Briefly explain about key frame systems.

  2) explain about raster animation.

  3) What is ment by animation?Explain.

  4) Discuss the characteristics of key frame animation.
                       Design and Analysis of Algorithms

 UNIT-I
1.1  SYLLABUS

         Introduction: Algorithms, Pseudo code for expressing algorithms,
         Performance Analysis –Space complexity, Time Complexity,
         Asymptotic Notation- Big oh Notation, Omega Notation, Theta Notation
         and little oh Notation, Probabilistic analysis, Amortized analysis.

1.2    Objectives:
              Learn about Pseudo code for expressing algorithms.
              Analyze the Performance Analysis.
              Become familiar with Space complexity, Time complexity.
              Learning Different Asymptotic Notations.
              Understand the Probabilistic analysis.
              Learn Amortized analysis.

  1.3 Lesson Plan:
         1. Introduction: Algorithms, Pseudo code for expressing algorithms
2 hr
         2. Performance Analysis –Space complexity, Time Complexity
2 hr
         3. Asymptotic Notation
2 hr
         4. Probabilistic analysis, Amortized analysis.                      1 hr
                                                                           ---------
-
                                              Total Number of HRS
7HRS
------------
  1.4 Assignment:
    1. Write down Pseudo code notations for algorithms
    2. Explain the Performance Analysis.
    3. Explain the different Asymptotic Notation.
    4. What is Probabilistic analysis?
  UNIT-II
  2.1 SYLLABUS


Disjoint Sets- disjoint set operations, union and find algorithms, spanning trees,
connected components and bi-connected components.
  2.2 OBJECTIVES
        Learn about Disjoint sets and their operations
        Learn and analyze Union and Find algorithms
        Study the construction of spanning trees.
        Understand about connected and bi-connected components.

 2.3 LESSON PLAN


                       1. Disjoint sets and their operations              2hr
                       2. Union and Find algorithms                      1hr
                       3. Spanning trees                                 1hr
                       4. Connected and bi-connected components          1hr
                                                                        ---------
                                                    TOTAL HRS             5hrs
                                                                        ---------

 2.4 ASSIGNMENT

        1.   Explain about Disjoint sets and their operations
        2.   Write UNION and FIND Algorithms.
        3.   Explain Weighted Union and Collapsing Find Algorithms.
        4.   Write briefly about connected and bi – connected components.




   UNIT-III
 3.1 SYLLABUS

Divide and conquer: General method , applications-Binary search, Quick sort,
Merge sort, Strassen’s matrix multiplication.

 3.2 Objectives:
              Analyze the divide and conquer method.
              Learn applications.
              Understand the Binary Search and perform searching using
                 Binary search
              Understand the Quick sort , merge sort and perform sorting
                 using these techniques.
              Understand the Strassen’s matrix multiplication.

 3.3 Lesson Plan:
      1. Divide and Conquer: General method
       1 hr
      2. Binary search
        1 hr
          3. Quick sort, Merge sort                                          1 hr
          4. Strassen’s matrix multiplication
            1 hr
                                                                           ---------
-
                                                Total Number of HRS        4 HRS
                                                                            -------
-----
  3.4 Assignment:
    1. Explain General method for Divide and Conquer
    2. Explain Binary search with example.
    3. Explain Quick sort with example.
    4. Explain Merge sort with example.
    5. Explain Strassen’s matrix multiplication with example
UNIT-IV

4.1 SYLLABUS.
Greedy method: General method, applications-Job sequencing with dead lines,
0/1 knapsack problem, Minimum cost spanning trees, Single source shortest path
problem.
4.2 Objectives:
               Analyze the Greedy method.
               Learn applications.
               Understand the job sequencing with dead lines.
               Understand the 0/1 Knapsack problem.
               Understand the minimum cost spanning trees,

                     Understand the Single source shortest path problem

    4.3    Lesson Plan:
             1. Greedy method: General method
          1 hr
            2. Applications - job sequencing with deadlines                 1 hr
            3. 0/1 Knapsack problem
1 hr
           4. Minimum cost spanning trees                                     1 hr
           5. Single source shortest path problem.                          1 hr

                                                                            --------
---                                             Total Number of HRS:
          5 HRS
                                                                           ---------
----
 4.4 Assignment:
     1. Explain General method for Greedy method.
     2. Explain job sequencing with dead lines with example.
    3. Explain minimum cost spanning trees problem with example.
    4. Explain Single source shortest path problem.
UNIT-V
5.1     SYLLABUS
Dynamic Programming: General method, applications-Matrix chain
multiplication, Optimal binary search trees, 0/1 knapsack problem, All pairs
shortest path problem,Travelling sales person problem, Reliability design.
5.2     Objectives:

                   Analyze the Dynamic Programming method.
                   Learn applications.
                   Understand the Matrix chain multiplication.
                   Understand the Optimal binary search trees.
                   Understand the 0/1 knapsack problem,
                   Understand the all pair shortest path problem
                   Understand the. Traveling sales person problem
                   Understand the reliability design

5.3       Lesson Plan:
          1. Dynamic Programming: General method
             2 hr
         2. Matrix chain multiplication.
      2hr        3.Optimal binary search trees            ,0/1 knapsack   problem
      1 hr
         4. All pair shortest path problem                                     1
      hr
         5. Traveling sales person problem, reliability design
      2 hr

                                                                          ---------
                              Total Number of HRS:
      7 HRS

                                                                          --------

5.4 Assignment:
      1. Write about Matrix chain multiplication.
      2. Explain optimal binary search trees.

         3. Write about all pair shortest path problem.
         4. Explain 0/1 Knapsack problem with an example.
         5. Write about reliability Design.
UNIT-VI
6.1 SYLLABUS
Backtracking: General method, applications-n-queen problem, sum of subsets
problem, graph coloring, Hamiltonian cycles.
6.2 Objectives:
                   Understand the concepts of Backtracking: General method
                   Become familiar with the application-n-queen problem.
                   Analyze sum of subsets problem.
                   Understand the AND graph coloring, Hamiltonian cycles.

6.3 Lesson Plan:

                    1. Backtracking: General method                 1hr

                    2. Application-n-queen                           proble
                       1hr

                    3.   Sum of subsets problem                     1hr

                    4. Graph coloring, Hamiltonian cycles.           2hr
                                                                    ---------
                                   Total Number of HRS:
5 HRS
                                                                    ---------
-


6.4 Assignment:

          1. Write about Backtracking: General method.
          2. Explain Application-n-queen problem.
          3. What is Graph coloring. Explain with an example.
          4. Explain sum of subsets problem with an example.
          5. Explain graph coloring, Hamiltonian cycles
UNIT-VII
7.1 SYLLABUS
      Branch and Bound: General method, applications-Traveling sales man
      problem, 0/1 kanpsack problem, L C Branch and bound solution, FIFO
      Branch and bound solution .

7.2 Objectives:
     Understand the concepts of Branch and Bound: General method
     Become familiar with the Traveling sales man problem.
     Analyze 0/1 kanpsack problem.
     Understand the L C Branch and bound solution, FIFO Branch and bound
      solution .
                   .
7.3 Lesson Plan:

              1. Branch and Bound: General method
                 1hr

              2. 0/1 kanpsack problem
                 2hr

              3. Graph traversal L C Branch and bound solution          2hr

              4. FIFO Branch and bound solution .                       2hr
                                                                    ---------
                                    Total Number of HRS:
7 HRS
                                                                     ---------
7.4     Assignment:

          1. Write about Branch and Bound: General method.
          2. Explain Traveling sales man problem.
          3. Explain 0/1 kanpsack problem
             4. Explain L - C Branch and bound solution
8.1 UNIT-VIII
8.2 SYLLABUS
      NP-hard and NP-complete problem: Basic concepts, non deterministic
      algorithms, NP-hard and NP-Complete classes.

8.3 Objectives:
                      Understand the concepts of NP-hard and NP-complete
                       problem
                      Become familiar with the non deterministic algorithms.
                      Analyze NP-hard and NP-Complete classes.
8.4 Lesson Plan:

              1. NP-hard and NP-complete problem
                    1hr

              2. Non-deterministic algorithms
                 1hr

              3. Analyze NP-hard and NP-Complete classes               2hr
                                                                   -----------
                                    Total Number of HRS:
4 HRS
                                                                   ----------
8.5 Assignment:
1. Define NP-hard problem give some examples.
  2. Define NP-Complete problem give some examples.
  3. Explain deterministic algorithm with an example.
  4. Explain about NP- hard and NP-Complete classes.
                    DATA COMMUNICATION SYSTEMS


UNIT – I

INTRODUCTION TO DATA COMMUNICATIONS AND NETWORKING: Standards
Organizations for Data Communications, Layered Network Architecture, Open Systems
Interconnection, Data Communications Circuits, Serial and parallel Data Transmission, Data
communications Circuit Arrangements, Data communications Networks, Alternate Protocol
Suites.
SIGNALS, NOISE, MODULATION, AND DEMODULATION :
Signal Analysis, Electrical Noise and Signal-to-Noise Ratio, Analog Modulation Systems,
Information Capacity, Bits, Bit Rate, Baud, and M-ary Encoding, Digital Modulation.

At the end of this unit students will be able to understand
         Need for a Layered Network Architecture
         Serial and parallel data transmission
         Various Modulation and encoding techniques

Lecture Plan:-
Total classes required : 7
   1. Concepts on data transmissions                           2 HRS
   2. Overview of data communication techniques                3 HRS
   3. Concepts on modulation and demodulations                 2 HRS

Assignment: -
   1. Describe the differences between the two kinds of data communication standards
   2. Define analog and digital signals. Describe the differences between them
   3. Define digital modulation. Give a brief description of ASK, FSK, PSK and QAM

UNIT – II

METALLIC CABLE TRANSMISSION MEDIA:
Metallic Transmission Lines, Transverse Electromagnetic Waves, Characteristics of
Electromagnetic Waves, Transmission Line Classifications, Metallic Transmission Line Types,
Metallic Transmission Line Equivalent Circuit, Wave Propagation on Metallic Transmission
Lines, Metallic Transmission Line Losses.
OPTICAL FIBER TRANSMISSION MEDIA:
Advantages of Optical Fiber Cables, Disadvantages of Optical Fiber Cables, Electromagnetic
spectrum, Optical Fiber Communications System Block Diagram, Optical Fiber construction,
The Physics of Light, Velocity of Propagation, Propagation of Light Through an Optical fiber
Cable, Optical Fiber Modes and Classifications, Optical Fiber Comparison, Losses in Optical
Fiber Cables, Light sources, Light Detectors, Lasers.

At the end of this unit students will be able to learn
         Characteristics of Electro magnetic waves
        Wave propagation on Metallic Transmission lines
        Advantages of Fiber optics, and Fiber communication system.
        Light sources, Detectors and Lasers

Lecture Plan:-
Total classes required : 7
   1. Metallic transmission lines, transverse electromagnetic waves.      1 HR
   2. Transmission line classification                                    1 HR
   3. Wave propagation on metallic transmission lines                     2 HRS
   4. Advantages of optical fiber cables                                  1 HR
   5. Optical fiber modes and classification                              2 HRS

Assignment: -
   1. Describe metallic transmission lines & what are the different types of metallic
      transmission lines
   2. List and describe the types of losses associated with metallic transmission lines
   3. Describe the block diagram of Optical Fiber communication system

Unit III :

DIGITAL TRANSMISSION:
Pulse Modulation, Pulse code Modulation, Dynamic Range, Signal Voltage –to-Quantization
Noise Voltage Ration, Linear Versus Nonlinear PCM Codes, Companding, PCM Line Speed,
Delta Modulation PCM and Differential PCM.
MULTIPLEXING AND T CARRIERS:
Time- Division Multiplexing, T1 Digital Carrier System, North American Digital Multiplexing
Hierarchy, Digital Line Encoding, T Carrier systems, European Time- Division Multiplexing,
Statistical Time – Division Multiplexing, Frame Synchronization, Frequency- Division
Multiplexing, Wavelength- Division Multiplexing, Synchronous Optical Network

At the end of this unit students will be able to learn about
         Pulse modulation and pulse code modulation
         Quantization noise voltage ratio.
         Linear vs nonlinear PCM codes.
         Delta modulation and differential PCM
         Kinds of Multiplexing

Lecture Plan:-
Total classes required : 7
   1. Pulse modulation and pulse code modulation               1 HR
   2. PCM codes                                                1 HR
   3. Delta Modulation PCM and differential PCM                2 HRS
   4. Types of multiplexing                                    2 HRS
   5. Synchronization, synchronous optical network.            1 HR

Assignment: -
   1. Define digital transmission. Contrast the advantages and disadvantages of digital
      transmission
   2. Explain in detail about companding and PCM
   3. Describe the North American digital multiplexing hierarchy
   4. Describe the basic concept of WDM and what are the advantages of WDM

Unit IV:

WIRELESS COMMUNICATIONS SYSTEMS:
Electromagnetic Polarization, Rays and Wavefronts, Electromagnetic Radiation, Spherical
Wavefront and the Inverse Square Law, wave Attenuation and Absorption, Optical Properties of
Radio Waves, Terrestrial Propagation of Electromagnetic Waves, Skip Distance, Free-Space
Path Loss, Microwave Communications Systems, Satellite Communications Systems.

At the end of this unit students will be able to understand
         Polarization concepts
         Electromagnetic radiation
         Wave attenuation and absorption
         Terrestrial propagation of electromagnetic waves
         Microwave and Satellite communication systems

Lecture Plan:-
Total classes required : 7
   1. Electromagnetic polarization concepts               2 HRS
   2. Spherical wave front and inverse square laws        1 HR
   3. Optical properties of radio waves                   2 HRS
   4. Microwave and Satellite communication systems       2 HRS

Assignment: -
   1. Describe a spherical wavefront and explain the relation of inverse square law to
      electromagnetic waves
   2. Explain wave attenuation, wave absorption and give relation between them
   3. What are the optical properties of radio waves
   4. Explain the components that makeup a microwave radio link
   5. Give examples of three satellite elevation categories and describe a geosynchronus
      satellite contrasting its advantages and disadvantages




Unit V:

TELEPHONE INSTRUMENTS AND SIGNALS:
The Subscriber Loop, Standard Telephone Set, Basic Telephone Call Procedures, Call Progress
Tones and Signals, Cordless Telephones, Caller ID, Electronic Telephones, Paging systems.
THE TELEPHONE CIRCUIT:
The Local Subscriber Loop, Telephone Message- Channel Noise and Noise Weighting, Units of
Powers Measurement, Transmission Parameters and Private-Line Circuits, Voice-Frequency
Circuit Arrangements, Crosstalk.

At the end of this unit students will be able to learn
         Basic telephone call procedures
         Tones and signals ,cordless telephones
         Paging system concepts.
         The local subscriber loop
         Voice frequency circuit arrangements

Lecture Plan:-
Total classes required : 7
   1. The Subscriber Loop, Standard Telephone Set                          1 HR
   2. Call Progress Tones and Signals, Cordless Telephones, Caller ID      1 HR
   3. Electronic Telephones, Paging systems.                               1 HR
   4. The Local Subscriber Loop, Telephone Message- Channel Noise and Noise Weighting
                                                                1 HR
   5. Units of Powers Measurement, Transmission Parameters                 1 HR
   6. Transmission Parameters and Private-Line Circuits                    1 HR
   7. Voice-Frequency Circuit Arrangements, Crosstalk.                     1 HR

Assignment: -
         1) Briefly describe the steps involved in completing a local telephone call
         2) Describe the basic operation of a cordless phone and explain how it differs from a
              standard phone
         3) Explain transmission characteristics of a local subscriber loop and also explain
              about loading coils and bridge taps
         4) Briefly describe about bandwidth parameters

Unit VI:

CELLULAR TELEPHONE SYSTEMS:
First- Generation Analog Cellular Telephone, , Second-Generation Cellular Telephone Systems,
N-AMPS, Digital Cellular Telephone, Interim Standard, North American Cellular and PCS
Summary, Global system for Mobile Communications, Personal Communications Satellite
System.


At the end of this unit students will be able to learn about
         First generation analog cellular telephone.
         Second-Generation Cellular Telephone Systems
         Personal Communications system
       Personal Communications Satellite System
       Global system for Mobile Communications

Lecture Plan:-
Total classes required : 8
   1) First- Generation Analog Cellular Telephone      1 HR
   2) Second-Generation Cellular Telephone Systems     1 HR
   3) N-AMPS, Digital Cellular Telephone               1 HR
   4) North American Cellular and PCS Summary          1 HR
   5) Global system for Mobile Communications          2 HRS
   6) Personal Communications Satellite System         2 HRS

Assignment: -
   1. Explain about First generation analog cellular telephone.
   2. Describe the concepts of Personal Communications system
   3. Summarize North American cellular and PCS Systems
   4. Explain GSM cellular telephone system and the services offered by GSM

Unit VII:

DATA COMMUNICATIONS CODES, ERROR CONTROL, AND DATA FORMATS:
Data Communications Character Codes, Bar Codes, Error Control, Error Detection, Error
Correction, Character Synchronization.
DATA COMMUNICATIONS EQUIPMENT:
Digital Service Unit and Channel Service Unit, Voice- Band Data Communication Modems, Bell
Systems- Compatible Voice- Band Modems, Voice- Band Modern Block Diagram, Voice- Band
Modem Classifications, Asynchronous Voice-Band Modems, Synchronous Voice-Band
Modems, Modem Synchronization, ITU-T Voice- Band Modem Specifications, 56K Modems,
Modem Control: The AT Command Set, Cable Modems, Probability of Error and Bit Error Rate.

At the end of this unit students will be able to
     Data communication character codes
     Data error control, Data error correction, data formats
     Digital and Channel Service Unit, Voice- Band Data Communication Modems
     Band modems classifications
     Modem control

   Lecture Plan:-
  Total classes required : 8
  1. Data Communications Character Codes, Bar Codes             1 HR
  2. Error Control, Error Detection, Error Correction           1 HR
  3. Character Synchronization, Digital Service Unit and Channel Service Unit--1 HR
  4. Band Data Communication Modems, Bell Systems                              1 HR
  5. Modems, Voice- Band Modern Block Diagram, Voice- Band Modem Classifications
                                                         1 HR
  6. Asynchronous Voice-Band Modems, Synchronous Voice-Band Modems--- 1 HR
  7. Modem Synchronization, ITU-T Voice- Band Modem Specifications, 56K Modems
     1 HR
  8. Modem Control                                                      1 HR

Assignment: -
1. Explain about Data Communications Character Codes
2. What is the purpose of error detection and explain three error detection techniques
3. With an example explain error correction using Hamming code
4. List and describe the basic blocks of a voice band modem
5. Write short notes on Cable modems and probability of error and bit error rate

Unit VIII:

DATA –LINK PROTOCOLS:
Data –Link Protocol Functions, Character –and Bit- Oriented Protocols, Data Transmission
Modes, Asynchronous Data – Link Protocols, Synchronous Data – Link Protocols, Synchronous
Data – Link Control, High – Level Data – Link Control.

At the end of this unit students will be able to understand
            Data link protocol functions
            Character and bit oriented protocols
            Data Transmission modes?
            Asynchronous Data – Link Protocols, Synchronous Data – Link Protocols
            Synchronous Data – Link Control, High – Level Data – Link Control.

Lecture Plan:-
Total classes required : 7
        1. Data –Link Protocol Functions                                          1 HR
        2. Character –and Bit- Oriented Protocols                                 2 HRS
        3. Data Transmission Modes, Asynchronous Data – Link Protocols            2 HRS
        4. Synchronous Data – Link Protocol                                       1 HR
        5. High – Level Data – Link Control                                       1 HR
Assignment: -
   1. List and explain the three data-link protocol functions
   2. Explain two modes of data transmission
   3. What is binary synchronous communication? Explain
   4. Write about Synchronous Data Link Control (SDLC)
   5. Explain about the three standards of HDLC
        .
                         Formal Languages and Automata Theory

UNIT-I

1.1       Syllabus

        Fundamentals: strings, Alphabet, Language, Operations, Finite state machine Definitions,
finite automation model, acceptance of strings and languages, deterministic finite automation and
non deterministic finite automation, transition diagrams and language recognizers.

1.2   Objectives

      After completion of the syllabus, you will be able to
                  Understand the defining and differentiating the strings
                  Use the different types of operators in the languages
                  Understand the finite automation model
                  Analyze the language recognition tools

1.3       Lesson Plan

          Fundamentals: Strings, Operations                                     2hrs
          Finite state automation                                               2hrs
          Finite automation model, acceptance of strings                        2hrs
          DFA and NFA problems                                                  2hrs
          Transition Diagrams                                                   1hr
                                                                       --------------------
                                 Total number of hours required                 8hrs
                                                                       --------------------

1.4   Assignment

          1. Explain the Finite automation how the language constructs can be recognized?
          2. List out the Finite automates?
          3. Define: string, sub string, transitive closure, and reflexive transitive closure
          4. Describe the finite state machine with a block diagram.




Unit -2

2.1       Syllabus
             Finite Automata: NFA with ε transitions –Significance, acceptance of languages,
       Conversions and Equivalences: Equivalence between NFA with and without ε transitions,
       NFA to DFA conversion, minimization FSM, equivalence between two FSM’s, out put
       machines: Moore and Mealy machine.

2.2   Objectives

      After completion of the syllabus, you will be able to
                  List out the differences between DFA and NFA
                  Solve the problems related to DFA and NFA
                  Understand the process how to convert the NFA to DFA so that you can
                     write the equivalent DFA for the NFA.
                  Learn the procedure to minimize the DFA
                  Learn the output machines: moore and mealy machines

2.3    Lesson Plan

       NFA with ε transition                                              2hrs
       NFA to DFA Conversion and related problems                         2hrs
       NFA and DFA equivalence                                            2hrs
       DFA minimization                                                   2hrs
       Finite Automata with out put machines                              2hrs
                                                                 --------------------
                      Total number of hours required:                     10hrs
                                                                 --------------------
2.4    Assignment

       1. Explain the procedure to convert NFA to DFA.
       2. What are the Finite automates with output and explain them with the suitable
          Examples.
       3. Explain the procedure to minimize the DFA for the given regular expression.


Unit -III

3.1    Syllabus

               Regular Languages : Regular Sets , Regular Expressions , identity Rules,
       Constructing Finite automata for a given regular expressions, Conversion of Finite
       automata to regular expressions, Pumping lemma of regular sets , closure properties of
       regular sets (proofs not required).
3.2    Objectives

       After completion of the syllabus, you will be able to
                  Understand the regular expressions
                  Learn the usage of identity rules
                  Learn the conversion procedure for RE to Finite automata.
                  Understand the concept of pumping Lemma

3.3   Lesson Plan

      Regular sets                                                         1hr
      Identity rules and problems                                          2hrs
      Finite automata for a given regular expression                       2hrs
      Conversion of regular expression to finite automata                  2hrs
      pumping lemma                                                        2hrs
      Closure properties                                                   2hrs
                                                                  --------------------
                     Total number of hours required                        11hrs
                                                                  --------------------

3.4   Assignment

      1. Define the Regular Expression.
      2. Write the Identity Rules for RE
      3. Construct the FA for the Regular Expression (a/b)*abb.
      4. Obtain the minimized DFA for the RE (a/b)*abb.
      5. Explain the Pumping Lemma for the regular sets.
      6. What are the properties of regular sets.

Unit -IV

4.1   Syllabus

              Grammar Formalism: Regular Grammars – right linear and left linear grammars,
      equivalence between regular grammar and FA, Context Free grammar, derivation trees,
      sentential forms, right most and left most derivations of strings.

4.2    Objectives

      After completion of the syllabus, you will be able to

                        Define the grammar and types of grammars
                        Understand the relation between the RE and FA
                        Learn more on Derivation and the types of derivations.
                        Learn exclusively on the Context Free grammars in deep
4.3   Lesson Plan

      Grammar                                                             2hrs
      Equivalence between Regular Grammar and FA                          2hrs
      Context Free grammar                                                2hrs
      Derivation and derivation trees                                     2hrs
                                                                  --------------------
                       Total number of hours required                      8hrs
                                                                  --------------------
4.4   Assignment

      1. Define the grammar and what are the types of grammars
      2. Consider the grammar E->E + E | E * E | id.
         write the right-most derivation and left most derivation for the sentence id*id+id.

Unit -V

5.1   Syllabus

      Context Free Grammars: Ambiguity context free grammars. minimization of context free
      grammars, Chomsky normal form, Greiback normal form , Pumping Lemma for Context
      Free Languages. Enumeration of properties of CFL (proofs omitted).

5.2       Objectives

      After completion of the syllabus, you will be able to

                      Know what is meant by ambiguity.
                      Learn the Chomsky Normal forms
                      Learn the Greiback Normal Forms
                      Understand the pumping Lemma for CFG

5.3   Lesson Plan

      Ambiguity in CFG                                                     1hr
      Minimization of CFG                                                  2hrs
      CNF and GNF                                                          3hrs
      Pumping Lemma for CFG                                                3hrs
      Properties of CFL                                                    1hr
                                                                  --------------------
                       Total number of hours Required                      10 hrs
                                                                  --------------------


5.4   Assignment

      1.    What is an ambiguity?
      2.    What does an ambiguity trouble in the CFG?
      3.    What are the techniques used to minimize the CFG
      4.    Explain the CNF and GNF with an example.

Unit -VI
6.1   Syllabus

      Push down Automata: Push down automata, definition, model, acceptance of CFL,
      Acceptance by finite state and acceptance by empty state and its equivalence,
      Equivalence of CFL and PDA, Introduction to DCFL and DPDA.

6.2    Objectives

      After completion of the syllabus, you will be able to
                 Learn the purpose of push down automata
                 Understand the acceptance of CFL
                 Understand the acceptance of finite state and empty state
                 Gain the knowledge on CFL and PDA

6.3   Lesson Plan

      Push down automata                                         3hrs
      Acceptance of CFL                                          3hrs
      Acceptance by finite state and acceptance by empty state and
      its equivalence                                            3hrs
      Equivalence of CFL and PDA                                 3hrs
                                                                 --------------------
                  Total number of hours Required                 12 hrs
                                                                 --------------------
6.4   Assignment

      1. Explain the concept of push down automata
      2. Write the push down automata to accept the language {ww* | w ε {0, 1}}
      3. Explain the equivalence of CFL and PDA.




Unit -VII

7.1   Syllabus

       Turing Machine: Turing machine, Definition, model, Design of TM, computable
       functions, recursively enumerable languages. Church’s hypothesis, counter machine,
       types of Turing machines (proofs not required)

7.2    Objectives

      After completion of the syllabus, you will be able to
                        Learn the Turing machine design
                        Usages of computation functions
                        Learn recursively enumerable languages
                        Understand the church’s hypothesis.
                        Understand the counter machines.

7.3   Lesson Plan

      Turing machine                                                       2hrs
      Design of Turing Machine                                             3hrs
      Recursively enumerable languages                                     1hr
      Church’s hypothesis                                                  1hr
      Counter machine                                                      1hr
      Types of Turing machines                                             2hrs
                                                                  --------------------
                    Total number of hours Required                         10 hrs
                                                                  --------------------
7.4   Assignment

      1. Solve the problem using the TM, [anbcn | where n is an odd ]
      2. Explain the steps required to design the TM.
      3. Expalin the Counter machines with suitable example.

Unit -VIII

8.1    Syllabus

             Computability Theory: Chomsky hierarchy of languages, linear bounded
       automata and context sensitive languages, LR (0) grammar, decidability of problems,
       Universal TM, undesirability of posts. Correspondence problem, Definition of P and NP
       problems, NP complete and NP hard problems.


8.2   Objectives

      After completion of the syllabus, you will be able to
                     Learn the concept on Chomsky hierarchy of languages
                     Learn Context sensitive languages
                     Work on the LR (0) grammars
                     Understand the P and NP problems

8.2    Lesson Plan

      Chomsky hierarchy of languages                                      1hr
      Linear bounded automata and context sensitive languages             1hr
       LR (0) grammar                                                     2hrs
       Decidability of problems                                           2hrs
       Universal TM, undesirability of posts                              1hr
       P and NP problems, NP complete and NP hard problems                3hrs
                                                                 --------------------
                Total number of hours Required                            10 hrs
                                                                 --------------------
8.4.   Assignment

       1. Explain the Chomsky hierarchy of languages
       2. What is meant by linear bounded automata?
       3. Define LR (0) grammar? Write canonical collection of LR (0) items for the
          arithmetic grammar.
       4. Explain the difference between LR (0) and LR (1) items
       5. Explain the Universal TM
       6. Explain the P and NP problems
                 SUBJECT:MICROPROCESSOR AND INTERFACING
                        III B.TECH I SEMESTER (CSE,IT)

                                             UNIT- I
                                           SYLLABUS
        An overview of 8085, Architecture of 8086 Micro Processor, Special functions of general
purpose registers, 8086 Flag register and functions of 8086 flags. Addressing modes of 8086,
Instruction set of 8086, Assembler directives, Simple programs procedures and macros.

                                 LEARNING OBJECTIVES
                    At the conclusion of this unit student should be able to :
   1. Define the term microprocessors .
   2. List and describe and other parts in the 8086 EU and BIU.
   3. Demonstrate how the 8086 calculates memory addresses.
   4. Describe the memory segmentation.
   5. Relocate the data and programe.
   6. Describe the special functions of each general purpose register.
   7. Name the 8086 Flag register and functions of 8086 flags.
   8. Describe ways of accessing immediate data and data in register and data in memory(
       Addressing modes)
   9. Describe for each instruction: its operation the current syntax and flags affected by the
       instruction
   10. Describe the assembler directives.
   11. Write any assembly language program

                                               LECTURE SCHEDULE
                                      (Lecture schedule: 14 Hours)
LECTURE 1:     Evaluation of microprocessors family.
LECTURE 2:      An overview of 8085
LECTURE 3:     Architecture of 8086
LECTURE 4:     Special functions of General purpose registers
LECTURE 4:     Memory Segmentation.
LECTURE 5:     8086 Flag register and functions of 8086 flags
LECTURE 6:     Addressing modes of 8086; Instruction set: Data transfer instructions
LECTURE 7:     Flag, port ,stack transfer instructions.
LECTURE 8:     Arithmetic instructions
LECTURE 9:     Logical instructions and simple programs.
LECTURE 10:     String instructions and simple programs.
LECTURE 11:     Branch and other process control instructions
LECTURE 12:     Assembler directives & DOS function calls
LECTURE 13:     Procedures, macros, Reentrant and recursive procedures.
LECTURE 14:     Passing parameters to Procedures, macros

                                         TUTORIAL-I
   •   What is PSW. Explain the contents of PSW.
   •   Why the internal architecture of 8086 is divided into two functional units.
          Explain the functions of each unit with neat block diagrams.
   •   Explain the physical address, effective address, offset used in 8086.
   •   What is the prefetch queue in 8086? What are its advantages?
   •     1) Describe in detail about all possible addressing modes of 8086 with one or two
       examples.
   •     2) Develop an 8086 assembly language program that reads a key from the keyboard
       and converts it to uppercase before displaying it. The program need to terminate on
       typing the control C key.

                                        ASSIGNMENT -I
   •   What is the length of instruction queue in 8086? Discuss the use of the queue? Explain
       the reason for limiting the length of queue?
   •   Explain the difference between memory segmentation and memory page? Why
       segmentation is useful in real - time application?
   •   What is the use of segmentation? Discuss one application area? Explain how
       segmentation provides efficient task switching mechanism?
   •   If an absolute address of the type 6A3D9H is given, express it in the form of CS: IP and
       explain what are the advantages of the memory segmentation. Discuss about the various
       segment registers in 8086.
   •   Develop an 8086 assembly language program with a procedure named BCD-BIN. Whicn
       converts BCD numbers to binary. Use the AL register to pass parameters to the
       procedure.
   •   What does the PUBLIC directive indicate when placed in a program module?
   •   What does the EXTERN directive indicate when placed in a program module?


                                             UNIT – II
                                            SYLLABUS
Assembly language programs involving logical, branch and call instructions, sorting, evaluation
of arithmetic expressions, string manipulation
                                               LEARNING OBJECTIVES
    At the conclusion of this unit student should be able to :
    1. Write assembly language programs involving logical, branch, call instructions.
    2. Write programs involving sorting in ascending and descending order
    3. Write programs involving arithmetic expressions
    4. Write programs involving string manipulation
                                     LECTURE SCHEDULE
                                    (Lecture schedule:10Hours)
LECTURE 1: Programs involving Logical operations
LECTURE 2: Programs involving Branch instructions
LECTURE 3: Programs involving call instructions
LECTURE 4: Programs involving sorting
LECTURE 5: Programs involving arithmetic expressions
LECTURE 6: Programs involving string manipulation instructions Programs using DOS
function calls
LECTURE 7: Hexadecimal to BCD conversions
LECTURE 8: BCD to Hexadecimal conversions
LECTURE 9: Copying and swapping arrays
LECTURE 10: Picking maximum and minimum, sorting arrays.
                                           TUTORIAL-II
    Compute the average of N number of bytes in an array in memory. The length of the
       string is in the location of the array. The number starts from 2nd location of the array.
    Using a do – while construct, develop a sequence of 8086 instructions that reads a
       character string from the keyboard and after pressing the enter key the character string is
       to be displayed again.
                                          ASSIGNMENT-II
    Write an 8086 assembly language program sequence which uses the LOOP instruction to
       add the contents of M words beginning at the address ARRAY and stores the result in
       TOTAL.
    Develop a short sequence of 8086 instructions that uses the REPEAT _ UNTIL construct
       to copy the contents of byte – sized momory BLOCKA into byte – sized memory
       BLOCKB until a 00H is moved.
    Write an 8086 assembly language program to check the pass word of length 4 bytes
       entered through key board whether it is matching with the system pass word stored at
       FF00H location.
                                              UNIT – III
                                             SYLLABUS
Pindiagram of 8086 – Minimum mode and Maximum mode of operation. Timing diagram,
memory interfacing to 8086(Static RAM and EPROM) need for DMA, DMA data transfer
method, Interfacing with 8237 / 8257
                                    LEARNING OBJECTIVES
                      At the conclusion of this unit student should be able to :
   1. Mention the function of each pin of 8086 microprocessor.
   2. Describe the operating modes of 8086 (Min & Max)
   3. Describe the signal sequences on the buses
   4. Describe the 8086 memory Banks
   5. Describe methods of parallel data transfer.
   6. Compare programmed I/O, Interrupt driven I/O, DMA I/O
   7. Interfacing of 8086 with 8237/8257
   8. Draw a diagram showing how RAM’s, EPROM’s, are interfaced to an 8086 CPU

       through 74LS138 decoder

                                       LECTURE SCHEDULE
     (Lecture schedule:11 Hours)
LECTURE 1: 8086 pin out in minimum mode configuration, latches & transceivers.
LECTURE 2: Maximum mode configuration ,bus controller.
LECTURE 3: Timing of 8086 ,READ,WRITE timing diagrams
LECTURE 4: Parallel data transfer schemes, programmed I/O,interrupt I/o and DMA.
LECTURE 5: General memory interfacing.
LECTURE 6: 74LS 138 decoder interfacing, SRAM s & EPROM's thro’74LS 138
LECTURE 7: Interfacing 32KB ROM,16KB RAM with 4KB & 2KB ROM &RAM chips
respectively.
LECTURE 8: Need for DMA controller 8237.
LECTURE 9: Internal registers and formats.
LECTURE 10: Modes of operation of 8237.
LECTURE 11: Interfacing and programming 8237.


                                          TUTORIAL-III
     A target system based on 8086 processor uses less amount of SRAM. The programs are
        stored in EPROM that starts from F0000H ends with the address
        F F F F F H. The capacity of SRAM in 8KB interfaced at address 00000H. The
        chip size is 8 KB for EPROM and SRAM. Show the complete memory interface?
     In SDK – 86 kit 128KB SRAM and64KB EPROM is provided on system and provision
        for expansion of another 128KB SRAM is given. The on system SRAM
       address starts from 00000H and that of EPROM ends with F F F F F H. The expansion
    slot address map is from 80000H to 9F F F F H. The size of SRAM chip is 64KB. EPROM
    chip size is 16KB. Give the complete memory interface and also the address map for
    individual chips?
    Discuss the organization of FLASH memory? Explain the FLASH memory command
    definitions?
                                          ASSIGNMENT – III
     Develop an 8086 assembly language program to copy a block of data from memory
        location MEMA to MEMB.
     What is minimum no. of bus cycles that can occur between the time an interrupt request
        is recognized and first instruction in the interrupt routine is fetched. Draw the bus cycles.
     Describe memory – mapped I/O and direct I/O. Give the main disadvantages of each.
     Explain the following data transfer schemes.
        Programmed I/O, B) Interrupted I/O, C) DMA
     Show how 8237’s are cascaded to provide more number of DRQ’s and explain the
        operation.
     Distinguish between a memory read and write machine cycle? Draw the timing diagrams
        in minimum and maximum modes of operation?
     Show how a DMA device can be connected in an 8086 system and describe how a
        DMA data transfer takes place.?
     For frequency a square wave with a peak to peak voltage of 4V and the frequency will be
        selected from memory location ‘F’?
                                              UNIT – IV
                                             SYLLABUS
8255 – PPI – various modes of operation and interfacing to 8086. Interfacing keyboard, displays,
Stepper motors, actuators. D/A and A/D converter Interfacing
                                        LEARNINGOBJECTIVES
At the conclusion of this unit student should be able to :
    1. List the various modes of operation of 8255
    2. Describe various modes with examples
    3. Interface the 8255 to the 8086 µp
   4.  Explain the Keyboard interfacing to 8086
   5.  Explain the Display interfacing to 8086
   6.  Explain the Stepper motor interfacing to 8086
   7.   Explain the D/A and A/D converter interfacing and actuators.
                                     LECTURE SCHEDULE
                                    (Lecture schedule:7 Hours)
LECTURE 1: Introduction to 8255 PPI.
LECTURE 2: Internal block diagram of 8255,cwr,mode0.
LECTURE 3: Mode 1and mode 2 i/o operations.
LECTURE 4: Interfacing switches to 8086 thro’ 8255.
LECTURE 5: Interfacing LED s to 8086 thro’ 8255
LECTURE 6: Interfacing stepper motor to 8086 thro’ 8255
LECTURE 7: Interfacing A/D, D/A converters
                                            TUTORIAL-IV
     Interface a 12-bit DAC to 8255 with an address map of 0C00H to 0C03H. The DAC
        provides output in the range of +5V to -5V. Write the instruction sequence for generating
        a square wave with a peak to peak voltage of 4V and the frequency will be selected
        from memory location ‘F’.
     An 8086 system with 8255 interfaced at port A address F0H, as a block of 100 data bytes
        stored in it. Another 8086 system with another 8255 interface at port A address 80H has
        another block of 100 data bytes stored in it. Interchange this blocks of data bytes between
        the two 8086 system. Draw the necessary hardware scheme and write the necessary
        sequence of instructions. Both systems run on the same clock rate.
                                         ASSIGNMENT IV
     Explain control word format of 8255 in I/O and BSR mode.Interface 16 bit 8255 ports
        with 8086. The address of port A is F0H.
     Explain with block diagram to usage of 8255 PPI for keyboard interfacing. How do you
        tackle the problem of key bouncing?
      Explain why 8255 ports are divided into two groups? Discuss how these groups are
controlled in different modes of operation? Explain different control signal and their associated
pins for bi-directional I/O mode of operation?
                                             UNIT – V
                                            SYLLABUS
Interrupt structure of 8086, Vector Interrupt table, Interrupt service routines, Introduction to
DOS and BIOS Interrupts, 8259 PIC architecture and interfacing, cascading of Interrupt
controller and its importance
                                   LEARNING OBJECTIVES
                        At the conclusion of this unit student should be able to :
    1. List the sources of interfaces
    2. Describe the interrupt response of an 8086 family processor
    3. Initialize an 8086 interrupt vector table
    4. Write interrupt service procedures
    5. Describe the operation of 8259A priority interrupt controller
    6. Write the instructions needed to initialize an 8259 A for a specified application
    7. Cascading of Interrupt Controller and its Importance
                                    LECTURE SCHEDULE
                                   (Lecture schedule:4 Hours)
LECTURE 1: Interrupt structure of 8086,Priority of interrupts
LECTURE 2: 8259 PIC block diagram, interfacing to 8086 cascading
LECTURE 3: ICW s of 8259, formats
LECTURE 4: OCW s of 8259, formats, program to initialize 8259.
                                            TUTORIAL-V
    • How many initialization command words are required for a single 8259 in an 8086 based
       system? Explain their format?
    • How many minimum no. of bus cycles that can occur between the time an interrupt
       request is recognized and the first instruction in the interrupt routine is fetched. Draw the
       bus cycles.
                                         ASSIGNMENT – V
    1. a) Discuss the sequence of operations performed in the interrupt acknowledge
           cycle?
       b) What is the purpose of IF flag in handling the interrupts?
       c) Which interrupt type is associated with TF flag? What is the vector
           address. Explain the use of this interrupt?
                                             UNIT – VI
                                            SYLLABUS
Serial Data Transfer Schemes, Asynchronous and Synchronous Data Transfer Schemes, 8251
USART architecture and interfacing, TTL – to – RS232C and RS232C – to TTL conversion.
Sample program of serial data transfer, Introduction to high speed serial communication
standards, USB
                                  LEARNING OBJECTIVES
                     At the conclusion of this unit student should be able to :
    1. Understand need for serial I / O.
    2. Show and describe the meaning of the bits in the format used for sending asynchronous
       and synchronous data
    3. Initialize a USART (8251) for transmitting and receiving serial data in specified format.
    4. Describe the function of major signals in the RS – 232C standard
    5. Interface between RS 232C and TTL signal levels and vice versa

                                 LECTURE SCHEDULE
                                (Lecture schedule:9 Hours)
LECTURE 1: Need for serial I/o, serial-parallel comparison, asynchronization –
synchronization communication.
 LECTURE 2: Serial communication between two computers through modems.
LECTURE 3: Internal block diagram of 8251. Mode word format
LECTURE 4: command word format of 8251 Initialization and programming 8251
LECTURE 5: 8251 Interfacing to 8086
LECTURE 6: TTL to RS-232 C and RS-232 C to TTL conversion
LECTURE 7: Sample program of serial data transfer
LECTURE 8: Introduction to high speed serial communication standards.
LECTURE 9: USB
                                       TUTORIAL_VI
       Write an initialization sequence to operate 8251 in asynchronous mode with 8 – bit
        character size, baud rate factor 64, two stop bits and odd parity enable. The 8251 is
        interfaced with 8086 at address 082H.
    Write the instruction sequence to re – initialize the above 8251 in synchronous mode with
        even parity, single SYNC character and 8 – bit character size?
                                          ASSIGNMENT – VI
    Discuss Overrun error and Framing error with reference to 8251?
    List out the steps involved in initializing 8251A for synchronous operation.How do we
        connect RS- 232C i) To data terminal type devices ?
        ii) TO serial port of SDK – 86, RS – 232C connection?
    Write a program sequence which initializes the mode register and gives a command to
        enable the transmitter and begin an asynchronous transmission of 7 – bit characters
        followed by an even parity bit and stop bits. Explain the program.
                                                    UNIT – VII
                                                    SYLLABUS
        Advanced Micro Processors - Introduction to 80286, Salient Features of 80386, Real
and Protected Mode
             Segmentation & Paging, Salient Features of Pentium, Branch Prediction, Overview of
             RISC Processors.
                                     LEARNING OBJECTIVES
                      At the conclusion of this unit student should be able to :
     1. Features of 80286
     2. Features of 80386
     3. Real and Protected Mode of Operation
     4. Segmentation in 80386
     5. Paging in 80386
     6. Features of Pentium
     7. Branch Prediction in Pentium processor
     8. Introduction of RISC Processor
                                     LECTURE SCHEDULE
                                             UNIT – VII
                                    (Lecture schedule:11 Hours)

LECTURE 1: Introduction to 80286
LECTURE 2: Features of 80286
LECTURE 3: Architecture of 80286 and Regicters
LECTURE 4: Introduction to 80386
LECTURE 5: Features of 80386
LECTURE 6: Architecture of 80386 and Regicters
LECTURE 7: Real and Protected Mode
LECTURE 8: Segmentation & Paging
LECTURE 9: Salient Features of Pentium
LECTURE 10: Branch Prediction
LECTURE 11: Overview of RISC Processors.
                                           UNIT – VIII
                                            SYLLABUS
8051 Microcontroller Architecture, Register set of 8051, Modes of timer operation, Serial port
operation, Interrupt structure of 8051, Memory and I / O interfacing of 8051
                                   LEARNING OBJECTIVES
                      At the conclusion of this unit student should be able to :
   1. Compare microprocessors and microcontrollers
   2. Describe programming model of 8051
   3. Describe instruction set and addressing
   4. Show modes the internal memory organization
   5. Interface external memory and I / O ports
   6. Describe and program Timer in difficult modes of operation
   7. Modes of operation serial port operation
   8. Describe the interrupt structure of 8051 and interrupt programming.

                                  LECTURE SCHEDULE
                                 (Lecture schedule:12 Hours)

LECTURE 1: Introduction to microcontrollers & differences between μC & μP
LECTURE 2: Architecture of 8051, registers & memory configurations
LECTURE 3: Programming model of 8051
LECTURE 4: Pin functions, ports ckts and operations
LECTURE 5: Timers and timer modes
LECTURE 6: Serial I / O modes
LECTURE 7: Serial I / O programming
LECTURE 8: Interrupts
LECTURE 9: Memory interfacing
LECTURE 10: Instruction set
LECTURE 11: simple programs
LECTURE 12: Serial I / O programming

                                         TUTORIAL-VIII
    Explain the alternative functions of Port 0, Port 2 and Port 3?
     Draw and discuss the formats and bit definitions of the following SFRs in 8051
     Microcontroller i) SCON        ii) TCON
                                     ASSIGNMENT - VIII
    An 8051 based system requires external memory of four 8Kbytes of SRAM eachand two
     chips of EPROM of size 4Kbytes. The EPROM starts at address 1000H.SRAM address
     map follows EPROM map. Give complete memory interface?

                        MICROPROCESSORS & INTERFACING

                                       MODEL PAPER -1
                                  ANSWER ALL QUESTIONS
1. a) What is pre-fetch queue in 8086? What are its advantages?
   b) Explain the operation of JUMP, CALL and LOOP instructions with an      example.
   What are the flags affected in each of these instructions?
2. a) Develop an 8086 assembly language program to find LCM of 2- 16 bit unsigned
   integers
   b) Develop an 8086 assembly language program to find GCD of 2- 16 bit unsigned
   integers
3. Write an 8086 assembly language program that will determine if a given sub string is
   present or not in a main string of characters. Place the result as a ‘1’ if present or as ‘0’ if not
    present in a memory location.
4. a)Explain control word format of 8255 in I/O and BSR mode
   b) Interface 16-bit 8255 ports with 8086.The address of port A is F0H.
5. a)What is the advantage of DMA control data transfer over interrupt driven or program
    control data transfer ?Why are DMA control data transfers faster?
   b)With a neat flow diagram explain the sequence of operations for DMA data transfer
6. Describe the working of a 4X4 hexa-decimal matrix keyboard interfaced through the ports of
    8255. Give the hardware and software for it
7. Explain pre-compensation, data separation, phase locked loop and CRC in floppy disk
   interface.
8. a)Write a code to push R0,R1 and R3 of bank0 into the stack and pop them back into R5, R6,
    R7 of bank 3 of 8051.
   b) Write a 8051 program to find Y where Y=x2+2x+5 and x is between 0 and 9.



                         MICROPROCESSORS AND INTERFACING
                                   III B.TECH. II SEMESTER
                                        MODEL PAPER _2
Answer any 5 questions.
1 (a). Discuss the general function of all general purpose registers of 8086.Explain the special
function of each register and instruction support for these functions.(10M)
  (b)What is the use of segmentation? Discuss one application area. Explain how segmentation
provides efficient task switching mechanism.(6M)
2 (a) Explain with example how a far procedure is declared as PUBLIC ? Show how an
        external near procedure is called in main program?(6M)
  (b) Discuss the assembler directives with example.(10M)
3 (a)What is the purpose of ALE,BHE,DT/R and DEN pins of 8086.Show their timing in
        the system bus cycle of 8086.(10M)
  (b) Why 8086 memory is mapped into 2 byte wide banks? What logic levels are found with
BHE and A0 when 8086 reads a word a from the address 0A0AH?(6M)
4.Interface a 12-bit DAC to 8255 with an address map of 0C00 H to 0C03H.The DAC
        provides output in the range of +5V to _5V.Write the instruction sequence, for
  (a)generating a square wave with a peak to peak voltage 0f 4V and the frequency will be
selected from location ‘F’. (10M)
  (b) generating a triangular wave with maximum voltage of +3V and a minimum of -2V. (6M)
5.(a) Explain demand transfer mode of 8237.
   (b) Show how 8237’s are cascaded to provide more number of DRQ’s and explain the
        operation.
   (c) Explain how memory to memory transfer is performed with 8237?(5+6+5)
6. (a)What is the address map of interrupt vector table.?
   (b) Give the priority of hard ware and software interrupts ? Explain why single step interrupt is
having lower priority.(6+10)
7 (a)With a neat sketch explain the internal organization of SRAM chip. List out the input and
out put pins.
   (b)Draw the basic cell structure of EPROM and exp[lain the principle of operation.
   (c) Distinguish between EPROM and EEPROM. Mention the application                areas.(6+6+4)
8 (a) How does 8051 differentiate between the external and internal program memory?
   (b)Explain different modes of counter/timer.(6+10)


                        MICROPROCESSORS AND INTERFACING
                                   III B.TECH. II SEMESTER
                                        MODEL PAPER _3
   Answer any 5 questions
   1 It is necessary to check weather the word stored in location 4000H: A000H is positive
   number or not? Show all possible ways of testing the above condition and store 00h if the
   condition is satisfied in location 3000:2002. Otherwise store 0FFH. [16]
   2. a) Develop an 8086 assembly language program that will determine if a given sub-string
      is present or not in a main string of characters. Place the result as ‘P’ if present else place
      ‘N’ in memory location ‘result’.
      b) What is procedure? How is a procedure identified as near or far?             [10+6]
   3. a) Show the circuit required to generate the upper and lower I/O strobes in minimum and
      maximum modes of 8086?
      b) What is the minimum no. of bus cycles that can occur between the time an interrupt
      request is recognized and the first instruction in the interrupt service routine is fetched.
      Draw the interrupt acknowledge cycle?                           [7+9]
   4. Explain why 8255 ports are divided into two groups? Discuss how these groups are
      controlled in different modes of operation? Explain different control signals and their
      associated pins for bi-directional I/O mode of operation?             [4+6+6]
   5. a) What is the difference between 20mAcurrent loop and RS232-C standard?
      b) Explain the necessity of RS232 of TTL interface and draw the circuit?
      c) Draw the circuit of TTL to RS232 and explain the necessity of this interface. [6+5+5]
      a) Discuss the sequence of operations performed in the interrupt acknowledge cycle?
      b) What is the purpose of IF flag in handling the interrupts?
      c) Which interrupt type is associated with TF flag? What is the vector address? Explain
      the use of this interrupt? [5+5+6]

       It is necessary to interface 128KB SRAM and 32KB EPROM to an 8086 based system.
       The size of SRAM and EPROM chips is 16KB. Address map of SRAM is fixed from
       00000H to 1FFFFH and that of EPROM is from F8000H to FFFFFH. Design the entire
       memory interface? Give the address map of the individual chip?
                                                                                  [16]
6. An 8051 based system requires external memory of four 4Kbytes of SRAM each and two
     chips of EPROM of size 2Kbyes. The EPROM starts at address 2000H. SRAM address
     map follows EPROM map. Give the complete memory interface?
                                                                                              [16]
                      MICROPROCESSORS AND INTERFACING
                                 III B.TECH. II SEMESTER
                                      MODEL PAPER _4
            Answer any 5 questions
1. The register contents of 8086 is given below.
   CS=5000H, DS=6000H, SS=A000H, ES=B000H, SI=2000H, DI=3000H,
  BP=1002H, SP=0002H, AX=0000H, BX=5200H, CX=2000H, DX=2000H.
  Calculate the effective address and physical address of the following instructions.
     a) IMUL AX, [BP+BX-8D] b) SBB AL, ES:[SI+5D]
     c)PUSH AX                         d)AND AH, [SI+42D]
    e)CMPSB                                 f)CMP DX, [SI]
    g)XOR DH, [DI+8D                  ]h)DIV AX, [SI+2]                           (16M)
2. a) Using REPEAT-UNTIL construct, develop a sequence of 8086 instructions that reads a
character string from the keyboard and after pressing the enter key the character string is to
be displayed again.
     b)What is a procedure ? Give an example to declare a procedure as near .Make this
procedure as public.                                                               (7+9)
3.(a) What are the control signals useful for inter processor communication using
8086?What instruction support is provided in 8086?
     (b)Design an I/O port decoder that generates the following low-bank I/O strobes:
0010H,0020H,0030H,0040H.                                                           (6+10)
4.It is necessary to initialize interrupt for mode 1 operation of port A as input and port B as
out put in the same mode with the 8255 address map of 0400H to 0700H.Give the complete
hardware design to interface 8255 to 8086 processor with this map.Write the instruction
swequence for the initialization of 8255 in the above modes.Give the instruction sequence to
change the operation modes of portA,port C lower half and port B to mode 0 input ports.
                                                    (16M)

5.Why do we prefer interrupt driven data transfer than programmed I/O
transfer? Show the complete hardware design to resolve the multiple interrupts based on
priority.                                                                        (16M)
6.(a)What is the purpose of optional command words of 8259?Explain their formats and use.
(b) What is type 2 interrupt? Explain the condition for initiating type 2 interrupt. What is the
priority of this interrupt in 8086?                                      (10+6)
7.A target system based on 8086 processor uses less amount of SRAM. The programs are
stored in EPROM that starts from 80000H and ends with the address of FFFFFH. The
capacity of SRAM is 16KB interfaced at address 00000H.The chip size is 8KB.TRhe size of
EPROM is 64KB.Show the complete memory interface.(16M)
8.Draw and discuss the formats and bit definitions of the following SFR’s in 8051
microcontroller.
(a) PCON            (b) PSW      (c) IP    (d) TMOD                         (4x4=16)
                  SOFTWARE TESTING METHODOLOGIES (CS 05523)

   UNIT –I:

Introduction: Definition of testing, Purpose of testing, Dichotomies, model for testing,
consequences of bugs, taxonomy of bugs.

 Objectives:
After completion of the I unit the student must be able to
   1) Define and describe the purpose of testing.
   2) To learn about Dichotomies.
   3) Describes the model for testing.
   4) To learn about the consequences of bugs.
   5) To learn about the taxonomy of bugs.
   6) Types of manual testing methodologies.

Lesson plan:

1) Purpose of testing                         02
2) Dichotomies                                02
3) Model for testing                          02
4) Consequences of bugs                       02
5) Taxonomy of bugs                           02

                                      ------------------------
Total                                          10 hrs
                                      ------------------------
Assignment I:

   1)   What is the purpose of testing? Explain in detail.
   2)   Explain in brief about Dichotomies.
   3)   Explain a project model for testing.
   4)   Explain in brief the consequences of bugs.
   5)   Explain in brief the taxonomy of bugs.
   6)   Explain about white and black box testing techniques.
   7)   Life cycle process of testing.
   8)   Bug detection cycle.

UNIT –II:

Flow graphs and path testing: Basics concepts of path testing, predicates, path predicates and
achievable paths, path sensitizing, path instrumentation, application of path testing.
Objectives:

After completion of the II unit the student must be able to
   1) Describes the basic concepts of path testing.
   2) To learn about predicates, path predicates and achievable paths.
   3) To learn about path sensitizing and path instrumentation.
   4) To learn about application of path testing.

Lesson plan:

1) Basic concepts of path testing                                      01
2) Predicates                                                          01
3) Path predicates and achievable paths                                01
4) Path sensitizing and path instrumentation                           01
5) Application of path testing                                         01

                                                              ------------------------
                       Total                                           5 hrs
                                                              ------------------------

Assignment II:

1) Write about basic concepts of path testing.
2) Explain in detail the predicates and path predicates with examples.
3) Explain in detail path sensitizing and path instrumentation
4) Write in brief the application of path testing.

UNIT-III:

Transaction Flow Testing: Transaction flows, transaction flow testing techniques. Dataflow
testing: Basics of dataflow testing, strategies in dataflow testing application of dataflow testing.

Objectives:

After completion of the III unit the student must be able to
   1) Describes the transaction flow and their testing techniques.
   2) Describes the basics of dataflow testing and their strategies.
   3) To learn about the applications of data flow testing.

Lesson plan:
1) Transaction flow and their testing techniques                       02
2) Basics of data flow testing                                         01
3) Strategies in data flow testing                                     02
4) Applications of data flow testing                                   02

                                                              ------------------------
                      Total                                             7 hrs
                                                               ------------------------
Assignment III:

1) Explain in brief transaction flow testing techniques
2) Explain in brief the strategies in dataflow testing.
3) Application of data flow testing.
UNIT-IV:

Domain Testing: domains and paths, Nice &ugly domains, domain testing, domains and
interfaces testing, domain and interface testing, domain and testability.

Objectives:
1) To learn about nice and ugly domains.
2) To brief about domain and interface testing.
3) To discuss about domain and testability.

Lesson Plan:
1) Domains and paths                                 01
2) Nice and ugly domains                             01
3) Domain testing                                    01
4) Domains and interfaces testing                    02
5) Domain and Testability                            02

                                             ---------------------
                                                      07
                                             ----------------------
Assignment IV:
   1) Explain in detail nice and ugly domains.
   2) Explain in brief of domain testing and interface testing.
   3) Explain in brief the domain and its testability.


UNIT-V:
Paths, Path products and Regular expressions:
Path products & path expression, reduction procedure, applications, regular expressions &flow
anomaly detection.

Objectives:

1) To learn about path product and path expression
2) To describe the reduction procedure
3) To learn about regular expressions and flow anomaly detection

Lesson Plan:
1) Path product and path expression                   01
2) Reduction procedure                               01
3) Applications                                      01
4) Regular expressions                               01
5) Flow anomaly detection                            01

                                             ------------------------
                      Total                           5 hrs
                                             ------------------------
Assignment –V:

1)What is path product and path sum . Explain with example?
2)Give overview about distributive laws absorption rule.
3)Explain regular expressions and flow anomaly detection.


UNIT-VI:

Logic Based Testing: Overview, decision tables, path expressions, k-v charts, specifications


Objectives:

1) To discuss the overview of Logic based testing
2) To discuss the overview of decision tables, path expressions, KV charts.


Lesson Plan:
1) Logic based testing overview                      01
2) Decision tables                                   02
3) Path expressions                                  02
4) KV Charts                                         02

                                             ------------------------
                      Total                           7 hrs
                                             ------------------------
Assignment –VI:

1) Explain Logic based Testing.
2) Explain KV charts.



UNIT-VII:

State, State Graphs and Transition testing: State Graphs, good &bad state graphs, state testing,
Testability tips.
Objectives:
1) To learn about state graphs
2) To learn about good and bad state graphs
3) To describe about state testing and testability tips.




Lesson Plan:
1) State graphs, good and bad state graphs.            03
2) State Testing and Testability tips.                 03
                                                       --------------------
               Total                                            06
                                                       --------------------
Assignment-VII:

1) Explain state testing and its principles.
2) Explain software implementation.
3) Explain state bugs and transition bugs.
4) Test cases for use cases


UNIT-VIII:

Graphs Matrices and Application: Motivational overview, matrix of graph relations, Power of a
matrix, node reduction algorithm, building tools. Usage of JMeter and Winrunner tools for
functional / Regression testing, creation of test script for unattended testing, synchronization of
test case, Rapid testing, Performance testing of a data base application and HTTP connection for
website access.


Objectives:

1) To learn about Motivational overview
2) To describe about matrix graph relations
3) To learn about node reduction algorithm
4) To discuss about building tools.
5) Regression testing.
6) Performance testing.
7) Test case scenario’s.
Lesson Plan:

1) Motivational overview                                    01
2) Matrix of graph relations                                01
3) Power of a Matrix                                        01
4) Node reduction algorithm                                 01
5) Building Tools                                           02
6) Usage of Winrunner and JMeter.                           02
                                                   ------------------
               Total                                        08
                                                   --------------------
Assignment-VIII:

1) Explain about graph matrices and its applications.
2) Explain about build Tools like JMeter or Winrunner.




Text Books:
1. Software Testing Techniques-Baris Beizer, Dreamtech, Second Edition.

2. Software Testing Tools –Dr.K.V.K.K.Prasad, Dreamtech.