Low-loss Hard Switching

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					      Low-loss Hard Switching
               (LHS)
                                        A White Paper

               Donald F. Partridge1, One More Time LLC, USA
                 and Eric Carroll2, EIC Consultancy, France

                                        25th November 2008




Abstract
An invention (US Patent N° 7,417,409 B2 and others pending) is presented, which reduces inverter switching
losses by 90% allowing substantial increases in inverter power and/or frequency. Despite added
components, overall reliability of the semiconductors is increased because of substantial reductions in
dynamic voltage stress (higher safe operating area margins).
Designated “LHS”, the invention is a circuit which is inserted between the inverter and its energy source; no
changes to the inverter or its source are required but the insertion network, which contains switching
functions, requires an interface to the inverter controller. Any PWM algorithm may be used but an
optimized version, particularly suited to the present invention, is also briefly presented.
Detailed thermal calculations, using PLECS simulation software and commercially available semiconductors,
show that a 2-level/3MW/2.8kVDC/300Hz-PWM inverter can be operated at 220% of its maximum power
using LHS or at 7 times (2100Hz) its PWM frequency and 140% of maximal power, both with 99% efficiency.
The loss reductions apply to all semiconductors, inverter topologies and voltage levels but the examples
shown in the present paper are based on 4.5kV IGBTs, IGCTs and their free-wheel diodes.
The invention inherently allows fault-current limitation and greatly simplifies inverter protection strategy,
allowing fault interruption well within device safe operating limits. It also allows four-quadrant operation.
LHS has application to all power electronic inverters but will be of immediate strategic importance in the
fields of high-power, medium-voltage converters where the combination of high currents, high voltages and
high frequencies are today only possible with the parallel connection of de-rated semiconductors.
These fields are typically those of high-power wind-energy converters, marine drives, gas-compressors and
Flexible AC Transmission Systems.

                       1                                  2
                           dpart5837@aol.com                  eric@eicconsultancy.com
Low-loss Hard Switching




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                                  CONTENTS
1. Introduction ……………………………………………………….…………….                                             4
     1.1. Description ……………………………………………………………………… 4
    1.2. Benefits ………………………………………………………….………………. 5

2. Principle ……………………………………………………………………………. 8
    2.1. The Black Box ……………………………………………………………….…                                        8
    2.2. Thermal Budget ………………………………………….………………….…                                       9
    2.3. Switching Losses in Semiconductors ………………………………………..…                           9

3. Operation of the Present Invention ………………………………………..                                  10

4. Circuit Analysis ……………………………………………………………….…. 12

5. PWM Methods ………………………………………………………….………                                                15
     5.1. Standard PWM ……………………………………………………….……..…                                       15
    5.2. Optimized PWM …………………………………………………………….....                                      16

6. Fault Protection ……………………………………………………………….....                                        17

7. Conclusions ……………………………………………………….…..…………                                             18



                                 APPENDICES
Appendix I — Operation of the Clamp Circuit …………………………………………                             19

Appendix II— Variations of the LHS Circuit ……………………………………………. 21

Appendix III — Dynamic Losses in Semiconductors and Test Results ………………..                22

Appendix IV — Thermal Comparisons …………………………………………..……… 29

Appendix V — Commutation Analysis …………………………………………….……. 45

Appendix VI — Choice of Semiconductors ……………………………………………                                 47

Appendix VII — PLECS simulation circuits …………………………………………….. 48

Appendix VIII – Construction of autotransformer ……………………………………… 50



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                                                       Low-loss Hard Switching
1. Introduction
Low-loss Hard Switching (LHS) is an economic circuit technique for reducing inverter switching
losses to about 10% of conventional hard-switched losses. This is achieved by briefly reducing the
DC-link voltage to 10% of nominal value during the inverter commutation phases and is
represented as a three-terminal insertion network in Fig. 1a. It should be noted, that the operation of
LHS does not transfer losses to the Black Box but reduces them by 90% and is compatible with 4-
quadrant operation. The three-terminal network requires a low-cost co-axial autotransformer and
standard semiconductors.

                                                       A
                                     Black
                                      Box                  D1       S1        D3            S3   D5            S5




  +

  VDC                                                                                                                        Fig. 1a
                                                           D2       S2        D4            S4   D6            S6
                                                                                                                             Black Box
                                                                                                                             representation of the
                                                       B                                                                     insertion network for
                                                                                                                             LHS

                     1.1. Description
The Black Box of Fig. 1a is so designed as to modulate the input voltage to the inverter (the voltage
across Terminals A and B) per Fig. 1b.
   Inverter input voltage




                                             100% VS




                                                                                   tNOTCH
                            10% VS                                                                             Fig. 1b – Input voltage to the
                                                                                                               inverter (across Terminals AB) with
                                                                t                                              LHS operation

The DC voltage is cyclically reduced to, say, 10% of its nominal value during each inverter
commutation. During these low voltage "notches" or "blanks", each inverter commutation is
effected, be it ON or OFF, for all square-wave or PMW modes.

The Black Box has many circuit variants covered by US Patent N 7,417,409 B2 (other patents                °
pending with same filing date). Some of these variants are described in Appendix II.


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     1.2. Benefits
For a voltage of 10% VDC during commutation, the following benefits are obtained:
     •    greatly reduced turn-on losses for the inverter switches (≈ 93% reduction)
     •    greatly reduced turn-off losses for the inverter switches (≈ 70% reduction)
     •    greatly reduced turn-off losses for the inverter diodes (≈ 99% reduction)
     •    greatly increased SOA of the inverter devices (increased turn-off current/reduced device
          stress) leading to increased reliability
     •    fault current limitation for the inverter (very slow rise of fault current) allowing active turn-
          off of devices during fault at only 10% voltage
    •     combined with an optimized PWM algorithm (designated “OPWM”, patent pending), the
          total switching losses using LHS can be reduced by 95% allowing significant increases of
          power and/or frequency.

The loss-reduction benefits are illustrated in Figs 2a, b, c & d below.
The examples taken are based on 4.5kV devices operating at 2800 VDC in a 2-level, 50Hz, 3-phase
inverter with a modulation index of 0.8, a TJ SWITCH of 125°C, for various carrier frequencies.
Fig. 2a shows output powers normalized to a standard IGBT inverter operating with conventional
PWM without LHS. This 2.3MW reference is then compared to the same PWM using LHS and then
to LHS combined with OPWM and finally compared to LHS with a developmental PWM algorithm
(OPWM2), at 300Hz carrier frequency.


                          Normalized IGBT Inverter Power at 300Hz
    160%
    140%
    120%
    100%
     80%
     60%
     40%
     20%
         0%
                  PWM, 300Hz,     PWM/LHS, 300Hz, OPWM/LHS,                OPWM2/LHS,
                    2.3MW            3.1MW        300Hz, 3.2MW             300Hz, 3.7MW
                                                                            (predicted)

Fig. 2a – Example of IGBT inverter o/p powers with and without LHS and OPWM




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Fig. 2b shows normalized power for IGCT inverters (with clamp-circuits) referenced to a 3MW,
300Hz standard PWM design.

                          Normalized IGCT Inverter Power at 300Hz
   250%

   200%

   150%

   100%

       50%

           0%
                       PWM/Clamp,       PWM/LHS,        OPWM/LHS,            OPWM2/LHS,
                       300Hz, 3MW     300Hz, 5.7MW     300Hz, 6.6MW          300Hz, 7.6MW
                                                                              (predicted)

Fig. 2b – Example of IGCT inverter o/p powers with and without LHS and OPWM


In Fig. 2c the output powers of IGBT and IGCT inverters at 2100Hz carrier frequency are compared
for standard PWM and for OPWM with LHS; the inverter rating can be increased by up to 5 times
at this frequency level.

                         Power Increase with LHS and OPWM at 2100Hz
                                          IGBT                  IGCT
                 4.5
                 4.0
                 3.5
                 3.0
    Power (MW)




                 2.5
                 2.0                                                              4.3

                 1.5
                                                                       2.7
                 1.0
                 0.5                       0.8
                                0.7
                 0.0
                                2100Hz PWM                          2100Hz LHS & OPWM

Fig. 2c – Example of IGBT and IGCT inverter o/p powers with and without LHS and OPWM




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In Fig. 2d, the reduction of inverter losses can be seen when LHS and OPWM are compared to an
inverter using standard PWM and no LHS, for a constant o/p power (0.7MW for the IGBT and
0.8MW for the IGCT inverters respectively). The total inverter losses for 2100Hz operation are
reduced to 20 and 16% for IGBT and IGCT inverters, respectively.


                                   Normalized Inverter losses

                              2100Hz PWM                     2100Hz LHS & OPWM

      120%
                          100%                                   100%
      100%

                          23.4kW                                31.8kW
       80%

       60%

       40%
                                      20%
       20%                                                                      16%

                                    4.7kW                                     5.1kW
         0%
                            IGBT (0.7MW)                           IGCT (0.8MW)


Fig. 2d – Normalized inverter power losses for IGBT and IGCT inverters with and without LHS and OPWM

Fig. 2d illustrates the reduction in cooling requirements which can be achieved when the sole
objective is loss-reduction for a given o/p power and frequency.




Note: The following descriptions are made as succinct as possible with expanded explanations
being relegated to Appendices I to VIII. In this way, it is hoped that this White Paper will be easy
to read while remaining comprehensive for both those readers who are familiar with the
principles described as well those less technically involved.




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2. Principle
      2.1. The Black Box
In its simplest form, the Black Box is the circuit of Fig. 3.

                               T                                           A
                                                                                      Fig. 3
                                                                                      Simplest representation of the
 +                                                                                    LHS circuit: when the transistor
     VDC
                                                       +                              is ON, the full DC-link is
                                                                                      supplied to the inverter, when
                                                0.1VDC                                OFF, the inverter sees only
                                                                                      10% voltage during which, a
                                                                                      low-loss commutation may be
                                                                          B           executed

Fig. 3 is not a practical realization of LHS, merely an illustration of the principal of operation.
Fig. 4, on the other hand is a viable implementation of the invention in which the autotransformer T
provides the 10% notch voltage during conduction of switch SLHS.
In this version, the similarity with the conventional IGCT clamp circuit is apparent (Appendix I –
Operation of the Clamp Circuit). Here, the clamp-capacitor is replaced by the active switch, SLHS,
and the choke becomes a tapped choke or autotransformer. Fault limitation is achieved by the
magnetizing inductance of the autotransformer. Fault limitation will be discussed in a later section.
This circuit will be the object of subsequent analyses.

                                                       A
                 D                          •              D1        S1         D3             S3         D5            S5
                          9t       1t

                     •    nt            T

  +

      VS
                                        SLHS               D2        S2         D4             S4         D6            S6




                                                        B
Fig. 4 – LHS variant with energy recovery and no reduction of average o/p DC voltage at the inverter terminals

The circuit of Fig. 4 consists of a reverse blocking Turn-off Device (ToD) and a transformer with a
turns ration of n:10 with the 10-turn winding having a tap at 10%. The coupling between the
windings of this transformer is very tight to minimize leakage inductance, as can be achieved using
a coaxial air-cored construction –– see Appendix VIII for details. For the purposes of the
subsequent discussions, n = 45. The magnetizing inductance of the transformer is of the order 50µH
for a 3MW/2800V system.




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     2.2. Thermal Budget
By reducing or eliminating switching losses in the semiconductors, their “thermal budgets” are
improved, thus allowing more “room” for conduction loss dissipation i.e. enabling them to conduct
more (useful) load current. Additional losses are generated in the LHS switch but these are minor
because the duty cycle of the LHS switch is of the order of a few percent and the switch is chosen to
have very low dynamic losses (See Appendix IV “Thermal Comparisons”).
The overall thermal balance-sheets can be seen in Appendix IV for various PWM strategies using
PLECS simulation software.
Though the present invention has many circuit variants, summarized in Appendix II, the variant of
Fig. 4 is detailed here as it allows the recovery of the energy trapped in the LHS inductor during the
time that the DC rail is at 10%. This circuit is the simplest to understand and to simulate and is the
variant used for the thermal calculations. The systems analyzed use commercially available 4.5 kV
semiconductors on a 2.8kV DC link. At this voltage level, these devices have large switching losses.
An ideal LHS device has low turn-off losses and may have very high instantaneous conduction
losses (since the LHS duty-cycle is very low) but most HV ToDs today are designed for low
conduction loss and inevitably high turn-off losses. In order to base the thermal calculations on
currently available semiconductors, the LHS switches are modeled on four series-connected 1200V
IGBTs. A discussion of other suitable devices for the LHS switch can be found in Appendix VI.
Similarly, diode D of Fig. 4, is subject to hard commutations and requires a high blocking voltage
(6VS). Appendix II shows a non-exhaustive list of alternative topologies to avoid these difficulties
at high voltage.

     2.3. Switching Losses in Semiconductors

Switching losses occur in three phases as shown in Fig. 5:
at turn-on
               a) rising current, constant voltage
               b) falling voltage, constant current
               c) voltage tail (conductivity modulation) at constant current
at turn-off
               a) rising voltage, constant current
               b) falling current, constant voltage
               c) current tail at constant voltage

In general, parts a) and b) are circuit, not device dependent, and are hence amenable to reduction by
circuit techniques. Part C (Fig. 5) of the turn-off loss not amenable to loss-reduction. Part C of the
turn-on loss is subject to reduction by LHS and this is detailed in Appendix III.




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                                           overshoot


           I& V




                                                               tail


                                                                             t


                               a           b               c




                                                      E


Fig. 5 – Generic turn on or off waveforms

A detailed description of these losses is given in Appendix III – Dynamic Losses in Semiconductors.
This is accompanied by single-shot test results on a 2.5kV IGBT.

3. Operation of the Present Invention
The present invention achieves the functions described above, not by “phase-shifting” current and
voltage during commutation but by attenuating the DC-link voltage without transferring losses. The
commutation is thus considered "hard" (though nearly lossless) by virtue of the fact that although
the commutation voltage remains in phase with the current; it does so at a substantially reduced
level (10%).
LHS entails reducing the DC-link voltage seen by the inverter for a short period (of microseconds)
during the semiconductor turn-on and allowing the DC-link to return to its full value only after the
current has been established in the ToDs and commutated from the diodes. Similarly, the DC-link to
the inverter is reduced at each ToD turn-off and re-applied only after the current has been
commutated out of the ToDs and established in the diodes. Thus the voltage at the inverter
terminals appears as illustrated in Fig. 6.
It should be noted that the average DC voltage to the inverter remains unchanged at 100%VDC with
the version of LHS shown in Fig. 4 and studied throughout this report. The time during which the
voltage to the inverter is attenuated, is called the "notch time"; it is during this time that the inverter
is commutated. Therefore the number of tnotch events per cycle is equal to the number of inverter
commutations per cycle, which in turn depends on the PWM strategy (if any). The required duration
of the notch is a function of the semiconductor characteristics. The optimal value is expected to lie
between 200 ns for fast (LV) devices and 5µs for (slow) HV devices.




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At this point, we will define the DC voltages as follows:
the source voltage (normally the inverter input-voltage or "DC-link") will be called VS in this paper
and the input voltage to the inverter will be called VDC(t), since it is a time-dependent or "dynamic"
DC-link, which can have one of the three values shown in Fig. 6.
All simulated waveforms in this paper are computed using PLECS 2.1.0, courtesy of Plexim GmbH
(www.plexim.com).
    Inverter input voltage




                                          100% VS




                                120% VS
                                                                            tNOTCH
                             10% VS


                                                                    t
Fig. 6 – Voltage waveform as seen by inverter




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4. Circuit Analysis
To simplify understanding of LHS operation, the single-phase inverter of Fig. 7 is considered, for
which the gating signals are shown in Fig. 8. In the discussion which follows, a square-wave, 1kHz,
H-bridge is analyzed with a 3% (15µs) notch to facilitate viewing the waveforms at a 1ms period.
Some of the basic formulae governing the operation of the LHS transformer are established and
verified for an inverter commutation occurring at 5ms. The source voltage is set to 2000V, the
magnetizing inductance to 100µH and the load impedance to 1Ω/1mH.

                                                         A LS1                      LS2

                          9t          1t
                                                                    S1                           S3
             D            45t
                                           T
  +                                                                       D1                           D3
                                                          VDC(t)
      VS
                                                                    S2                           S4
                                           SLHS                                     LOAD

                                                                          D2                           D4


                                                         B                           LS3

Fig. 7 – LHS circuit used with a single-phase inverter




Fig. 8a – LHS gate pulses (top trace) timed to occur at inverter   Fig. 8b – Same as Fig. 8a but expanded to show the LHS gate
commutations (lower trace). The two-color waveforms are the        pulses starting before and stopping after an inverter
multiplexed inverter signals to the two legs of the H-bridge       commutation. The duration of the LHS signal is the notch time
Low-loss Hard Switching



Fig. 9 shows load, LHS and DC link currents and the DC-link voltage at 1Ω/1mH and this is
expanded in Fig. 10 to show the behavior of the LHS current.




Fig. 9 – Load, LHS, DC-link and magnetizing currents and DC-link voltage at 1Ω/1mH


The stray inductances shown in Fig. 7 play an important role in the commutations within the
inverter. The rates of change of current during the notch time are given by 0.1VS/(LS1+LS2/3) and the
di/dt can, depending on the strays, be even faster than in a conventional inverter. The stray
inductances, as always, contribute to the remaining switching losses and should be minimized.
These inductances are ignored in the thermal calculations of Appendix IV.




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Fig. 10 - Same as Fig. 9 but expanded to show the rise of current in the LHS switch prior to inverter commutation

The following relationships apply:
          VLM = VS 9t/(1t + 9t) = 0.9VS ………………………………………………………….. (1)
The rate-of rise of magnetizing current IM is given by:
          VLM/LM = 0.9VS/LM……………………………………………………………………. (2)
LHS current is given by: ILHS = IM/(1 + 1/9) = IM/1.11 = 0.9 IM due to the autotransformer action of
transformer T. Thus, the rate of rise of current in the LHS switch is given by:
          diLHS/dt = 0.92 VS/LM = 0.81 VS/LM. …………………………………………….…… (3)
NB: LM could also be represented by an inductance LM' across the full 10 turns of the primary in
which case it would be given by:
       LM' = LM/0.81 ………………………………………………………………………….. (4)

For ampere-turn balance in transformer T, the following equation applies:

          45 I45t + 9 I9t + 1 I1t = 0 ………………………………………………………….…… (5)
Appendix V – Commutation Analysis, describes the current flow in detail.



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5. PWM Methods
     5.1. Standard PWM
For reference, Fig. 11 shows the type of PWM used in the PLECS simulations for which the
parameters are:
m= 0.8, FFUND=50Hz, FC=900Hz, rising sawtooth, natural sampling per the Plexim definitions of
Fig. 12.




                                                                        Fig. 11
                                                                        Reference line-output voltage for
                                                                        chosen PWM pattern per
                                                                        definitions of Fig. 12 (no LHS)




                                                                        Fig. 12
                                                                        Definitions of standard or reference
                                                                        PWM (rising sawtooth, natural
                                                                        sampling) per PLECS manual




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     5.2. Optimized PWM (OPWM)

In an optimized PWM which minimizes losses in the LHS switch and further reduces inverter
switching losses, the switch carrying the highest current is left in the on-state while its opposite
numbers, carrying lower currents are switched. This not only reduces losses but allows the peak of
the fundamental component to attain 100% of VDC for m=1 as opposed to 86.6% of VDC for
conventional PWM. The inverter output waveforms and the ToD current waveforms are shown
below in Fig. 13.
                                                              Fig. 13a
                                                              Conventional 2100Hz PWM per Fig. 12




                                                              ← NB: ToD is switched throughout the
                                                              sine-wave current




                                                              Fig. 13b
                                                              Optimized 2100Hz PWM (OPWM)




                                                              ← NB: ToD is not switched during highest
                                                              current values




A refinement of OPWM allows a further increase in o/p voltage (and hence, power) of 15% but is
not within the scope of the present paper.


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6. Fault Protection
If a fault (shoot-through) occurs in the inverter or across the output terminals of the inverter, the
rate-of rise of fault current is determined by the magnetizing inductance shown in Appendix VII.
In the case of the 2-level inverter studied for the thermal comparisons of Appendix IV, the
magnetizing inductance is a 50µH inductor which, for a 2800VDC link, produces a fault di/dt of
56A/µs. A fault is shown in Fig. 14 for the case of an IGCT inverter operating at 2100Hz OPWM
whereby the inverter O/P has been increased to 4.3MW (Appendix IV, Table IVk, Case D4). This
results in a peak repetitive IGCT current of 2700A. Referring to Fig. 4, a device in position S2 is
shorted after 68ms of operation and the current in the opposite device (S1) is simulated. The shoot-
through occurs at the load-current peak of 2700A. After an initial step to 5400A, caused by the
device assuming the 2700A from the magnetizing inductance plus the 2700A from the load
inductance at nominal di/dt, the fault current can be seen to rise at 56A/µs. The chosen device has a
5500A turn-off capability at 2800VDC but by activating LHS for all inverter switching events –
including faults, the device will turn off at only 280V which allows far greater fault-current
interruption.




Fig. 14 – Inverter shoot-through at 68 ms for Case D, Appendix IV, Table IVe

The LHS autotransformer reverts to being an inductance once the inverter input draws more current
than is instantaneously available for transformer magnetization. Thus the LHS circuit, which
presents a low impedance during inverter commutations, suddenly assumes a high impedance
during a fault. Once the fault is detected, not only is there time to measure and inhibit (or short-
circuit) the inverter but by additionally activating the LHS switch, the fault current can be
interrupted at only 10% of link-voltage.



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7. Conclusions
LHS successfully separates the switching and conduction losses of inverter semiconductors making
it finally possible to design inverters and their semiconductors, for high current and voltage without
regard for switching losses and SOA. It requires an insertion network and semiconductors designed
for low switching losses without regard for conduction losses.
It has been shown that LHS technology allows significant power and/or frequency increases –
benefits which grow with the targeted carrier frequency and become increasingly important with
higher operating voltages since the ratio of EDYNAMIC/ECONDUCTION increases (as does also device
pricing), with voltage rating. The imminent advent of the 10kV IGCT is an important case in point
as is also that of its companion free-wheel diode.
The IGCT inverter, already requiring a clamp circuit, benefits significantly for little additional
circuitry or cost.
The inherent fault protection of the LHS circuit is a very desirable feature as it breaks the vexing
compromise between low losses and high surge-current of the conventional clamp circuit used for
IGCTs. This feature is potentially also of great importance for conventional IGBT inverters which
do not, in general, have satisfactory fault limitation and whose devices do not benefit from any form
of loss reduction.
An Optimized PWM technique was also developed in the course of the study. This technique is not
fundamental to the use of LHS but by reducing the number of high-current commutations, benefits
the semiconductor devices of both the inverter and the LHS switch. A further enhancement of the
OPWM technique, which will additionally increase o/p power by 15%, is currently in development.
While an optimal LHS semiconductor (high blocking voltage, low turn-off loss with a high on-state)
may not be readily available today, the required technologies to develop it are and the clear and
overwhelming advantages which LHS allows, make its development inevitable.
Even with semiconductors operating at three times their rated turn-off currents, they will
nevertheless be switching at only one third of their SOA limits since the switching voltages will be
typically one tenth of their rated values. Operational reliability should be increased by the greatly
increased SOA margin and life-time may also benefit from reduced junction temperature excursions
(at constant power). The fact that, the reduction of switching voltage will typically be much greater
than the increase in operational current (typically three times current for one tenth voltage) opens
the door to higher junction temperatures for the inverter switches: not only is the switching voltage
greatly reduced but the higher switching loss with increased temperature will have little impact on
the total losses.




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                           Appendix I – Operation of the Clamp Circuit
The inductance L of Fig. Ia limits the di/dt during commutation to a safe value for the diodes. The
resultant di/dt is given by VDC/L. The inductance further serves to limit the surge current from the
DC-source in the event of a short-circuit in the inverter. The resultant surge current is given by
ISURGE = VDC √(C/L) where C is the DC-link capacitance. Thanks to the presence of this clamp
circuit, turn-on losses in the switches S1-6 are eliminated from the semiconductors and initially
stored in L at the end of each turn-on event of switches S1-6 and subsequently dissipated, to a large
extent (≈ 70%), in resistance R.
Fig. Ia illustrates a conventional IGCT inverter, with a clamp circuit inserted between the DC-
source and the inverter.
                                   L


                           R                S1               S3            S5


 +                             Dclamp                 D1          D3             D5
                                                                                             Fig. Ia
  VDC
                                            S2               S4            S6
                                                                                             Typical IGCT inverter showing
                          Cclamp                                                             clamp circuit
                                                                                             (Patent: H.Grüning, J.Rees,
                                                      D2          D4             D6
                                                                                             D19543702.0
                                                                                             “Stromrichterschaltungsanordnung”)
Where switches S1-6 are IGCTs (thyristors), the clamp circuit of Fig. Ia is mandatory; where they are
IGBTs (transistors), the clamp circuit is optional since transistors can be gated to control their turn-
on rate (i.e. that dictated by the allowable turn-off di/dt of the diodes). This results in the turn-on
losses being dissipated by the IGBTs rather than by a resistance – an acceptable simplification
where only low switching frequencies are required (Fig. Ib).


                     D1                S1        D3               S3            D5      S5




  +

     VDC
                     D2                S2        D4               S4            D6      S6

                                                                                                        Fig. Ib
                                                                                                        IGBT inverter without
                                                                                                        clamp circuit



It should be noted that in the event of device failures in Fig. Ib, there is no impedance to limit the
discharge of the DC-link, which may lead to an explosion.
In the case of Fig. Ia, the voltage at turn-on drops quasi instantaneously across the ToD (IGCT) and
the DC-link voltage is sustained by the inductance L while the current ramps up in the device; this
is a "snubbered" or "soft" turn-on. In contrast, the IGBTs in Fig. Ib sustain the voltage during the
current ramp, giving rise to the "hard turn-on" waveform of Fig. Ic.


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                                             VGE [10 V/div]


                                               IC [250 A/div]

                              833 A/µs
                                    µ

                      EON = 7.4 WS




   EON circuit               EON device


                                               VCE [500 V/div]


                                                                           Fig. Ic
                          time [ 2 µs/div]
                                                                           4.5kV IGBT turn-on at 1000A/3000V
                                                                           without clamp circuit. Courtesy ABB


The circuits of Figs. Ia & Ib have no provisions for reducing turn-off losses such that at each turn-
off event the device turn-off losses are dissipated in the semiconductors. These losses consist of the
product integrated over time of the rising anode (or collector) voltage and the falling anode (or
collector) current. The anode current falls rapidly at first but then “tails” for a time, which increases
with device voltage rating (silicon thickness). This is illustrated in Fig. Id.
By delaying the rise of voltage across the device, the anode voltage and current can be phase-shifted
resulting in a reduction of the turn-off losses. This is typically done with snubbers (capacitances
across the ToDs) as was obligatory with GTO inverters for reasons of increased Safe Operating
Area. The use of snubbers remains optional for IGBTs and IGCTs (also as a means of SOA
enhancement). The turn-off losses in the diodes and ToDs are reduced by this technique but the
energy stored in the snubber capacitance must, at the next cycle, be dissipated resulting in the same
or even lower efficiencies.




                                                                 Fig. Id
                                                                 10kV/68mm IGCT turn-off during which the
                                                                 device dissipates about 15 joules at a peak
                                                                 power of about 7 MW.
                                                                 Courtesy ABB




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                           Appendix II – Variations of the LHS Circuit
                               (See Appendix VIII for details of transformer construction)

                           D
                                                                                                        Fig. IIa
                                               A
                                                                                                        Simple implementation of the LHS circuit
                                                        S1           S3            S5
                                                                                                        in which energy stored in the magnetizing
                      9t           1t
                                                                                                        inductance during conduction of SLHS is
              R                T
 +                                                             D1         D3            D4              dissipated in resistance R.
                                               VDC(t)
     VDC
                                                        S2           S4            S6
                               SLHS
       IDC                                                     D2         D4            D6
                                               B




                                                                                             Fig. IIb – More efficient version of the LHS circuit above.
                                                                                             With this version the switching losses of SLHS can be
                                                                                             reduced.
                                        SBY

                                                   D
                                                                          A
                               R
                                              9t         1t
              +                                        T   ´
                                                                           VDC(t)
               VDC

                                                       SLHS               nt
                                                                          B




                                                                                                                         Fig. IIc – Means of avoiding hard
                                                       S1                                                                commutation of Diode D1.
                                                                               D2
                                                                                                                         S1 is turned-on 1µs before SLHS
                                                                                                                         and turned off 1 µs after SLHS is
                                                                                                                         turned off. This avoids hard
                                                                                                        A                commutation of HV diode D1
                                                                                                                         (static rating = (n+1)VS) and its
                                                                                    •
                                                        9t                1t                                             dynamic rating is Vs. The
                                                                                                                         dynamic rating of D2 = VS. S1 has
                                               •                               T                                         soft turn off and a static voltage
                                                        nt                                                               rating of 9VS/n.
                                        D1
                  +                                                                                                      All magnetizing energy is returned
                                                                                                                         to source.
                      VS                                                                                 VDC(t)

                                                                               SLHS




                                                                                                        B




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                                                                                                         Fig. IId – Means of eliminating
                                          S1                                                             the HV Diode D1 of Fig. IIc.
                                                                                                         All diodes see VS dynamic only.

                               • 1                                                                       All magnetizing energy returned
                                                                                                         to source.
                                  T2P
                      D                                                                                  S1/2 are rated at 0.4VS.
                                    1                                                                    Secondary current and di/dt of T2
                                                                                                         is 20% of that of primary. T2 can
                                                                             A                           be an air-cored transformer using
                                          S2
                                                                                                         co-axial technology.
                                    9t             1t
                                                        T1

  +            D1                        D3
                              T2s
      VS                  •                                                      VDC(t)
                               5
                                                        SLHS
               D2                        D4




                                                                             B




                                                                                                       Fig. IIe – Means of reducing
                              S1                                                                       losses in the LHS switch for
                                              D2                                                       certain PWM algorithms (e.g.
                                                                                                       for OPWM).
                                                                                                       SLHS AUX is triggered on
                                                                 A                                     (instead of SLHS) on those
                  D1                              •                                                    PWM events where the initial
                              9t         1t
                                                                                                       current in the LHS switch is
                    •         nt              T                                                        zero and the final current will
                                                                                                       be equal to full load current.
  +                                                                                                    Doing this eliminates both
                                                                                                       turn-on and turn-off losses for
                                                                                          VDC(t)       those events.
      VS
                                                                                                       All magnetizing energy is
                                              SLHS                       SLHS AUX                      returned to source.




                                                                 B




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                                                                            Fig. IIf – Versatile version which can be
                                                                            operated in different ways depending on
                               R
                                                                            whether load is regenerative

                                        D2
                               S1



                                                                 A
                                             •
                               9t
                 D1                 •   T
                           3t

  +

      VS                                                         VDC(t)
                          S2
                                         SLHS
                 +
                0.3VS


                                                                 B



N.B.
The choice of circuit variant depends on the following issues:
      1. whether system is regenerative
      2. whether highest power or highest frequency is required
      3. whether cost is to be minimized or frequency maximized
      4. whether series connected devices are acceptable
      5. whether component count should be minimized (trade-off with efficiency)
      6. the inverter power level
      7. whether fault limitation is required (versions not shown do not require a series inductor)
      8. whether “tailless” devices are available (e.g. IGDTs): using a lossless snubber, such devices
         could be operated with negligible switching losses and therefore could be switched at a very
         high frequency
      9. whether an HV diode is available for hard switching.




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                  Appendix III — Dynamic Losses in Semiconductors
Dynamic losses in semiconductors
Switching transitions in semiconductors produce losses because the events are of finite duration
("imperfect switches"). In this section, we will look at the different phases of switching to
understand which are amenable to reduction. Switching generally consists of turn-on and turn-off
events though, for most power electronic application, the turn-on loss of a diode is considered
negligible.
Turn-on
Fig. IIIa shows the stylized turn-on of a 4.5 kV IGBT switching 3 kA at 3kV resulting in a 15 Ws
loss.

                 3 kV                               IRR          3 kA




                          3 kA/µ s
                               µ                                3 kV/µ s
                                                                     µ




                                     1 µs           1 µs


                                     5 Ws          5 Ws                    5 Ws




                                                           15 Ws


Fig. IIIa – Stylized turn-on of a 4.5 kV IGBT showing three loss phases
In Fig. IIIa, three distinct phases can be identified:
          Phase A: rising current at constant voltage
          Phase B: falling voltage at constant current
          Phase C: exponentially decaying voltage at constant current
Fig. IIIa suggests that the losses of the three phases are approximately equal.
Phase AON is the consequence of an imposed di/dt (through gate control). The voltage across the
active switch cannot fall until the current has been commutated out of the conducting free-wheel
diode. The losses generated here are therefore a characteristic of the circuit and not of the
semiconductor. The semiconductor could be spared this loss through an increase of di/dt but this
would increase the value of IRR, which not only works against the anticipated loss reduction but also
increases the losses in the diode (see later). Indeed it can be shown that the minimal turn-on loss for
the switch occurs when the di/dt is such that IRR is equal to ILOAD (= 3kA in this case).


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From Fig. IIIa, it can be appreciated that the Phase A loss is proportional to the applied voltage and
inversely proportional to the di/dt. Thus, by reducing the voltage (say, to one tenth), this part of the
loss will be reduced, provided the di/dt is held constant (or increased). With a reduced voltage, di/dt
may, indeed, be increased because the diode stress, is also dependent on switching voltage. With
LHS, the commutation di/dt will become a function of the stray inductance in the inverter and the
attenuated link voltage. IGBTs (gated with RG ON = 0Ω) and IGCTs, (which have no di/dt control),
will commutate at rates determined purely by VS 1t/(1t +9t) and (LS1 + LS2) i.e. at
di/dt = V1t/(LS1 + LS2) or, for VS = 2800V and LS = (LS1 + LS2) = 280 nH, we obtain di/dt = 1kA/µs
(see Fig. 7).
Phase BON is a combination of device characteristics and the external circuit. Where the external
circuit is inductive and the device is triggered with a strong gate pulse (i.e. RG ON = 0 for an IGBT
or IG = 200 A for an IGCT), the voltage will collapse across the device in fractions of a
microsecond as opposed to the one microsecond depicted in Fig. IIIa. This is illustrated in Fig. IIIb
for a GTO with two different gate currents and an anode inductance of 1µH.

 Ia (kA)                                                                V a (V)
                          Va                             5SGA 30J4502

                               thyristor turn-on
      3
                                                          Ia
                                                                        1000

      2
                                                                                   Fig. IIIb
                                        npn transistor turn-on          500        Turn-on of a GTO from 3kV at
                                                                                   3kA/µs with two different values of
      1
            3 kA/µ s
                                                                                   gate current. With "hard" gating
                                                                        0          and an inductance of 1µH, the
                                                                                   voltage collapses in less than
                                                                                   100ns. Courtesy ABB
       0                   1       2               3               4
                                   time ( µ s)




It will also be appreciated, that by making the turn-on "inductive" from a low voltage, that this part
of the loss will also be reduced in proportion to the voltage and to the fall time.
Phase CON is a characteristic of the device known as conductivity modulation (CM). During this
phase, carriers are injected, increasing conductivity until saturation is reached. This phase can be
considered to begin at the end of the anode or collector voltage fall-time. Conductivity modulation
is the principal turn-on energy loss of an IGCT since Phases AON and BON are eliminated by the
series inductor. This is why IGCTs exhibit 10 to 20 times less turn-on loss than their IGBT
counterparts as only CM constitutes the EON of an IGCT. Under such conditions, Phase CON is much
smaller than that depicted in Fig. IIIa. Using LHS (and RG ON = 0Ω for IGBTs), turn-on is inductive
with the inductance given by the stray inductance in the inverter and we therefore expect Phase CON
to be between 10% and 20% of the datasheet value of EON (i.e. roughly equivalent to that of an
IGCT at 1000A/µs, inductive.)
From the above, we expect Phases AON and BON (= 0.66 of EON) to reduce at least in proportion to
the applied voltage (i.e. to 10%) and at best, to disappear altogether. We expect Phase CON, at worst,
to not change at all and to represent between 5% and 10% of the full loss without LHS.
By this reasoning, EON should be reduced by between 85% and 95%.



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Turn-off
Fig. IIIc represents the stylized turn-off of an IGBT or an IGCT in which, again, three phases are
distinguishable.


                   3 kA                                            3 kV




                          3 kV/µs
                               µ                               3 kA/µs
                                                                    µ




                                        1 µs        1µs
                                                     µ


                                        5 Ws       5 Ws                   5 Ws




                                                           15 Ws

Fig. IIIc – Stylized turn-off of an IGBT or IGCT
Phase AOFF: rising voltage at constant current. This is a characteristic of the device and, for an
IGBT, also, of the way it is gated off. The current remains unchanged until the anode or collector
voltage exceeds the DC link value, at which point the FWD conducts the current away from the
active switch. This loss part is proportional to anode voltage and inversely proportional to dv/dt.
Provided the dv/dt is kept constant (or increased), the losses can be reduced at least proportionately
with voltage. This phase is the counterpart of Phase AON.
Phase BOFF: falling current at constant voltage. The applied voltage is the constant DC link voltage
and the current falls at a rate determined by the stray inductance. If the current fall-time can be kept
constant, this part of the loss will be proportional to the commutation voltage. This implies however,
that the stray inductance can be kept low because the energy it stores at turn off will be absorbed by
the active device as ½ (LS1 + LS2) ILOAD2. This is the energy which was stored in the stray
inductance at turn-on during Phase AON.
Phase COFF: tailing current at constant voltage. During this phase, the minority carriers which were
stored during conduction, are extracted. If no voltage is applied, this charge will be absorbed by
internal recombination at a rate which depends on carrier lifetime. The carrier lifetime is typically
kept high for high-voltage, high power devices, in order to minimize the conduction losses. The
"open-circuit lifetime" (the time required for the carriers to recombine in the absence of an
extracting voltage) could be of the order of 100µs for a 4.5 kV device. Though the losses during the
tail current will be reduced, reapplication of the full DC voltage after the notch time will result in



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the reappearance of carrier extraction and hence, losses. This part of the turn-off loss is therefore
not amenable to significant reduction (unless the notch is extended to several tens of microseconds).
Fig. IIIc suggests that the losses of the three phases are approximately equal under datasheet
conditions.
From the above we expect Phases A and B to reduce in proportion to the voltage and Phase C to
remain unchanged so that EOFF should be reduced by at least 60%.

Reverse Recovery
Fig. IIId represents the stylized turn-off of a diode in which, again, three phases can be defined.


                   3 kA
                                                                       3 kV




                                        Initial Dynamic                    Tail
                                      recovery avalanche                  current


                                                               15 Ws
Fig. IIId – Stylized reverse recovery of a diode
The waveform of Fig. IIId depends on the design of the diode and whether it is a "resistive" or
"inductive" commutation, i.e. whether the turn-off di/dt depends on the switching speed of the
switch (IGBT) or on the value of the external inductance (IGCT). In either case, Fig. IIId represents
the diode's current waveform but the relative values of the three phases will vary.
Phase AREC: Here the current becomes negative and at some point, begins to sustain voltage
defining the start of Phase A. If the di/dt is principally set by the speed of the switch, this phase
begins early (close to zero cross); if di/dt is set principally by the size of the inductance, it will start
later (closer to the peak recovery current). In either case, the diode starts to sustain voltage in this
phase, prior to the peak value being reached and the voltage rises rapidly as the reverse current
"rounds off", reaching its peak value, IRR, where IRR, the diode peak reverse recovery current, is a
function of di/dt and reapplied voltage. If the di/dt is kept constant and the voltage lowered, the
losses engendered in this phase will be reduced, at least in proportion to the voltage.



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Phase BREC: After the peak current, the voltage continues to rise, but at a lower rate, as the device
is driven into dynamic avalanche. This stops the current from falling back to zero according to an
exponential decay function, because, although the minority carriers are being extracted and
absorbed, others are being avalanche injected. This phase is very sensitive to voltage amplitude as
avalanche can only occur at high voltage. At 10% voltage, avalanche will not occur provided stray
inductance is minimized.
Phase CREC: Once the voltage has stabilized at VDC-link, the excess carriers resulting from
conduction and avalanche, can be extracted as a tail current. Where the carriers result from
conduction, they will not be amenable to loss-reduction by voltage attenuation during the notch, i.e.
they will still be present when the full link voltage returns as with Phase COFF. Those however
generated by dynamic avalanche, will have been completely suppressed during Phase BREC.

Measurement Results
To verify the reasoning of the foregoing, single-shot dynamic loss measurements were performed at
1MT on ABB IGBT type 5SNA 1200E250100. The results obtained are shown in Table 1.

Loss                              Measured at 100%              Measured at 10%             Loss Reduction
                                      Voltage                        Voltage
                                   (nominal loss)                (loss with LHS)

EON                                       0.78 J                      0.054 J                       93.1%

EOFF                                     0.965 J                      0.292 J                       69.7%

ERR                                       0.78 J                      0.003 J                       99.6%

Total Switching Loss                      2.53 J                      0.349 J                       86.2%

Table IIIa – Test results on ABB IGBT module type 5SNA 1200E250100 at 1200A and 1250V and 125V with
stray inductance of 35 nH and RG ON/OFF = 0 ohms. Tj = 25°C.
The notch time for this 2500V device was set at approximately 10µs.


EON
EON was reduced by over 90%. Parts A and B were expected to drop by 90% for constant di/dt and
conductivity modulation was expected to be unchanged at 5 - 10% of nominal EON. The result was
as expected (85% < 93.1% < 95%).
EOFF
As anticipated, EOFF was expected to reduce by 60%, 40% of the loss remaining due to tail current.
The result was better than expected (60 < 69.7%).
ERR
This is the most difficult loss reduction to assess. The result shows that in the case of reverse
recovery, LHS suppresses practically all the losses, which was much better than expected.
Thus, the overall benefit of LHS on a single-cycle basis, is a total loss reduction of 86%. This figure
is nevertheless conditional on achieving low stray inductance in the inverter layout.
1MT has developed a simple IGBT packaging arrangement which significantly lowers the stray
connection inductance of the inverter. Combining, LHS with an optimized PWM technique, reduces
total switching losses by 95%.



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                                      Appendix IV – Thermal Comparisons
Extensive calculations were performed using PLECS 2.1.0 on 2-level inverters using 4.5 kV IGBTs
(190mm modules) and IGCTs (4” silicon). The LHS switches were composed of 4 series-connected
1200V IGBT modules of the 130mm types for the IGBT inverters and of the 190mm types for the
IGCT inverters. No attempt was made to minimize these modules as a function of their junction
temperatures which, in all the case studies, never exceeded 90°C.
The four series-connected IGBTs that were used in this White Paper, were chosen for ease of
simulation. Appendix II shows several front-end topologies which achieve the same results and do
not require series connection.
All the key parameters are listed in the following tables including thermal resistances sink-ambient.
The ambient temperature, for all calculations, was set to 60°C.

Device Models
The PLECS semiconductor models are derived from the manufacturer’s datasheets.
Diode Recovery (ERR)
The diode recovery losses are entered into PLECS look-up tables as they are given in the
manufacturer’s data sheets. At 10% commutation voltage, PLECS will calculate a 90% loss
reduction (99% by measurement – Table IIIa).

Turn-on Energy (EON)
The above also applies to IGCT turn-on energy data: PLECS will calculate a 90% reduction (93%
by measurement – Table IIIa).
In the case of IGBTs, turn-on at only 10% voltage (and the diodes’ turn off at the same voltage)
means that the ON gate-resistance can be reduced to 0Ω; this is analogous to the "uncontrolled"
turn-on of the IGCT. The turn-on energy for IGBTs under this condition is derived from the
datasheet by plotting the EON vs RG curve into an Excel table and developing a trendline to
determine EON at RG = 0 as shown in Fig. IVa.

                                      Eon
           14
                    y = -0.0214x2 + 1.15x + 1.4
           12

           10
 Eon (J)




           8

           6
                                                                      Fig. IVa
                                            Eon
           4
                                                                      EON data for ABB IGBT module
                                                                      5SNA 1000G450300 showing the trendline
           2
                                                                      extrapolating to RG = 0Ω
           0
                0                 5              10             15
                                      Rg_on (ohms)

From Fig IVa it can be seen that for RG = 0, the turn-on energy is reduced to 1.4J instead of the 3J
given for RG = 1.5Ω (standard condition). This corresponds to a 47% reduction in turn-on energy
which is applied to the inputted data for the PLECS look-up table.


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Turn-off Energy
From Fig. IIIc and Table IIIa of Appendix IIIa, it will be recalled that 30% of the turn-off loss will
not be attenuated by the reduced voltage as the stored charge, which causes the tail current, will still
be present by the end of the notch time (unless the notch time is made very long).
From Fig. IIIc, we can derive the following relationship:
EOFF = EA + EB + EC where EA, EB and EC are the three off-phases of Fig. IIIc and EOFF is the total
datasheet turn-off energy at IA and VDC.
EA and EB are proportional to the reapplied voltage VDC whereas EC is not, as already discussed.
PLECS must therefore be made to apply a 10% reduction to EA and EB but to leave EC unchanged.
Thus, in general, the PLECS calculated energy EOFF LHS must be given by:
          EOFF LHS = EOFF•(0.1•0.7 + 0.3) = 0.4EOFF ………………………………… Eqn IVa
This is achieved by entering four times the specification values into the PLECS lookup table for
turn-off energy so that PLECS then attenuates 4•EOFF by a factor 10 thus producing 0.4EOFF. Thus:
          EOFF LHSPLECSIGBT = 4•EOFFSPEC
This approach is used for IGBTs.

In the case of IGCTs, the EOFF data in the datasheet is given for turn-off at specified values of VDC
and IA in the presence of a clamp circuit. The loss data therefore includes additional losses caused
by a 33% overvoltage at turn-off. With LHS, there is no such overvoltage and the input EOFF data
for the IGCT should therefore be reduced in total by 1/1.33 = 0.75. The correction for IGCT turn-
off energy is therefore as in Eqn IVa but with an additional reduction of 75%:
          EOFF LHS =0.75•EOFF•(0.1•0.7 + 0.3) = 0.3EOFF …………………………… Eqn IVb
        This is achieved by entering three times the specification values into the PLECS lookup
table for turn-off energy so that PLECS then attenuates 3•EOFF by a factor 10 thus producing
0.3EOFF. Thus:
          EOFF LHSPLECSIGCT =0.3•EOFFSPEC
This approach is used for IGCTs.


The clamp-resistance losses for IGCTs without LHS are obtained from separate simulations using a
clamp circuit with a 35µs dead-time between OFF and ON which enables the clamp-inductance to
discharge prior to a subsequent commutation. The actual semiconductor losses are computed
without a clamp circuit and using exact IGCT and diode datasheet values without any adjustments.
This is possible because the semiconductor data is given for di/dt conditions imposed by the
recommended clamp circuit. PLECS takes the data from the semiconductor look-up tables and
computes losses for the condition at the instant of commutation using datasheet energies (from the
look-up tables) which are derived for the operating conditions. These conditions include di/dt (for
ERR and EON) and clamp circuit overvoltage (for EOFF).




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LHS Losses
In the case of the LHS switch, low di/dt turn-on events, determined by the magnetizing inductance
(56A/µs), are computed to be zero. This is deemed to be correct since the turn-on is indeed very
“soft”.
Thermal Resistance and Temperatures
The same RTH SA (sink – ambient) is used for both the IGBT and the IGCT examples (0.009°C/W)
with one such heat-sink for each semiconductor. Each case is calculated iteratively to achieve TJ PK
= 125°C which determines the maximum possible O/P power for a given inverter configuration.
The ambient temperature is set to 60°C.
Results
The results compare standard PWM without LHS (Cases A1 & A4) with standard PWM with LHS
(Case B1) and Optimized PWM at different frequencies (Cases D1 to D4).
Tables IVa and IVb summarize the principal results for IGBT and IGCT inverters respectively.


                                        No LHS                                               LHS
                                                                                                OPWM*
                              A1 - PWM,       A4-PWM,    B1- PWM/LHS, D1 - OPWM/LHS, D2 - OPWM/LHS, D3 - OPWM/LHS, D4 - OPWM/LHS,
                            300Hz, 2.3MW   2100Hz, 0.7MW 300Hz, 3MW    300Hz, 3.2MW    900Hz, 3MW    1500Hz, 2.9MW 2100Hz, 2.7MW
  Single IGBT Loss (W)         2,830             2,932          2,858       2,742           2,841           2,932             2,942
   Inverter Dynamic (W)        9,816             21,450         3,582       1,728           3,492           5,202             6,720
    Inverter Static (W)        10,566            1,920         16,956      17,760           15,702          14,340            12,750
         LHS (W)                n/a                n/a          1,228       1,028           1,832           3,104             4,668
     Grand Total (W)           20,382            23,370        21,766      20,516           21,026          22,646            24,138
 Inverter I/P Power (MW)       2.327             0.684          3.078       3.204           3.075           2.900             2.724
         Efficiency            99.1%             96.6%          99.3%       99.4%           99.3%           99.2%             99.1%
     VLINE RMS (fund) (V)      1,277             1,227          1,253       1,265           1,347           1,348             1,354
         Iline RMS (A)         1,053              322           1,418       1,461           1,318           1,245             1,158

Table. IVa – Comparison chart for IGBT Inverters


                                 Clamp, No LHS                                               LHS
                                        PWM                   PWM                                 OPWM*
                             A1 - PWM,        A4-PWM,    B1- PWM/LHS, D1 - OPWM/LHS, D2 - OPWM/LHS, D3 - OPWM/LHS,       D4 - OPWM/LHS,
                            300Hz, 3MW     2100Hz, 0.8MW 300Hz, 5.7MW 300Hz, 6.6MW    900Hz, 5.8MW   1500Hz, 4.9MW        2100Hz, 4.3MW
      IGCT Loss (W)            3,304           3,347         3,323          3,183          3,368          3,385                3,433
   Inverter Dynamic (W)       17,604          28,758          9,132       5,094            8,850           11,436             13,332
    Inverter Static (W)        7,986             1,542        19,722      23,586          16,662           13,020             10,692
    LHS or Clamp (W)           4,300             1,490        2,276       2,396            4,704           7,036              8,708
     Grand Total (W)          29,890          31,790          31,130      31,076          30,216           31,492             32,732
  Inverter I/P Power (MW)      3.05              0.82          5.73        6.60            5.80             4.90               4.28
         Efficiency            99.0%          96.1%           99.5%       99.5%           99.5%            99.4%              99.2%
     VLINE RMS (fund) (V)      1,277             1,227        1,232       1,233            1,328           1,339              1,349
        Iline RMS (A)          1,378             385          2,684       3,096            2,530           2,118              1,833

Table. IVb – Comparison chart for IGCT Inverters


Figs IVb and IVc show the inverter powers and efficiencies of the above tables as histograms.




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                                                       Inverter I/P Power and Efficiency for IGBT Tj = 125°C

                                                                Inverter I/P Power (MW)                           Efficiency

                             3.500                                                                                                            100.0%

                             3.000                                                                                                            99.5%
        Inverter Power (W)




                                                                                                                                              99.0%
                             2.500




                                                                                                                                                        Efficiency
                                                                                                                                              98.5%
                             2.000
                                                                                                                                              98.0%
                             1.500
                                                                                                                                              97.5%
                             1.000
                                                                                                                                              97.0%

                             0.500                                                                                                            96.5%

                             0.000                                                                                                            96.0%
                                        A1 - PWM,    A4-PWM,       B1- PWM/LHS, D1 - OPWM/LHS, D2 - OPWM/LHS, D3 - OPWM/LHS, D4 - OPWM/LHS,
                                      300Hz, 2.3MW 2100Hz, 0.7MW    300Hz, 3MW   300Hz, 3.2MW   900Hz, 3MW 1500Hz, 2.9MW 2100Hz, 2.7MW




Fig. IVb – Power and Efficiency for IGBT inverters for Cases A, B and D




                                              Inverter I/P Power and Efficiency for IGCT Tj = 125°C
                                                           Inverter I/P Power (MW)                               Efficiency
                             7.00                                                                                                         100.0%

                             6.00                                                                                                         99.0%
 Inverter Power (MW)




                             5.00
                                                                                                                                          98.0%




                                                                                                                                                      Efficiency
                             4.00
                                                                                                                                          97.0%
                             3.00
                                                                                                                                          96.0%
                             2.00

                             1.00                                                                                                         95.0%


                             0.00                                                                                                         94.0%
                                      A1 - PWM,     A4-PWM,     B1- PWM/LHS,        D1 -         D2 -          D3 -         D4 -
                                     300Hz, 3MW   2100Hz, 0.8MW 300Hz, 5.7MW     OPWM/LHS,    OPWM/LHS,    OPWM/LHS,     OPWM/LHS,
                                                                                300Hz, 6.6MW 900Hz, 5.8MW 1500Hz, 4.9MW 2100Hz, 4.3MW



Fig. IVc – Power and Efficiency for IGCT & clamp inverters for Cases A, B and D


The following tables (Tables IVc to IVj) show the detailed results of various cases, including those
of the above, for maximal inverter power (TJ SWITCH = 125°C) i.e. for details of the first bar, see
tables marked “A1”, for the second bar see Tables marked “A4” etc.




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IGBT Results

     A1        PWM without LHS, 300Hz - TJMAX                                           Dynamic as %
                     Losses          Static Dynamic                      Total             of Total

               IGBT (W)                   1,393           1,437           2,830             51%
               FWD (W)                     368             199             567              35%
               IGBT + Diode (W)           1,761           1,636           3,397             48%
               Inverter Total (W)         10,566          9,816          20,382
               LHS switch                   n/a            n/a             n/a
               GRAND TOTAL (W)                                          20,382
               Inverter I/P Power (MW)     2.33                    FC (Hz) =                300
               Inverter O/P Power (MW)     2.31                    Iload PK =              1,900
               Efficiency                   99.1%                  Vline RMS (fund) =      1,277
               Power Factor               0.885                    Iline RMS =             1,053
               TJ IGBT pk /ave             125             117     RLOAD (Ω) =              0.70
               TJ FWD pk /ave               81             77      LLOAD (mH) =             1.12
               Inverter Switch           5SNA 100G450300           RTHJ_A (inv) =          0.009
               Inverter FWD              5SNA 100G450300           RTHJ_A (LHS) =            n/a
               LHS switch                   n/a            n/a     m=                        0.8

     A4        PWM without LHS, 2100Hz - TJMAX                                          Dynamic as %
                     Losses          Static Dynamic                      Total             of Total

               IGBT                        247            2,685           2,932             92%
               FWD                          73             890             963              92%
               IGBT + Diode                320            3,575           3,895             92%
               Inverter Total             1,920           21,450         23,370
               LHS switch                                                  n/a
               GRAND TOTAL                                              23,370
               Inverter I/P Power (MW)     0.68                    FC (Hz) =               2,100
               Inverter O/P Power (MW)       0.660                 Iload PK =               483
               Efficiency                   96.6%                  Vline RMS (fund) =      1,227
               Power Factor               0.929                    Iline RMS =              322
               TJ IGBT pk /ave             125             117     RLOAD (Ω) =             2.200
               TJ FWD pk /ave               93             89      LLOAD (mH) =            3.520
               Inverter Switch           5SNA 100G450300           RTHJ_A (inv) =          0.009
               Inverter FWD              5SNA 100G450300           RTHJ_A (LHS) =            n/a
               LHS switch                   n/a            n/a     m=                        0.8
Table IVc – Conventional PWM without LHS, 300Hz and 2100Hz, IGBT inverter




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     B1        PWM with LHS, 300Hz - TJMAX                                              Dynamic as %
                     Losses           Static           Dynamic           Total             of Total

               IGBT                        2,283           575            2,858             20%
               FWD                          543             22             565               4%
               IGBT + Diode                2,826           597            3,423             17%
               Inverter Total             16,956           3,582         20,538
               LHS                           13            294            1,228         (total)
               GRAND TOTAL                                              21,766
               Inverter I/P Power (MW)         3.08                FC (Hz) =                 300
               Inverter O/P Power (MW)        3.056                Iload PK =               2,600
               Efficiency                    99.3%                 Vline RMS (fund) =       1,253
               Power Factor                0.881                   Iline RMS =              1,418
               TJ IGBT pk /ave              125            118     RLOAD (Ω) =              0.510
               TJ FWD pk /ave                80             77     LLOAD (mH) =             0.816
               TJ LHS pk /ave                68             68     RTHJ_A (inv) =           0.009
               Inverter Switch           5SNA 100G450300           RTHJ_A (LHS) =         0.003375
               Inverter FWD              5SNA 100G450300           FLHS (Hz) =              3600
               LHS switch                4 x FZ 1600 R 12 KE3      m=                        0.8
                                                                   FLHS (Hz) =              1200


     B2        PWM with LHS, 900Hz - TJMAX                                              Dynamic as %
                    Losses          Static             Dynamic           Total             of Total

               IGBT                        1,807           1,084          2,891             37%
               FWD                          413             71             484              15%
               IGBT + Diode                2,220           1,155          3,375             34%
               Inverter Total             13,320           6,930         20,250
               LHS                           31            753            3,136         (total)
               GRAND TOTAL                                              23,386
               Inverter I/P Power (MW)         2.45                FC (Hz) =                 900
               Inverter O/P Power (MW)         2.43                Iload PK =               1,920
               Efficiency                    99.0%                 Vline RMS (fund) =       1,183
               Power Factor                0.883                   Iline RMS =              1,198
               TJ IGBT pk /ave              125            118     RLOAD (Ω) =              0.570
               TJ FWD pk /ave                77             75     LLOAD (mH) =             0.912
               TJ LHS pk /ave                78             78     RTHJ_A (inv) =           0.009
               Inverter Switch           5SNA 100G450300           RTHJ_A (LHS) =         0.00225
               Inverter FWD              5SNA 100G450300           m=                        0.8
               LHS switch                4 x FZ 1600 R 12 KE3      FLHS (Hz) =              3600
Table IVd – PWM with LHS, 300Hz and 900Hz, IGBT inverter




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     C1        OPWM without LHS, 300Hz - TJMAX                                          Dynamic as %
                    Losses          Static Dynamic                       Total             of Total

               IGBT                       2,055            656            2,711             24%
               FWD                         435             11              446              2%
               IGBT + Diode               2,490            667            3,157             21%
               Inverter Total             14,940          4,002          18,942
               LHS switch                  n/a             n/a             n/a
               GRAND TOTAL                                              18,942
               Inverter I/P Power (MW)     2.95                    FC (Hz) =                300
               Inverter O/P Power (MW)       2.928                 Iload PK =              2,500
               Efficiency                   99.4%                  Vline RMS (fund) =      1,295
               Power Factor               0.883                    Iline RMS =             1,312
               TJ IGBT pk /ave             125             117     RLOAD (Ω) =             0.570
               TJ FWD pk /ave               78             75      LLOAD (mH) =            0.912
               Inverter Switch           5SNA 100G450300           RTHJ_A (inv) =          0.009
               Inverter FWD              5SNA 100G450300           RTHJ_A (LHS) =            n/a
               LHS switch                  n/a             n/a     m=                        0.8

     C4        OPWM without LHS, 2100Hz - TJMAX                                         Dynamic as %
                    Losses          Static Dynamic                       Total             of Total

               IGBT                        661            2,310           2,971             78%
               FWD                         121             668             789              85%
               IGBT + Diode                782            2,978           3,760             79%
               Inverter Total             4,692           17,868         22,560
               LHS switch                  n/a             n/a             n/a
               GRAND TOTAL                                              22,560
               Inverter I/P Power (MW)     1.46                    FC (Hz) =               2,100
               Inverter O/P Power (MW)       1.437                 Iload PK =               877
               Efficiency                   98.5%                  Vline RMS (fund) =      1,414
               Power Factor               0.905                    Iline RMS =              596
               TJ IGBT pk /ave             125             119     RLOAD (Ω) =             1.370
               TJ FWD pk /ave               87             83      LLOAD (mH) =            2.192
               Inverter Switch           5SNA 100G450300           RTHJ_A (inv) =          0.009
               Inverter FWD              5SNA 100G450300           RTHJ_A (LHS) =            n/a
               LHS switch                  n/a             n/a     m=                        0.8
Table IVe – OPWM without LHS, 300Hz and 2100Hz, IGBT inverter




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     D1        OPWM with LHS, 300Hz, - TJMAX                                                Dynamic as %
                    Losses          Static Dynamic                           Total             of Total

               IGBT                        2,455           287                2,742             10%
               FWD                          505             1                  506               0%
               IGBT + Diode                2,960           288                3,248              9%
               Inverter Total             17,760           1,728             19,488
               LHS                                 7             250          1,028         (total)
               GRAND TOTAL                                                  20,516
               Inverter I/P Power (MW)         3.20                    FC (Hz) =                 300
               Inverter O/P Power (MW)         3.18                    Iload PK =               2,800
               Efficiency                    99.4%                     Vline RMS (fund) =       1,265
               Power Factor                0.881                       Iline RMS =              1,461
               TJ IGBT pk /ave              125            117         RLOAD (Ω) =               0.50
               TJ FWD pk /ave                81             76         LLOAD (mH) =              0.80
               TJ LHS pk /ave                66             66         RTHJ_A (inv) =           0.009
               Inverter Switch           5SNA 100G450300               RTHJ_A (LHS) =         0.00225
               Inverter FWD              5SNA 100G450300               m=                       0.800
               LHS switch                4 x FZ 1600 R 12 KE3          FLHS (Hz) =               900


     D2        OPWM with LHS, 900Hz - TJMAX                                                 Dynamic as %
                    Losses          Static Dynamic                           Total             of Total

               IGBT                        2,260           581                2,841             20%
               FWD                          357             1                  358               0%
               IGBT + Diode                2,617           582                3,199             18%
               Inverter Total             15,702           3,492             19,194
               LHS                                12             446          1,832         (total)
               GRAND TOTAL                                                  21,026
               Inverter I/P Power (MW)         3.08                    FC (Hz) =                 900
               Inverter O/P Power (MW)         3.05                    Iload PK =               2,080
               Efficiency                    99.3%                     Vline RMS (fund) =       1,347
               Power Factor                0.883                       Iline RMS =              1,318
               TJ IGBT pk /ave              125            117         RLOAD (Ω) =               0.59
               TJ FWD pk /ave                73             71         LLOAD (mH) =             0.944
               TJ LHS pk /ave                67             67         RTHJ_A (inv) =           0.009
               Inverter Switch           5SNA 100G450300               RTHJ_A (LHS) =         0.00225
               Inverter FWD              5SNA 100G450300               m=                        0.8
               LHS switch                4 x FZ 1600 R 12 KE3          FLHS (Hz) =              2700
Table IVe – OPWM with LHS, 300Hz and 900Hz, IGBT inverter




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     D3        OPWM with LHS, 1500Hz - TJMAX                                            Dynamic as %
                    Losses         Static Dynamic                        Total             of Total

               IGBT                        2,070           862            2,932             29%
               FWD                          320             5              325               2%
               IGBT + Diode                2,390           867            3,257             27%
               Inverter Total             14,340           5,202         19,542
               LHS                           18            758            3,104         (total)
               GRAND TOTAL                                              22,646
               Inverter I/P Power (MW)     2.90                    FC (Hz) =                1,500
               Inverter O/P Power (MW)     2.88                    Iload PK =               1,870
               Efficiency                    99.2%                 Vline RMS (fund) =       1,348
               Power Factor                0.884                   Iline RMS =              1,245
               TJ IGBT pk /ave              125            117     RLOAD (Ω) =               0.63
               TJ FWD pk /ave                70             72     LLOAD (mH) =              1.00
               TJ LHS pk /ave                76             76     RTHJ_A (inv) =           0.009
               Inverter Switch           5SNA 100G450300           RTHJ_A (LHS) =         0.003375
               Inverter FWD              5SNA 100G450300           m=                        0.8
               LHS switch                4 x FZ 1600 R 12 KE3      FLHS (Hz) =              4500


     D4        OPWM with LHS, 2100Hz - TJMAX                                            Dynamic as %
                    Losses         Static Dynamic                        Total             of Total

               IGBT                        1,839           1,103          2,942             37%
               FWD                          286             17             303               6%
               IGBT + Diode                2,125           1,120          3,245             35%
               Inverter Total             12,750           6,720         19,470
               LHS                           25            1,142          4,668         (total)
               GRAND TOTAL                                              24,138
               Inverter I/P Power (MW)     2.72                    FC (Hz) =                2,100
               Inverter O/P Power (MW)     2.70                    Iload PK =               1,700
               Efficiency                    99.1%                 Vline RMS (fund) =       1,354
               Power Factor                0.885                   Iline RMS =              1,158
               TJ IGBT pk /ave              125            117     RLOAD (Ω) =              0.675
               TJ FWD pk /ave                71             70     LLOAD (mH) =             1.080
               TJ LHS pk /ave                84             84     RTHJ_A (inv) =           0.009
               Inverter Switch           5SNA 100G450300           RTHJ_A (LHS) =         0.00225
               Inverter FWD              5SNA 100G450300           m=                        0.8
               LHS switch                4 x FZ 1600 R 12 KE3      FLHS (Hz) =              6300

Table IVf – OPWM with LHS, 1500Hz and 2100Hz, IGBT inverter




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IGCT Results

     A1        PWM without LHS, 300Hz - TJ MAX                                          Dynamic as %
                     Losses          Static Dynamic                      Total             of Total

               IGCT (W)                    770            2,534           3,304             77%
               FWD (W)                     561             400             961              42%
               IGCT + Diode (W)            1,331          2,934           4,265             69%
               Inverter Total (W)          7,986          17,604         25,590
               Clamp resistance (W)                                       4,300
               GRAND TOTAL (W)                                          29,890
               Inverter I/P Power (MW)     3.05                    FC (Hz) =                300
               Inverter O/P Power (MW)     3.02                    Iload PK =              2,500
               Efficiency                   99.0%                  Vline RMS (fund) =      1,277
               Power Factor                0.882                   Iline RMS =             1,378
               TJ IGCT pk /ave             125             119     RLOAD (Ω) =              0.54
               TJ FWD pk /ave               69             68      LLOAD (mH) =             0.86
               Inverter Switch           5SHY 55L4500              RTHJ_A (inv) =          0.009
               Inverter FWD              D 1331 SH 45T             RTHJ_A (LHS) =            n/a
               LHS switch                   n/a            n/a     m=                        0.8

     A4        PWM without LHS, 2100Hz - TJ MAX                                         Dynamic as %
                     Losses          Static Dynamic                      Total             of Total

               IGCT (W)                    172            3,175           3,347             95%
               FWD (W)                      85            1,618           1,703             95%
               IGCT + Diode (W)            257            4,793           5,050             95%
               Inverter Total (W)          1,542          28,758         30,300
               Clamp resistance (W)                                       1,490
               GRAND TOTAL (W)                                          31,790
               Inverter I/P Power (MW)     0.82                    FC (Hz) =               2,100
               Inverter O/P Power (MW)     0.79                    Iload PK =               578
               Efficiency                   96.1%                  Vline RMS (fund) =      1,227
               Power Factor                0.919                   Iline RMS =              385
               TJ IGCT pk /ave             125             120     RLOAD (Ω) =              1.84
               TJ FWD pk /ave               76             75      LLOAD (mH) =             2.94
               Inverter Switch           5SHY 55L4500              RTHJ_A (inv) =          0.009
               Inverter FWD              D 1331 SH 45T             RTHJ_A (LHS) =            n/a
               LHS switch                   n/a            n/a     m=                        0.8

Table IVg – PWM without LHS, 300Hz and 2100Hz, IGCT inverter




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     B1        PWM with LHS, 300Hz -TJ MAX                                                  Dynamic as %
                     Losses          Static            Dynamic               Total             of Total

               IGCT                        1,859           1,464              3,323             44%
 as % of A:                                  241%                58%               101%
               FWD                         1,428            58                1,486              4%
 as % of A:                                  255%              15%                 155%
               IGCT + Diode                3,287           1,522              4,809             32%
 as % of A:                                   247%               52%                 113%
               Inverter Total             19,722           9,132             28,854
               LHS                           28             541               2,276         (total)
               GRAND TOTAL                                                  31,130
               Inverter I/P Power (MW)      5.73                       FC (Hz) =                 300
               Inverter O/P Power (MW)     5.699                       Iload PK =               4,900
               Efficiency                    99.5%                     Vline RMS (fund) =       1,232
               Power Factor                0.878                       Iline RMS =              2,684
               TJ IGCT pk /ave              125             120        RLOAD (Ω) =               0.27
               TJ FWD pk /ave                74             72         LLOAD (mH) =              0.42
               TJ LHS pk /ave                67             67         RTHJ_A (inv) =           0.009
               Inverter Switch           5SHY 55L4500                  RTHJ_A (LHS) =         0.00225
               Inverter FWD              D 1331 SH 45T         m=                                0.8
               LHS switch                4 x FZ 2400 R 12 KL4C FLHS (Hz) =                      1200


     B2        PWM with LHS, 900Hz - TJMAX                                                  Dynamic as %
                    Losses           Static            Dynamic               Total             of Total

               IGCT                        1,188           2,165              3,353             65%
               FWD                          783             161                944              17%
               IGCT + Diode                1,971           2,326              4,297             54%
               Inverter Total             11,826           13,956            25,782
               LHS                           63            1,324              5,548
               GRAND TOTAL                                                  31,330
               Inverter I/P Power (MW)      3.80                       FC (Hz) =                 900
               Inverter O/P Power (MW)      3.77                       Iload PK =               3,000
               Efficiency                    99.2%                     Vline RMS (fund) =       1,164
               Power Factor                0.879                       Iline RMS =              1,866
               TJ IGCT pk /ave              125             120        RLOAD (Ω) =               0.36
               TJ FWD pk /ave                68             69         LLOAD (mH) =              0.58
               TJ LHS pk /ave                77             77         RTHJ_A (inv) =           0.009
               Inverter Switch           5SHY 55L4500                  RTHJ_A (LHS) =         0.00225
               Inverter FWD              D 1331 SH 45T         m=                                0.8
               LHS switch                4 x FZ 2400 R 12 KL4C FLHS (Hz) =                      3600
Table IVh – PWM with LHS, 300Hz and 900Hz, IGCT inverter




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     C1        OPWM without LHS, 300Hz - TJ MAX                                         Dynamic as %
                    Losses          Static Dynamic                       Total             of Total

               IGCT (W)                    1,316          1,825           3,141             58%
               FWD (W)                     777              0              777               0%
               IGCT + Diode (W)            2,093          1,825           3,918             47%
               Inverter Total (W)         12,558          10,950         23,508
               Clamp resistance (W)                                       7,144
               GRAND TOTAL (W)                                          30,652
               Inverter I/P Power (MW)     4.62                    FC (Hz) =                300
               Inverter O/P Power (MW)     4.59                    Iload PK =              3,800
               Efficiency                   99.3%                  Vline RMS (fund) =      1,307
               Power Factor                0.879                   Iline RMS =             2,040
               TJ IGCT pk /ave             125             117     RLOAD (Ω) =              0.37
               TJ FWD pk /ave               68             67      LLOAD (mH) =             0.59
               Inverter Switch           5SHY 55L4500              RTHJ_A (inv) =          0.009
               Inverter FWD              D 1331 SH 45T             RTHJ_A (LHS) =            n/a
               LHS switch                   n/a            n/a     m=                        0.8


     C4        OPWM without LHS, 2100Hz - TJ MAX                                        Dynamic as %
                    Losses          Static Dynamic                       Total             of Total

               IGCT (W)                    396            3,015           3,411             88%
               FWD (W)                     149            1,263           1,412             89%
               IGCT + Diode (W)            545            4,278           4,823             89%
               Inverter Total (W)          3,270          25,668         28,938
               Clamp resistance (W)                                       2,233
               GRAND TOTAL (W)                                          31,171
               Inverter I/P Power (MW)     1.78                    FC (Hz) =               2,100
               Inverter O/P Power (MW)     1.75                    Iload PK =              1,074
               Efficiency                   98.3%                  Vline RMS (fund) =      1,414
               Power Factor                0.897                   Iline RMS =              729
               TJ IGCT pk /ave             125             121     RLOAD (Ω) =              1.12
               TJ FWD pk /ave               73             72      LLOAD (mH) =             1.79
               Inverter Switch           5SHY 55L4500              RTHJ_A (inv) =          0.009
               Inverter FWD              D 1331 SH 45T             RTHJ_A (LHS) =            n/a
               LHS switch                   n/a            n/a     m=                        0.8

Table IVi – OPWM without LHS, 300Hz and 2100Hz, IGCT inverter




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     D1        OPWM with LHS, 300Hz - TJ MAX                                            Dynamic as %
                    Losses          Static Dynamic                       Total             of Total

               IGCT                        2,336           847            3,183             27%
               FWD                         1,595            2             1,597              0%
               IGCT + Diode                3,931           849            4,780             18%
               Inverter Total             23,586           5,094         28,680
               LHS                           19            580            2,396
               GRAND TOTAL                                              31,076
               Inverter I/P Power (MW)      6.60                   FC (Hz) =                300
               Inverter O/P Power (MW)      6.57                   Iload PK =              6,000
               Efficiency                    99.5%                 Vline RMS (fund) =      1,233
               Power Factor                0.877                   Iline RMS =             3,096
               TJ IGCT pk /ave              125            118     RLOAD (Ω) =              0.23
               TJ FWD pk /ave                76             74     LLOAD (mH) =             0.37
               TJ LHS pk /ave                67             67     RTHJ_A (inv) =          0.009
               Inverter Switch           5SHY 55L4500              RTHJ_A (LHS) =         0.00225
               Inverter FWD              D 1331 SH 45T         m=                           0.8
               LHS switch                4 x FZ 2400 R 12 KL4C FLHS (Hz) =                  900


     D2        OPWM with LHS, 900Hz - TJ MAX                                            Dynamic as %
                    Losses          Static Dynamic                       Total             of Total

               IGCT                        1,912           1,456          3,368             43%
               FWD                          865             19             884               2%
               IGCT + Diode                2,777           1,475          4,252             35%
               Inverter Total             16,662           8,850         25,512
               LHS                           33            1,143          4,704
               GRAND TOTAL                                              30,216
               Inverter I/P Power (MW)      5.80                   FC (Hz) =                900
               Inverter O/P Power (MW)      5.77                   Iload PK =              4,000
               Efficiency                    99.5%                 Vline RMS (fund) =      1,328
               Power Factor                0.878                   Iline RMS =             2,530
               TJ IGCT pk /ave              125            120     RLOAD (Ω) =              0.30
               TJ FWD pk /ave                69             68     LLOAD (mH) =             0.48
               TJ LHS pk /ave                75             75     RTHJ_A (inv) =          0.009
               Inverter Switch           5SHY 55L4500              RTHJ_A (LHS) =         0.00225
               Inverter FWD              D 1331 SH 45T         m=                            0.8
               LHS switch                4 x FZ 2400 R 12 KL4C FLHS (Hz) =                  2700

Table IVj – OPWM witht LHS, 300Hz and 900Hz, IGCT inverter




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     D3        OPWM with LHS, 1500Hz -TJ MAX                                             Dynamic as %
                    Losses         Static Dynamic                         Total             of Total

               IGCT                        1,515           1,870           3,385             55%
               FWD                          655             36              691               5%
               IGCT + Diode                2,170           1,906           4,076             47%
               Inverter Total             13,020           11,436         24,456
               LHS                           46            1,713           7,036
               GRAND TOTAL                                               31,492
               Inverter I/P Power (MW)      4.90                    FC (Hz) =               1,500
               Inverter O/P Power (MW)      4.87                    Iload PK =              4,600
               Efficiency                    99.4%                  Vline RMS (fund) =      1,339
               Power Factor                0.879                    Iline RMS =             2,118
               TJ IGCT pk /ave              125             120     RLOAD (Ω) =              0.37
               TJ FWD pk /ave                67             66      LLOAD (mH) =             0.58
               TJ LHS pk /ave                82             82      RTHJ_A (inv) =          0.009
               Inverter Switch           5SHY 55L4500               RTHJ_A (LHS) =         0.00225
               Inverter FWD              D 1331 SH 45T         m=                             0.8
               LHS switch                4 x FZ 2400 R 12 KL4C FLHS (Hz) =                   4500


     D4        OPWM with LHS, 2100Hz - TJMAX                                             Dynamic as %
                    Losses         Static Dynamic                         Total             of Total

               IGCT                        1,256           2,177           3,433             63%
               FWD                          526             45              571               8%
               IGCT + Diode                1,782           2,222           4,004             55%
               Inverter Total             10,692           13,332         24,024
               LHS                           54            2,123           8,708
               GRAND TOTAL                                               32,732
               Inverter I/P Power (MW)      4.28                    FC (Hz) =               2,100
               Inverter O/P Power (MW)      4.25                    Iload PK =              2,680
               Efficiency                    99.2%                  Vline RMS (fund) =      1,349
               Power Factor                0.880                    Iline RMS =             1,833
               TJ IGCT pk /ave              125             121     RLOAD (Ω) =              0.43
               TJ FWD pk /ave                65             65      LLOAD (mH) =             0.68
               TJ LHS pk /ave                88             88      RTHJ_A (inv) =          0.009
               Inverter Switch           5SHY 55L4500               RTHJ_A (LHS) =         0.00225
               Inverter FWD              D 1331 SH 45T         m=                             0.8
               LHS switch                4 x FZ 2400 R 12 KL4C FLHS (Hz) =                   6300

Table IVk – OPWM witht LHS, 1500Hz and 2100Hz, IGCT inverter




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In Table IVl, below, Case B is shown, with the same load and (standard) PWM strategy as used for
Case A1 (Table IVg) with approximately the same output power (3MW). The total inverter losses
for Case B are 13kW (with LHS, no clamp) as opposed to 30kW for Case A1 (clamp, no LHS).
From this, it can be seen that for the same power and frequency (3MW and 300Hz), the LHS circuit
has only 29% of the clamp circuit losses and the total inverter losses are reduced to 44% of the
conventional inverter losses. The total IGCT switching losses with LHS are reduced to 27% of those
of the conventional inverter (*aided by the lower junction temperature of 87°C). This effect is
greater still when OPWM is used (case not illustrated).
*[The dominant dynamic losses in the IGCT are the turn-off losses. By measurement these would
be reduced to 30% and by calculation, they should be reduced to 40%. The total switching losses in
the IGCT include turn-on losses (which are minor) and these are attenuated to 10% by calculation.
The overall loss should therefore be reduced to less than 40% at constant junction temperature but
the example below is for constant load (same as Case A1) therefore the calculated switching losses
at the reduced junction temperature of the IGCT are << 40% (namely 27%).]

      B        PWM with LHS, 300Hz - same load as A1                                    Dynamic as %
                     Losses           Static Dynamic                     Total             of Total
               IGCT                         737            672            1,409             48%
               FWD                          525             38             563               7%
               IGCT + Diode                1,262           710            1,972             36%
               Inverter Total              7,572           4,260         11,832
               LHS                           12            295            1,228         (total)
               GRAND TOTAL                                              13,060
               Inverter I/P Power (MW)           2.94              FC (Hz) =                 300
               Inverter O/P Power (MW)        2.927                Iload PK =               2,400
               Efficiency                    99.6%                 Vline RMS (fund) =       1,254
               Power Factor                0.882                   Iline RMS =              1,341
               TJ IGCT pk /ave               87             85     RLOAD (Ω) =               0.54
               TJ FWD pk /ave                66             65     LLOAD (mH) =              0.86
               TJ LHS pk /ave                65             64     RTHJ_A (inv) =           0.009
               Inverter Switch           5SHY 55L4500              RTHJ_A (LHS) =         0.00225
               Inverter FWD              D 1331 SH 45T         m=                            0.8
               LHS switch                4 x FZ 2400 R 12 KL4C FLHS (Hz) =                  1200
Table IVl – PWM with LHS, 300Hz, IGCT inverter


Finally, the losses for various inverter case-studies are compared in Figs IVd and IVe




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                                                         Inverter Losses for IGBT Tj = 125°C

                                      LHS (W)                     Inverter Static (W)                 Inverter Dynamic (W)

              30,000


              25,000


              20,000
 Losses (W)




              15,000


              10,000


                    5,000


                       0
                                 A1 - PWM,    A4-PWM,     B1- PWM/LHS, D1 - OPWM/LHS, D2 - OPWM/LHS, D3 - OPWM/LHS, D4 - OPWM/LHS,
                               300Hz, 2.3MW 2100Hz, 0.7MW 300Hz, 3MW    300Hz, 3.2MW   900Hz, 3MW 1500Hz, 2.9MW 2100Hz, 2.7MW




Fig. IVd – Losses in IGBT inverters




                                                         Inverter Losses for IGCT Tj = 125°C

                                    LHS or Clamp (W)                  Inverter Static (W)              Inverter Dynamic (W)

                        35,000

                        30,000

                        25,000
       Losses (W)




                        20,000

                        15,000

                        10,000

                            5,000

                               0
                                     A1 - PWM,      A4-PWM,       B1- PWM/LHS, D1 - OPWM/LHS, D2 - OPWM/LHS, D3 - OPWM/LHS, D4 - OPWM/LHS,
                                    300Hz, 3MW    2100Hz, 0.8MW   300Hz, 5.7MW 300Hz, 6.6MW 900Hz, 5.8MW 1500Hz, 4.9MW 2100Hz, 4.3MW


Fig. IVe – Losses in IGCT inverters




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                            Appendix V – Commutation Analysis
             LM
                                                                                         IDC-link
                            IM
                                                ICT
             I9t
                                9t             1t
                                        T
    + IS
                                                                ILHS
      VS


                                                                                         IDC-link
Fig. Va – Equivalent circuit at LHS turn-on.

Fig. Va defines the current flows when the LHS switch conducts.

In Fig. 7 (H-bridge), the LHS switch is gated on, defining the start of the notch. ILHS rises at a rate
given by Eqn 3. In the simulation of Fig. 10, LM was set to 100 µH. and VS to 2000V. Thus, ILHS
ramps up at a rate of 0.81 2000V/100 µH = 16.2A/µs reaching 121.5A after 7.5 µs at which point,
inverter commutation occurs.
It should be noted that the current increase in LM during the first half of the notch is given by
0.9 VS/LM 7.5µs = 135A (=121.5/0.9). This is equal to IM-IDC-link at (5ms-δt) i.e. from Fig. 10, 618 –
483 = 135A. At the instant of commutation, ILHS (= current in the 1t winding) jumps to 990A. The
load current at the instant of commutation (Fig. 10) is -483A, the same (absolute) value as the DC-
link current (+483A), which instantaneously becomes negative immediately after commutation (-
483A at 5ms+δt). The source current prior to the instant of commutation (5ms-δt) is 605A (Fig. Vc)
dropping to 508A at 5ms+δt and the current in the magnetizing inductance is 618A. The current in
the 45t winding is 0 during the notch time and that in the 9t winding is -110A (Fig. Vd).

For ampere-turn balance in transformer T, the following equation applies:

          45 I45t + 9 I9t + 1 I1t = 0 ………………………………………………………… (6)
Using the simulated results for the instantaneous currents after the instant of commutation (5ms+δt)
we see that 45 0 + 9 (-110) + 1 990 = 0 (QED).
The current ICT, flowing into the tap of the transformer, divides according to the winding ratios, in
keeping with Eqn 6. The source current is found to be 508A (Fig. Vc) which corresponds to IM = 508
+ 110 = 618A. The DC-link current is seen to be -483A which makes the current ICT = 618+483 =
1100A (= I1t +I9t = 990 + 110 = 1100A). ICT-δt was 135A at 5ms-δt. At 5ms+δt, IDC-link reverses so
that ICT+δt = 2 483 + 135 = 1100A.
These currents are shown numerically in Fig. Vb.




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       LM = 100µH
                                                                  IDC-link= -483A
                          IM= 618A
                                              ICT = 1100A
           I9t= 110A
                               9t            1t

          IS= 508A                     T
   +
                                                                          ILHS= I1t = 990A
      VS = 2000V



Fig. Vb – instantaneous currents simulated at commutation point 5ms+δt




Fig. Vc – Source current before and after notch and at            Fig. Vd – Currents in the 9t and 45t windings and voltage
commutation                                                       on the 9t winding




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                          Appendix VI – Choice of Semiconductors
The principle of LHS can be applied to any inverter topology (including current source) using any
kind of semiconductor. The LHS switch itself generates insignificant conduction losses due to its
very low duty cycle. Depending on the PWM strategy, the bulk of the dynamic losses are due to
turn-off since the LHS switch generally turns on into the unexcited magnetizing inductance. For
OPWM, only 12 % of the LHS switching loss is due to turn-on.

The LHS Switch
It is important to select a device for the LHS function which generates low turn-off losses. This is
not the case of standard HV semiconductors today, which are usually designed for low on-state
losses (and correspondingly high turn-off losses). The device should ideally have low tail current as
this part of the turn-off loss (see Appendix III) is not amenable to the loss reduction techniques of
LHS shown in Appendix II. A suitable device for the application might be the ABB IGDT (dual-
gate IGCT) but this device is not currently planned.
The solution adopted for the presented thermal calculations of Appendix IV is to use four series-
connected 1200V IGBT modules operating on the 2800V DC-link (140 x 130mm for 3MW/E2-
IGBT inverters and 140 x 190 mm for 6MW/4”-IGCT inverters). No attempt was made to minimize
the LHS modules used as a function of the resultant losses such that the LHS switches operated
below 90°C. To avoid the series connection of LV IGBTs, it would be possible to use 4.5 kV
IGBTs specially designed for low turn-off (high VCE SAT). Since these are not currently available
however, it would not have been possible to calculate a realistic thermal budget.
Using a tail-free device (e.g. the IGDT) or a low-tail device (e.g. a 1200V IGBT) nevertheless
leaves the Phase A and Phase B losses of Appendix III, unchanged. These are small in the case of
1200V IGBTs but would need reduction by life-time control in the case of the IGDT. Silicon
Carbide devices might be applicable in a more distant future. The turn-off losses of the LHS switch,
are assumed to be those of the datasheets. However, in view of the short conduction time of the
LHS switch, it will not be fully flooded with carriers at turn-off. This would mean lower losses than
specified (and higher VCE SAT – which is perfectly acceptable), especially for a high voltage device.
The LHS switch must be reverse-blocking in order to fulfill the fault-protection function of LHS. In
the case of an IGBT, this means that a series diode must be used. In the case of an IGCT, this could
be a symmetric device provided it had suitably low turn-off losses. A highly doped, symmetric
IGDT would be the ideal device for an LHS switch.

The Inverter Devices
The thermal results of Appendix IV (Cases A1 and B1, Tables IVc and IVd) show a 30% increase
in inverter power for IGBTs at 300Hz as opposed to a 90% increase in inverter power for IGCTs
(Cases A1 and B1, Tables IVg and IVh) by the implementation of LHS technology for the same
(standard) PWM pattern at 300Hz. The proportion of dynamic to conduction losses for IGCTs
under these conditions is 3.3 whereas for IGBTs, it is 1.03. It is these differences in the proportions
of dynamic and switching losses which makes the IGCT benefit more from LHS technology than
does the IGBT.
These considerations show that the ideal devices for an inverter using LHS would be
chosen/designed for low on-state and high switching loss under standard datasheet conditions. This
also applies to the free-wheel diodes during braking.
The greatly increased inverter powers and carrier frequencies as presented in Appendix IV, imply
higher currents in the semiconductors and in their gate units. These may present the next challenges


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for the commercial exploitation of LHS but since its use will doubtless start at medium voltage,
these problems are not insurmountable. With sufficient bond-wires, IGBT module-designs are
already capable of handling up to 3600A. IGCT gate units can today commutate at 13kA/µs which
leaves room for turn-off currents of >>6kA (Appendix IV, Case D1, Table IVj) since the fault
currents are slow-rising (60A/µs) instead of fast-rising, e.g. 1000A/µs as practiced in today’s IGCT
inverters.

The LHS Diode
In the description of LHS expanded in this paper, the simplest and most efficient variant using a
secondary winding connected via a diode to the energy source was considered.
The winding was chosen to have 45 turns which means that the voltage appearing across it is
0.8 x 2800V x 45/9 = 12.6kV. The average current in this diode is less than 200A for Case D1,
Table IVj, (6.6MW).
With most PWM approaches and regenerative drives, this diode will undergo some hard
commutations which will limit the frequency range of the system (pending the availability of SiC
diodes). For this reason, the variants of Appendix II, Figs II a,b,c,d and f would be preferable for
high voltage, high power inverters.




                          Appendix VII – PLECS Simulation Circuits




Fig. VIIa – Circuit of IGCT inverter




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Fig. VIIb – Source and LHS Circuit at inverter i/p and load at o/p. Load parameters as used for Case D1 Table IVj
Low-loss Hard Switching



                    Appendix VIII – Construction of Autotransformer
The actual construction of the autotransformer depends on the application and preferred cooling
strategy. The following describes the principal of construction of the air-cored, co-axial transformer
of Fig. VIIIa and shows that the basic design is inherently of low cost and of very low leakage
inductance between the 3 windings.


                             T
                    9t                    1t

                            45t
Fig. VIIIa – Equivalent circuit of co-axial transformer used for the circuits of Appendix II

The “primary” of the transformer is taken to be the 10:1 autotransformer which is central to the
LHS patent i.e. the primary consists of 10 turns with a tap at 1 turn. The 9-turn section will
therefore have 81% of the magnetizing inductance of the full 10 turns of the primary (9-turn
winding has inductance LM = 50µH in Fig. VIIb, Appendix VII used in the PLECS thermal
simulations).
Fig. VIIIb shows a straight section of copper tubing laid out prior to coiling. Its length is slightly
greater than that required for the 9 turns. It is covered by a section of insulation such as heat-shrunk
plastic which has a typical voltage rating of 30kV. The plastic is then covered by 9 equal lengths of
flexible copper braiding fitted with connection-lugs.
     copper tube – 9-turn primary winding

                                                                    insulation

                      1st braided   section with terminal lugs                              9th braided section with terminal lugs




                     these 9 sections will be paralleled after coiling and seriesed with 9-turn winding to form tapped primary

        5 insulated copper wires will be seriesed after coiling to form 45-turn secondary


Fig. VIIIb – Prepared co-axial transformer prior to winding

Where a secondary is required such as for the circuits of Figs IIc,d,e,f of Appendix II, insulated
wires are inserted into the tube: 5 wires are required for a 45-turn winding.
This assembly is then wound into a 9-turn solenoid such that the connection lugs of the 9 sections
are aligned and can all be connected in parallel. Once parallel-connected, these 9 turns electrically
constitute the 1-turn winding which can then be connected in series with the original 9-turn winding
thus creating the 10-turn, tapped primary with extremely good coupling between the 1 and 9 turn
windings.
The 5 inner wires are then series connected and – viewed from the 9 paralleled sections (1-turn
winding) – will appear as a 45-turn winding.


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The above results in a low-cost, very tightly coupled 10:1 auto-transformer with a 45-turn
secondary. If required, the solenoid can then be rounded into a toroid. The final assembly can be
either air or liquid cooled.
Such transformers have been built and used by 1MT LLC for many years in various applications
with ratings of up to 200kW and for frequencies of up to 200kHz.




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Description: An invention (US Patent N� 7,417,409 B2 and others pending) is presented, which reduces inverter switching losses by 90% allowing substantial increases in inverter power and/or frequency. Despite added components, overall reliability of the semiconductors is increased because of considerable reductions in dynamic voltage stress (higher safe operating area margins).