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578 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 1 I , NO. 4, JULY 1996 Nonlinear-Carrier Control for High-Power-Factor Boost Rectifiers Dragan MaksimoviC, Member, IEEE, Yungtaek Jang, Member, IEEE, and Robert W. Erickson, Member, IEEE Abstract- Novel nonlinear-carrier (NLC) controllers are pro- posed for high-power-factor boost rectifiers. In the NLC con- trollers, the switch duty ratio is determined by comparing a signal derived from the main switch current with a periodic, nonlinear carrier waveform. As a result, the average input cur- rent follows the input line voltage. The technique is suitable for boost converters operating in the continuous conduction mode. ~~ 4 U Input voltage sensing, dhe error amplifier in the current-shaping loop, and the mukiplieddivider circuitry in the voltage feedback loop are eliminated. The current-shaping is based on switch (as ......... ,____ -I opposed to inductor) current sensing. The NLC controllers offer comparable or improved performance over existing schemes, and are well suited for simple integrated-circuitimplementation. Experimental verification on a 240 W rectifier is described. I. INTRODUCTION ; AVg S INGLE-PHASE high-power-factor rectification is most frequently accomplished using a boost converter con- trolled so that the input current follows the input full-wave ? Vf rectified ac line voltage. The input current shaping results . . in low line current harmonic distortion and a power factor AVERAGE CURRENT-MODE CONTROLLER close to unity at the interface between the ac line and the rectifier. Various techniques are available for active current Fig. 1. Boost high-power-factor rectifier with a block diagram of the average current-mode controller. shaping, most of which are now supported by dedicated integrated circuits. For example, using the average current- sensing at the expense of complicating the controller circuitry mode control [l], 121, very low current harmonic distortion in further [2].Increased complexity and cost associated with a wide range of input line voltages and output load currents active current shaping techniques may limit these approaches can be readily obtained. Fig. 1 shows the boost rectifier to higher-power, high-end systems. with a simplified block diagram of the average current-mode The simplest technique for power factor correction is to controller. Reference signal Rsireffor the current-shaping operate the converter in the discontinuous conduction mode at feedback loop is proportional to the full-wave rectified line constant frequency and constant duty ratio [ 3 ] ,[4]. Because of voltage u g . The inductor current is sensed and compared to increased current stresses, higher noise caused by the pulsating the reference. The error signal is amplified by the current- input current, and higher harmonic distortion of the line loop error amplifier Ai(%?). amplified error signal is the The current, this approach finds applications mainly in low-power, control input ii,, for the pulse-width modulator, adjusting the low-cost systems. power switch duty ratio so as to minimize the error between The purpose of this paper is to present new nonlinear- the reference and the sensed line current. The output voltage carrier (NLC) controllers that simultaneously offer perfor- is controlled by varying the scale factor between the rectified mance results comparable to high-end schemes, and simplicity line voltage vg and the current reference Rs&. This requires comparable to the discontinuous-mode operation [ 5 ] . The a multiplier circuit in the voltage feedback loop as shown NLC control schemes are derived in Section 11. Design- in Fig. 1. The average current-mode control has relatively oriented harmonic distortion analysis and modeling aspects are complex implementation and requires sensing of input and discussed in Sections 111 and IV. Section V presents results of output voltages, and the inductor current. The inductor-current experimental verification on a 240 W NLC controlled boost sensing can be replaced with the more favorable switch current rectifier. Manuscript received December 23, 1994; revised December 27, 1995. D. Maksimovit, and R. W. Erickson are with the Department of Electrical 11. DERIVATION THE OF and Computer Engineering, University of Colorado, Boulder, CO 80309-0425 CONTROL NONLINEAR-CARRIER SCHEMES USA. Y. Jang is with Advanced Energy Industries Inc., Fort Collins, CO USA. The usual control objectives in the boost rectifier of Fig. 1 Publisher Item Identifier S 0885-8993(96)03550-8. are to keep the low-frequency portion of the input current 0885-8993/96$05.00 0 1996 IEEE MAKSIMOVIC et al.: NONLINEAR-CARRIER CONTROL FOR HIGH-POWER-FACTOR BOOST RECTIFIERS 519 proportional to the input full-wave rectified ac line voltage A. Charge Nonlinear-Carrier Controller If the boost converter operates in the CCM, the ideal quasisteady-state conversion characteristic is given by n e vg = V0(l- d) (6) and to keep the output dc voltage constant at a specified reference level, Vo= Vref. is the emulated resistance of the Re so that vg can be eliminated from (4) to obtain rectifier. The bar above a variable indicates that the variable is averaged over a switching period T, . Also, to keep the notation simple, we assume that each switching cycle starts at t = 0. For the boost converter we have The next key step is to realize that the switch duty ratio d that satisfies (7) in each switching cycle can be obtained by comparing the signal Rsis proportional to the integral of the switch current with a parabolic carrier waveform vc(t), where i s and i d are the power switch Q and the output diode D periodic with period T, currents, respectively. Also, the equality of input and output power vc(t) =';,--(It Ts - k), 0I t 5 T, Wgil M Void (3) v,(t + T,) = .c(t). (8) The nonlinear carrier waveform vc(t) is obtained simply is valid assuming negligible power losses, and quasisteady- state operation for slowly-varying w g ( t ) .Combining (1)-(3) by replacing d with t/Ts in (7). The boost rectifier with the we obtain charge nonlinear-carrier (charge NLC) control based on (7) is shown in Fig. 2, together with typical waveforms during one R Ts switching period. The emulated resistance is given by R,is = -2 is(.) d r = - is(.) dr T T S T (9) (4) Therefore, the slowly-varying control input vm can be used in the voltage feedback loop in the usual manner, as shown where R, is the equivalent current-sensing resistance, and d in Fig. 2. is the switch duty ratio in the considered switching cycle. The charge NLC controller uses switch current sensing, If the switch duty ratio d satisfies (4) in each switching requires no amplifier in the current-shaping loop, no sensing period, the average input current follows the line voltage. A of the input voltage, and no multiplier/divider in the voltage voltage comparator can be used to solve (4) for d in each feedback loop. switching cycle. At the beginning of a switching cycle, the power transistor is turned on. The transistor is turned off when B. Carrier Waveform Generator the signal proportional to the integral of the switch current i s reaches a reference value v,. A control method based on The key component of the charge NLC controller is the the cycle-by-cycle integration was originally proposed in [6]. generation of the periodic carrier waveform v c ( t ) . A block For PWM converters, it is known in general as the one-cycle diagram of a simple vc(t) generator is shown in Fig. 3, control [7], or as the charge control when the integrated signal together with waveforms illustrating the operation. The control is the switch current [8]. signal v is slowly varying and can be considered constant , From (4), we find that the required reference level is given during a switching period. by First, a linear ramp signal v l ( t ) = 2vm(t/Ts) generated is using one of a number of well-known circuit techniques. The block diagram shows an integrator with reset using a (5) controlled current source charging a capacitor. The capacitor is discharged to zero using a switch controlled by the clock where v is the control input used to adjust the emulated , signal. The output of the integrator with reset (A) is the linear m, resistance, Re = R s V ~ / v and VM is a constant. Note that ramp signal v l ( t ) . the reference vr(t) varies with the rectified line voltage vg(t). The second step is to remove the dc component in q ( t ) The control scheme based on (4) has the advantages of sensing the switch (instead of the inductor) current, and eliminating the error amplifier in the current-shaping loop. Also, the scheme is va(t) = W l ( t ) - v = v , , ; (, ) 2- - 1 . (lo) valid for both the continuous and the discontinuous conduction This can be accomplished by subtracting v from vl(t), , mode of operation. However, synthesis of the required refer- as shown in the block diagram, or simply by inserting a ence signal v,(t) still requires both input and output voltage dc blocking capacitor in series with u l ( t ) . Finally, vc(t) is sensing, and use of a multiplier/divider circuitry. Next, we obtained by integrating v2 ( t ) show how further simplification can be achieved if we assume that the boost converter operates in the continuous conduction mode (CCM). 580 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 11, NO. 4, JULY 1996 j Integrator i i Integrator ; i with reset i with reset ; B I .............I ................ ........................................................................... CLK 1 Vl(t) %4/ ................................................................................ CHARGE NLC CONTROLLER Carrier Vc Vref V2(t) 2................................................................................ l!KYc CLK 1 ................. ................................................ TS ............... . , Fig. 3. Block diagram of a carrier generator for the charge NLC controller, COMPARATOR together with typical waveforms. which yields the required carrier waveform vc(t + Ts) = v c ( t ) (14) Fig, 2. Boost rectifier with the charge NLC controller, together with typical where Vj = VoR,/2Lfs is a constant, and vm is the slowly- switching-frequency waveforms. varying control input used to adjust the emulated resistance Re= R,Vo/v,. In the peak-current NLC controller based on which is the function of the second integrator with reset (B). (13), the switch is turned on at the beginning of a switching Both integrators are reset to zero by the clock signal at the cycle. It is turned off when the signal R,i, proportional to beginning of every switching cycle to ensure the correct zero the instantaneous switch current reaches the carrier v c ( t ) .The initial conditions. In an integrated-circuit implementation, the boost rectifier with the peak-current NLC controller is shown integrator (A) could also serve as a part of the clock generator. in Fig. 4, together with typical waveforms during one switch- ing period. The operation is very similar to the conventional C. Peak-Current Nonlinear-Carrier Controller current-mode programming, except that the periodic nonlinear Another NLC controller can be derived if the peak current camer replaces the usual slowly-varying current reference. sensing is preferred over the cycle-by-cycle integration of One can think of the peak-current NLC control as current- the switch current. Of course, the carrier waveform must be mode programming with a nonlinear compensating ramp. modified. Carrier waveform generator can be constructed using the The derivation of the peak-current NLC control starts with same technique as for the charge NLC and the peak-current the relation between the peak switch current and the NLC offers the same advantages as the charge NLC. It has average input current in the boost converter an additional advantage of inherent instantaneous over-current protection for the power switch. However, the charge NLC has a simpler carrier waveform generator, and offers improved noise immunity because the sensed switch current is integrated. Here, = l/Ts is the switching frequency. Using the fq same approach as in the derivation of the charge NLC, we 111. CURRENT DISTORTION THE IN can eliminate i, and 1i9 DISCONTINUOUS CONDUCTION MODE The basic assumption in the derivation of the NLC con- trollers is that the boost converter operates in the continuous MAKSIMOVIC et al.: NONLINEAR-CARRIER CONTROL FOR HIGH-POWER-FACTOR BOOST RECTIFIERS 581 In the charge NLC, the switch duty ratio d is determined from (7). Using (17), (7) can be solved for d explicitly d2 a, = - = - d ( l v, - d) 2Lfs Re , where R is the dc load resistance R = V o / I Oand K = 2Lf,/R is the load parameter commonly used in DCM analyzes. The converter operates in the DCM if d<l-mg (20) which using (19) gives the following condition for operation in the DCM PEAK-CURRENT NLC .... ................. ............................................CONTROLLER.............................................. . . . The relation Virms/Re V:/R was used to get R,/R = = M,”/2. From (21) we conclude that the converter is always in the CCM if CLK . 1 , . COMPARATOR OUTPUT and always in the DCM if : : - . d . TB K < (1 - M,)-. 2 For any load between these boundary values, the converter goes from the DCM to the CCM and back to the DCM during Fig. 4. Boost rectifier with the peak-current NLC controller, together with a half line cycle. typical switching-frequency waveforms. The next goal is to find an expression for the input current ig(t) when the converter operates in the DCM. Regardless of the operating mode, we have conduction mode (CCM). In the discontinuous conduction - ZS mode (DCM), the relation (6) is not valid, and the resulting ag = a1 = ~ input current does not exactly follow the input voltage. The 1-m, purpose of this section is to determine conditions for operation which together with (18) and (19) yields an expression for the in the CCM in the NLC controlled boost rectifier and to input current when the converter operates in the DCM determine the current distortion caused by operation in the U , Re 1 1 1 DCM. We consider the charge NLC only, but the end results zg,DCM = Re R K 1 - m , 2’ (25) are the same for the peak-current NLC. In the analysis we use the following notation for the normalized input voltage v,(t) and the peak of the input voltage Vg,peak Note that Z,,DCM deviates from the ideal i, = v,/R,. An example of the distorted input current waveform is shown in Fig. 5, where the converter operates in the DCM for mg < 0.75. The waveform is obtained for K = 0.1, M , = 0.9, and the resulting harmonic distortion is THD = 9.4%. Using the expression (25) for the input current in the DCM, and the boundary condition (21), the line current waveform can be obtained for any parameters M,, Re and K . Total In the DCM, the inductor current drops to zero before the harmonic distortion (THD) of the input current as a result of end of a switching cycle. Therefore, the switch current is zero the DCM operation has been found as a function of the load at the beginning of any switching cycle, i s ( 0 ) = 0. AS a parameter K for several M,. The results are shown in Fig. 6. result, we have The results of Fig. 6 can be used to select the converter parameters L andlor f s in order to ensure that the current THD is satisfactory. The worst-case THD is obtained for the maximum line voltage (maximum M g )and the minimum load IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 11, NO. 4, JULY 1996 1 vo Re=Rs - 4 Vm 0 0.1 0.2 0.3 0.4 0.5 Fig. 7. Large-signal model of the NLC controlled boost rectifier. t /T1 NLC controlled boost rectifier is that the emulated resistance Fig. 5. Half cycle of the input line current distorted because of the DCM , Re is directly proportional to the output dc voltage V , even operation, together with the ideal sine-wave. without any external voltage-regulating feedback loop. The model of Fig. 7 can be used for predicting the low-frequency ac ripple at the output, and selecting the energy-storage capacitance C accordingly. From the large-signal model, current i that flows to the 10 parallel combination of the filter capacitor C and the load resistance R is given by i = vgig/v,. The dc conversion characteristic of the open-loop NLC controlled boost rectifier is obtained by averaging i over a line cycle Therefore, the rectifier dc characteristic is given by 0.1 0 0.1 0.2 0.3 0.4 0.5 K The averaging over a line cycle removes 120 Hz compo- Fig. 6. Total harmonic distortion of the input line current as a function of nents and retains only dc and frequency components much the load parameter I< = 2Lfs / R. lower than 120 Hz. For the purpose of designing a voltage- regulating feedback loop, a low-frequency small-signal model current (maximum R, minimum K ) . The current distortion is obtained by linearizing (26). The resulting model is shown in the DCM should not present a problem in most practical in Fig. 8, with the parameter values given by designs. Significant amounts of THD are obtained only if the load is reduced much below the load value at the CCMDCM boundary. Even if we consider M,q = 1 as the worst-case input line voltage, the THD is less than 10% for loads down to K = 0.1. while the converter starts operating in the DCM for K = 0.5. and R MODELS IV. LOW-FREQUENCY r, = - 2. We have shown that the boost rectifier with a NLC controller Note that the open-loop output resistance T , is two times operates as an ideal unity power factor rectifier if the converter lower than in the boost rectifier with conventional power operates in the CCM, and as a near-unity power factor rectifier factor correction. This is because the emulated resistance R, if the converter operates in the DCM. A large-signal model of is directly proportional to V,, as shown in (9) and in the large- the boost rectifier with a NLC controller is shown in Fig. 7. signal model of Fig. 7. The output voltage regulating loop can This model is based on the loss-free resistor concept 191, and is obtained by switching-period averaging, with switching be designed using the model of Fig. 8 and standard linear feedback techniques. harmonics removed, but with 120 Hz and dc components retained. The power absorbed by the emulated resistance Re is transferred to the output through the time-varying power VERIFICATION V. EXPERIMENTAL source ~ ~ 2 The .emulated resistance Re depends on the , ~ A 240 W boost rectifier with the charge NLC controller has control input v,. The modeling approach followed here has been built and tested. The experimental circuit is shown in been described in more detail in [lo]. A unique aspect of the Fig. 9. ~ MAKSIMOVIC et al.: NONLINEAR-CARRIER CONTROL FOR HIGH-POWER-FACTOR BOOST RECTIFIERS 583 Tek Run: l O . O M S / s i H Res L- T--4 Fig. 8. Small-signal model of the NLC controlled boost rectifier. a+ 4+ - .- . .- m Fig. 10. Experimental waveforms in the charge NLC controller. 1) linear ramp " ~ ( t2) ;Parabolic carrier waveform v,(t); 3) Integrated switch current ) v q ( t ) ; 4) Transistor drive signal. general-purpose operational amplifiers, a comparator, and stan- dard logic gates. All controller functions could be easily implemented on a dedicated integrated circuit. Fig. 10 shows typical experimental controller waveforms during several switching cycles. The maximum power output is Po = 240 W, the output voltage is regulated at V, = 385 V, and the switching frequency is f, = 44 kHz. Fig. ll(a) and Fig. 9. Experimental boost rectifier with the charge NLC controller. (b) shows the full-power line-frequency waveforms at a low line input (117 Vrms) and a high line input (238 Vrms). The The output voltage regulator is constructed around the op- waveforms shown are 1) the rectified line voltage u9, 3) the amp OP1. Output of the OP1 is the control voltage -U, at the switch duty ratio d, measured using time-to-voltage converter input of the nonlinear-carrier generator. The nonlinear carrier Tektronix TVC.501, and 4) the input line current. Power factor generator is built around the op-amps OP2 and OP3, following greater than 0.995 has been measured at full load for the the approach described in Section 11-B. Capacitor C4 removes 90-260 Vrms input voltage range. the dc component from the voltage v1 at the output of OP2. The charge NLC controller has also been experimentally The parabolic carrier w c is obtained at the output of OP3, verified with new universal-input boost doubler rectifiers [ 1 11. which is connected to the (-) input of the voltage comparator COMP. The resulting carrier waveform is VI. CONCLUSION t vc(t) = U , T," 2RSRcC3C5 (I - E 6) ' O<tlTs Nonlinear-carrier (NLC) controllers are proposed for high- power-factor boost rectifiers. In the NLC controllers, the (31) switch duty ratio is determined by comparing a signal derived which is identical to (8) except for a scale factor. For from the main switch current with a periodic nonlinear carrier ~ R ~ R ~ = T," C S C ~ (32) waveform. The shape of the carrier waveform is determined so that the resulting input line current is proportional to the input the scale factor is one. line voltage, as required for unity-power-factor rectification. A clock signal CLK periodically sets the flip-flop FF and A simple scheme is proposed to generate the required carrier resets the two integrators. The switch current i, is sensed using waveform. Two NLC controllers are described. In the charge a current transformer 7'1 with 1 : n turns ratio. The scaled NLC, the switch duty ratio is determined by comparing a switch current charges capacitor to obtain the voltage parabolic carrier waveform with a signal proportional to the vq = R,.s, which is connected to the (+) input of the integral of the switch current. In the peak-current NLC, a signal comparator COMP. For component values that satisfy (32), proportional to the switch current is compared to a nonlinear the equivalent current sense resistance R, is given by carrier. Ideal unity power factor rectification is obtained when the boost converter is operated in the continuous conduction mode. It is also shown how the rectifier can be designed so that a The output of the flip-flop controls the power transistor low input current THD can be obtained for a wide range of Q . The charge NLC controller is constructed using several loads although the converter may operate in the discontinuous 584 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 11, NO. 4, JULY 1996 [3] D. Chambers and D. Wang, “Dynamic P.F. correction in capacitor input off-line converters,’’ in Proc. Powercon 6, Miami Beach, FL, May 2 4 , 1979, pp. B3.1-6. [4] S. Freeland, “I. A unified analysis of converters with resonant switches; 11. Input-current shaping for single-phase AC-DC power converters,’’ Ph.D. dissertation, Califomia Institute of Technology, 1988. : [5] D. MaksimoviC, R. Erickson, and Y. Jang, “Nonlinear-carrier controllers for high-power-factor boost rectifiers,” patent pending. [6] F. C. Schwarz, “An improved method of resonant current pulse modu- lation for power converters,” in IEEE PESC, 1975 Rec., pp. 194-204. [7] K. Smedley and S. Cuk, “One-cycle control of switching converters,’’ in IEEE PESC, 1991 Rec., pp. 888-896. [RI W. Tang, F. C. Lee, R. B. Ridley, and I. Cohen, “Charge control: Modeling. analysis and design,” in IEEE PESC, 1992 Rec., pp. 503-51 1. [9] S. Singer, “The application of loss-free resistors in power processing circuits,” in IEEE PESC, 1989 Rec., pp. 843-846. [IO] R. Erickson, M. Madigan, and S. Singer, “Design of a simple high- power-factor rectifier based on the flyback converter,” in Proc. IEEE APEC, 1990, pp. 792-801. [l I ] D. MaksimoviC and R. Erickson, “Universal-input, high-power-factor, boost doubler rectifiers,” in Proc. IEEE APEC, 1995, pp. 459465. Ch3 117mV Ch4 1O.OmV (a) Dragan MaksimoviC (M’89) was born in Belgrade, Yugoslavia, on July 15, 1961. He received the B.S. and M.S. degrees in electrical engineering from the University of Belgrade, Yugoslavia, and the Ph.D. degree from the Califomia Institute of Technology, Pasadena, in 1984, 1986, and 1989, respectively. From 1989 to 1992, he was with the University of Belgrade, Yugoslavia. Since 1992, he has been an Assistant Professor in the Department of Electrical ,- and Computer Engineering at the University of Colorado, Boulder. His current research interests include simulation, control techniques, low-harmonic rectifiers, and power electronics for low-power, portable systems. (b) Yungtaek Jang (S’92-M’95) was born in Seoul, Fig. 11. Experimental waveforms in the 240 W boost rectifier with the Korea He received the B S degree from Yonsei charge NLC controller for (a) 117 Vrms line and (b) 238 Vrms line. 1) University, Seoul. Korea, in 1982, and the M S Rectified line voltage vY; 3) Switch duty ratio d;50’%/di\-: 4) input line and Ph.D degrees from the University of Colorado, current, 2 A/div in (a), 1 Aldiv in (b). Boulder, in 1991 and 1995, respectively, all in electrical engineering conduction mode at light loads. Models are derived to facilitate From 1982 to 1988, he was a Design Engineer at Hyundai Engineering C O , Seoul Since 1995, he power-stage component selection, and the design of the output has been a Research Engineer at Advanced Energy voltage regulating loop. Industries Inc in Fort Collins, CO His research in- In the NLC controllers, the input voltage sensing, the error terests include resonant power conversion, converter modeling, and low harmonic rectification amplifier in the current-shaping loop, and the multiplieddivider circuitry in the voltage feedback loop are eliminated. The current-shaping is based on the switch as opposed to the inductor current sensing. The controllers offer comparable or improved performance over existing power factor correction schemes, and are well-suited for simple integrated-circuit Robert W. Erickson (S’80-M’82) was bom in implementation. Santa Monica, CA, on August 3, 1956. He received the B S , M S , and Ph D degrees from the Califor- REFERENCES ma Institute of Technology in 1978, 1980, and 1983, respectively [I] R. Mammano and R. Neidorff, “Improving input power factor-A new He is presently an Associate Professor in the active controller simplifies the task,” in Proc. Power Conversion, Oct. Department of Electrical and Computer Engineering 1989, pp. 100-109. at the University of Colorado, Boulder. His current 121 J. Bazinet and J. A. O’Connor, “Analysis and design of a zero voltage research directions include resonant power conver- transition power factor correction circuit,” in Proc. I E E E P P E C 1994, sion, converter modeling, high-frequency compo- pp. 591-597. nents, and low haimonic rectification.

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