Pc Data Finder - PowerPoint by wwd73487

VIEWS: 2 PAGES: 7

More Info
									                                    The CSC Track-Finder


          From DT                 MB1                   12 Sector
          Track-Finder            DT TF                 Processors
          (Vienna)                                                    1 Muon Sorter
                                  ME4                        SP
                  OPTICAL
                                    ME2-ME3                                                 (Vienna)
                                          ME1                                               To Global
                                            SR                                              Muon
                                                                            MS
                                                        3 / sector                         Trigger
From CSC              PC                     SP
Port Cards                              24 Sector
                                        Receivers       12 sectors                     4    GMT
         3 / port card                 (+12 for ME4)


                                                                                       4
                                        (UCLA)          (Florida)       (Rice)
                                                                               From DT      8
                                                                               Track-Finder
                                                                                             RPC
   Electronics Review, May 2001                          1            Darin Acosta
                           Sector Receiver Functionality
      1.     Receive 6  segments via 12 optical links from 2 Muon
             Port Cards
              Require 3 Sector Receivers for one 60° sector
      2.     Synchronize the data

                                                              }
      3.     Reformat the data into track segment variables
              LCT bit pattern  , , b, ...                  via LUTs
      4.     Apply corrections for alignment
      5.     Communicate to Sector Processor via custom backplane
             (Channel Link)
      6.     Fan out ME1/3  segments to DT Track-Finder




Electronics Review, May 2001          2        Darin Acosta
                                    Sector Receiver Logic


  Front                                                                                VME
  Panel         JTAG                                  Controller
                interface
                                                      FPGA


Optical
Fiber
                                                                                        To
from          Optical              Deserializer               L             L   Back    Barrel
MPC           Receiver
                                                              U             U   FPGA
                                                  Front       T             T
Optical
Fiber                                             FPGA        S             S
from          Optical              Deserializer
MPC           Receiver                                                          To
                                                                                Backplane
              Repeat for each Muon




    Electronics Review, May 2001                  3          Darin Acosta
                         Sector Processor Functionality

         1.    Accumulate track segments for possibly more than
               one B.X.
         2.    Extrapolate in 3D from one station to another for all
               possible track segment combinations
         3.    Assemble tracks from extrapolation results
         4.    Select best 3 tracks and cancel ghosts
         5.    Assign track parameters: pT, , , quality




Electronics Review, May 2001           4          Darin Acosta
                       Sector Receiver/Processor DAQ

                        Small Form                          Memory    ~45 SRAM chips
                           Factor      Deserializer Front   Look-up   80 MHz speed                      VME
                        Transceivers     Chips      FPGAs    Tables                                   Interface

              From MPC
From          (chamber 4)
                                                                            Sector
trigger                                                                    Processor
                                                                                                      From Clock
primitives    From MPC                                                    FPGA chip
                                                                                                      and Control
              (chamber 3)                                                                                Board


              From MPC
              (chamber 2)
                                                                                                      To Muon
               From MPC                                                                                Sorter
              (chamber 1C)
                                                                                            Pt-
               From MPC                                                                 assignment
              (chamber 1B)                                                                 LUTs
               From MPC                                                                               To/From
              (chamber 1A)                                                                             Barrel

To CSC DAQ                                                                      1 April 2001




          Store all input data                                          Store all output data
          ~600 bits/sector/b.x.                                         ~60 bits/sector/b.x.
    Electronics Review, May 2001                               5                       Darin Acosta
                               CSC TF DAQ Bandwidth
       Send input of Sector Receiver (output of Muon Port Card)
       and output of Sector Processor (input of CSC Muon Sorter)
       to DAQ stream for diagnostics

       Send ~660 bits per L1A per Sector Receiver/Processor

       12 sectors and 100 kHz L1A rate  100 MB/s

       One S-LINK64 handles 200 MB/s

       Note that trigger data is expected to be sparse, so this
       bandwidth could be compressed if needed

       CSC Track-Finder DAQ acts as additional DDU for CSC
       system (plan to use existing DDU design)


Electronics Review, May 2001           6        Darin Acosta
                                 Mirror CSC DAQ Path


DAQ MBs                                                                         CSC DDU
send data                                                                       designed
from                                                                            by Ohio
front-end                              18 optical fibers                        State Univ.



                                                                                  30


Sector
                                    12 optical fibers
Processors
send L1                                                    DDU          SLINK     +1
data
  Electronics Review, May 2001                  7            Darin Acosta

								
To top