November 8 - 12, 2008 Lake Como, Italy by svq18001

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									                                                                                CALL FOR PARTICIPATION
                                                                                             MICRO - 41
                                                        November 8 - 12, 2008 Lake Como, Italy
                                                   The 41st Annual IEEE/ACM International Symposium on
                                                                      Microarchitecture
General Co-Chairs
  Antonio Gonzalez, Intel and UPC
  Cristina Silvano, Politecnico di Milano
Program Co-Chairs
  Paolo Faraboschi, HP Labs
  Steve Keckler, UT Austin
Workshops and Tutorials Co-Chairs
  Koen De Bosschere, Universiteit Gent
  Donald Yeung, University of Maryland
Finance Chair
  William Fornaciari, Politecnico di Milano
Publicity Chair
  Grigorios Magklis, Intel
Web Chair
  Carlos Molina, Univ. Rovira i Virgili
Local Arrangements Co-Chairs
  Gianluca Palermo, Politecnico di Milano                 Co-sponsored by IEEE-CS TC-uARCH               and ACM SIGMICRO
  Giovanni Agosta, Politecnico di Milano
Publications Co-Chairs                               Important Dates: Paper acceptance: August 5, Early registration closes: October 6
  Matteo Monchiero, HP Labs
  Carlo Galuzzi, TU Delft
                                               The 41st International Symposium on Microarchitecture is the premier forum for
Paper Submissions Chair
  Mark Gebhart, UT Austin                      presenting, discussing, and debating innovative microarchitecture ideas and
Registration Chair                             techniques for advanced computing and communication systems. This symposium
  Jordi Tubella, UPC
Student Advocate
                                               brings together researchers in fields related to microarchitecture, compilers, chips,
  Pedro Marcuello, Intel                       and systems for technical exchange on traditional microarchitecture topics and
Program Committee
  Ali-Reza Adl-Tabatabai, Intel
                                               emerging research areas. The MICRO community has enjoyed a close interaction
  David Albonesi, Cornell                      between academic researchers and industrial designers and we aim to continue this
  Saman Amarasinghe, MIT
  Todd Austin, Univ. of Michigan
                                               tradition at MICRO-41.
  David Bernstein, IBM
  Rajeev Balasubramonian, Univ. of Utah        Conference program summary:
  David Christie, AMD
  Tom Conte, Georgia Tech
                                                Nov 8 – 9: Workshops and Tutorial sessions
  Al Davis, HP Labs and Univ. of Utah           Nov 10 – 12: Technical paper presentations (technical program will be available
  Jim Dehnert, Google
  Giuseppe Desoli, STMicroelectronics             on September 1, 2008)
  Evelyn Duesterwald, IBM
  Joel Emer, Intel and MIT
                                                Keynotes by David E. Shaw, Chief Scientist, D.E. Shaw Research and Charles
  Babak Falsafi, EPFL                             R. Moore, Senior Fellow, AMD
  Glenn Farrall, Infineon
  Krisztian Flautner, ARM                       Activities: Lake boat tour and gala dinner at the Società del Casino in Como
  Kim Hazelwood, Univ. of Virginia
  Bruce Jacob, Univ. of Maryland               The conference is hosted in the Spazio Como conference center of the Grand Hotel
  Richard Lethin, Reservoir Labs and Yale
  Geoff Lowney, Intel
                                               di Como (http://www.grandhoteldicomo.com/).
  Bill Mangione-Smith, Intellectual Ventures
  Srilatha Manne, AMD
  Diana Marculescu, CMU
  Onur Mutlu, Microsoft
  Sanjay Patel, UIUC
  Yale Patt, UT Austin
  Li-Shiuan Peh, Princeton
  Ravi Rajwar, Intel
  Alex Ramirez, BSC and UPC
  Karu Sankaralingam, Univ. of Wisconsin
  Yannakis Sazeides, Univ. of Cyprus
  Tim Sherwood, UC Santa Barbara
  Guri Sohi, Univ. of Wisconsin
  Olivier Temam, INRIA
  Sudhakar Yalamanchili, Georgia Tech                            For more information please consult the conference website:
  Cliff Young, D.E. Shaw Research
                                                                           http://www.microarch.org/micro41
Steering Committee
 Richard Belgard, Consultant (Chair)            Bill Mangione-Smith, Intellectual Ventures
 Bob Colwell, Consultant                        Yale Patt, UT Austin
 Tom Conte, Georgia Tech                        Eric Rotenberg, NC State
 Kemal Ebcioglu, Global Supercomputing          John Shen, Nokia
 Wen-mei Hwu, UIUC                              Guri Sohi, University of Wisconsin
 Scott Mahlke, University of Michigan           Mateo Valero, UPC
                                                                          CALL FOR PARTICIPATION
                                                                                MICRO - 41
                                                              November 8 - 12, 2008 Lake Como, Italy
                                                           The 41st Annual IEEE/ACM International Symposium on
                                                                              Microarchitecture
General Co-Chairs
  Antonio Gonzalez, Intel and UPC
  Cristina Silvano, Politecnico di Milano                  Co-sponsored by IEEE-CS TC-uARCH                 and ACM SIGMICRO
Program Co-Chairs
  Paolo Faraboschi, HP Labs                          Important Dates: Paper acceptance: August 5, Early registration closes: October 6
  Steve Keckler, UT Austin                            st
Workshops and Tutorials Co-Chairs              The 41 International Symposium on Microarchitecture is the premier forum for presenting,
  Koen De Bosschere, Universiteit Gent         discussing, and debating innovative microarchitecture ideas and techniques for advanced
  Donald Yeung, University of Maryland
                                               computing and communication systems. This symposium brings together researchers in fields
Finance Chair
  William Fornaciari, Politecnico di Milano    related to microarchitecture, compilers, chips, and systems for technical exchange on traditional
Publicity Chair                                microarchitecture topics and emerging research areas.
  Grigorios Magklis, Intel
Web Chair                                      Conference program summary:
  Carlos Molina, Univ. Rovira i Virgili         Nov 10 – 12: Technical paper presentations (program will be available on September 1, 2008)
Local Arrangements Co-Chairs
  Gianluca Palermo, Politecnico di Milano       Keynotes: David E. Shaw, Chief Scientist, D.E. Shaw Research and Charles R. Moore, Senior
  Giovanni Agosta, Politecnico di Milano         Fellow, AMD
Publications Co-Chairs                          Activities: Lake boat tour and gala dinner at the Società del Casino in Como
  Matteo Monchiero, HP Labs
  Carlo Galuzzi, TU Delft
Paper Submissions Chair                        Workshops (Nov 8 – 9):
  Mark Gebhart, UT Austin                       dasCMP: Workshop on Design, Architecture and Simulation of Chip Multi-Processors
Registration Chair                                Norman Jouppi, Rakesh Kumar, and Dean Tullsen
  Jordi Tubella, UPC
Student Advocate
                                                Streaming Systems: From Web and Enterprise to Multicore
  Pedro Marcuello, Intel                          Rodric Rabbah, Xiaowei Shen, and Saman Amarasinghe
Program Committee                               New Frontiers in High-performance and Hardware-aware Computing (HipHac)
  Ali-Reza Adl-Tabatabai, Intel
  David Albonesi, Cornell                         Rainer Buchty and Jan-Philipp Weiß
  Saman Amarasinghe, MIT                        3rd Workshop on Dependable Architecture (WDA-3)
  Todd Austin, Univ. of Michigan
  David Bernstein, IBM                            Osman S. Unsal, Oguz Ergin, and Yiannakis Sazeides
  Rajeev Balasubramonian, Univ. of Utah         Network on Chip Architectures (NoCArc)
  David Christie, AMD
  Tom Conte, Georgia Tech
                                                  Maurizio Palesi and Shashi Kumar
  Al Davis, HP Labs and Univ. of Utah
  Jim Dehnert, Google                          Tutorials (Nov 8 – 9):
  Giuseppe Desoli, STMicroelectronics
  Evelyn Duesterwald, IBM                       Programming Throughput-Oriented Architectures with Ct
  Joel Emer, Intel and MIT                         Anwar Ghuloum, Gansha Wu and Xin Zhou
  Babak Falsafi, EPFL
  Glenn Farrall, Infineon
                                                On-Chip Communication Architectures: Busses, Networks-on-Chip and Beyond
  Krisztian Flautner, ARM                          Nikil Dutt, Luca Benini, and Sudeep Pasricha
  Kim Hazelwood, Univ. of Virginia
  Bruce Jacob, Univ. of Maryland
                                                Coherence and Memory Consistency Models
  Richard Lethin, Reservoir Labs and Yale          Michel Dubois
  Geoff Lowney, Intel
  Bill Mangione-Smith, Intellectual Ventures
                                                VLIW Compilation Environment and Multi-Processor Architecture of Diopsis, the RISC+
  Srilatha Manne, AMD                            floating-Point VLIW DSP System-On-Chip Designed for High Quality Acoustic
  Diana Marculescu, CMU                          Applications
  Onur Mutlu, Microsoft
  Sanjay Patel, UIUC                               Gert Goossens, Pier Stanislao Paolucci and Piergiovanni Bazzana
  Yale Patt, UT Austin                          COTSon: Infrastructure for System-Level Simulation
  Li-Shiuan Peh, Princeton
  Ravi Rajwar, Intel                               Theresa Frawley, Vincent Lim, Ayose Falcon, Paolo Faraboschi and Daniel Ortega
  Alex Ramirez, BSC and UPC                     Design Variability: Trends, Models, and Design Solutions
  Karu Sankaralingam, Univ. of Wisconsin
  Yannakis Sazeides, Univ. of Cyprus               Keith Bowman, David Brooks, Gu-Yeon Wei and Chris Wilkerson
  Tim Sherwood, UC Santa Barbara                Performance Tools for Understanding the Behavior of Running Programs on the Cell B.E
  Guri Sohi, Univ. of Wisconsin
  Olivier Temam, INRIA
                                                   Bilha Mendelson, Gadi Haber and Thomas Chen
  Sudhakar Yalamanchili, Georgia Tech           Modeling, Verification and Mapping of Applications on WSN Architectures
  Cliff Young, D.E. Shaw Research
                                                   Franco Fummi, Andrea Acquaviva, Davide Quaglia and Giovanni Perbellini
Steering Committee
  Richard Belgard, Consultant (Chair)           Microprocessor Memory Array Circuits for Architects
  Bob Colwell, Consultant                          Shih-Lien Lu, Dinesh Somasekhar and Steven Hsu
  Tom Conte, Georgia Tech
  Kemal Ebcioglu, Global Supercomputing         Changing Factors in Memory System Design
  Wen-mei Hwu, UIUC                                Kenneth Wright and Hillery Hunter
  Scott Mahlke, University of Michigan
  Bill Mangione-Smith, Intellectual Ventures    CAD Solutions for System-Level Power Optimization
  Yale Patt, UT Austin                             Enrico Macii and Massimo Poncino
  Eric Rotenberg, NC State
  John Shen, Nokia                                                For more information please consult the conference website:
  Guri Sohi, University of Wisconsin
  Mateo Valero, UPC                                               http://www.microarch.org/micro41

								
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