Analysis of Floating Body Effects in Thin Film SO1 MOSFETs using the GIDL Currlent Technique Mohan V. Dunga, Aatish Kumar, and V. Ramgopal Rao Department of Electrical Engineering, IIT Bombay IIT Bombay, Powai, Mumbai - 400076, India. Phone: (91) 22-5767456 Fax: (91) 22-5723707 Email: email@example.com Abstract: In this paper, we present an analysis of floating body effects in lateral asymmetric channel (LAC) and conventional homogeneously doped channel (uniform) SO1 MOSFETs using a novel Gate-Induced-Drain-Leakage >o (GIDL) current technique. The parasitic bipolar current gain p has been experimentally measured for LAC and uniform SO1 MOSFETs using the GIDL current technique. The lower parasitic bipolar current gain observed in LAC SO1 MOSFETs is explained with the help of 2-D device simulations. 1. Introduction SUBSTRATE I An SO1 MOSFET with thin Si film offers several advantages over bulk devices, which include reduced short-channel Fip;.:Depletion regions in the gate-drain overlap effects, low voltage operation and increased current drive. repion in SOT nnder GTnl, hias One of the challenges of SO1 CMOS technology is understanding and controlling the floating body effects. These effects are the counteraction of the perfect isolation properties in a SO1 MOSFET and are caused by the majority carriers that are generated by the high drain field and get accumulated in the body. If the minority carrier lifetime is high in the silicon film, the parasitic bipolar junction & transistor [l] present in the NPN structure of the MOSFET amplifies the hole current generated by impact-ionization Tunncling near the drain. This further increases the net drain current clcctcon and is known to cause second kink in the drain current. The lateral parasitic bipolar transistor gain p has a major impact Hole on the breakdown voltage of SO1 devices and is also responsible for hysteresis and latch-up in severe cases. Fig.: Band diagram near the gate-drain overlap region under GIDL bias LAC SO1 devices tend to offset these harmful effects by Re:ferring to Fig. 1, this leakage current for negative bias is reducing the drain field and thus impact ionization. In due to tunneling current in the deep depletion region. In this addition to that, LAC devices also prevent short channel gate-to-drain overlap region, the tunneling of valence-band effects like roll-off, DIBL and reliability issues like hot electrons into the conduction band generates electron-hole carrier effects. LAC SO1 MOSFETs therefore promise many pairs. This occurs because of the high vertical electric field advantages over homogeneously doped SO1 MOSFETs - in .the gate-drain overlap region. Fig. 2 shows band diagram . It is thus necessary to examine how the floating body near the gate-to-drain overlap region at high v, and device effects differ in LAC SO1 from uniform SO1 MOSFETs. In in the off state or in accumulation. order to measure the lateral bipolar transistor current gain p of LAC SO1 MOSFETs, Gate Induced Drain Leakage The GIDL current due to Band-to-Band tunneling follows (GIDL) mechanism has been used. the: relationship given by : 2. GIDL In an n-MOSFET when the gate potential is very low or I,, = AE, exp(- B / E ~ ) (1) negative, in which case the front channel is off or in accumulation and a high drain potential is applied, tunneling where A is a constant and B equals about 21.3 MVIcm. E, current flows from drain to substrate. Since this is a form of can be expressed as undesired leakage current caused at low gate voltages it is called Gate Induced Leakage Current (GIDL) . ET = (VDC - v , )/(3TOX ) (2) 0 - 7 8 0 3 - 6 6 7 5 - 1 /01/$10.00 0 2001 IEEE. 254 Proceedings of 8 'IPFA 2001, Singapore " Authorized licensed use limited to: INDIAN INSTITUTE OF TECHNOLOGY BOMBAY. Downloaded on December 2, 2008 at 05:22 from IEEE Xplore. Restrictions apply. ~ where V D= (VD-V~). VsUw is the surface potential of the significant, which is not the case with long channel devices. depleted region at the onset of B-B tunneling and is equal to This indicates a method for extraction of p for an SO1 1.2 Volts. device. By finding the ratio of drain currents of a short channel device and long channel device under GIDL bias, Due to the vertical field present in the overlap region, these the value of p can be obtained. This is a very good method electrons and holes are collected by the drain and substrate, since it does not require a body contact. respectively. As the gate voltage is made more negative or the drain potential is increased, the vertical field increases 4. Results Obtained for Bulk MOSFET leading to an increase in GIDL leakage current. Reduction in The GIDL behaviour was first studied for Bulk MOSFETs. current was obtained for LDD devices under GIDL bias. Devices used in the experiments had channel lengths of 10 This is due to reduction in the electric field in the gate-drain pm, 5 pm, 1 pm and 0.25 pm. A GIDL bias of -1.0 Volt was overlap region. GIDL was used earlier to characterise applied and drain voltage was swept from 0 to 3volts. The interface traps and later on to measure oxide charge trapping GIDL currents measured for different channel lengths are using GIDL transients . shown in fig. 4. The GIDL current was more or less constant with respect to the channel length. This indicates the validity of the statement that GIDL remains constant with varying channel lengths. This can be explained by the fact that Band-to-Band tunneling depends on VDc and hence is independent of channel length. Also, since the holes flow into the substrate, there is no parasitic bipolar action in bulk MOSFET. Thus, it is correct to assume that GIDL current I \ - I remains constant with respect to channel length. I I SUBSTRATE I I Fig.: Schematic of current flow in a SO1 MOSFET under GIDL bias 3. GIDL in SO1 MOSFET The origin of GIDL remains identical even in the case of SO1 MOSFETs [SI as in the case of bulk MOSFETs. The front channel in the device is kept in off state or in accumulation. Fig. 3 shows the schematic diagram of current flow in an SO1 n-channel MOSFET in GIDL mode with the front channel tumed off. The high electric field in the gate- Fin. 4: GIDL curre%yor bulk MOSFET with drain overlap region causes electron tunneling fiom valence GIDL bias of VG= -1 .O V band to conduction band. The electrons, as in the case of bulk device, move out from the drain. However, the holes, unlike in bulk device, cannot flow out to the substrate due to 1.41 -V,= - 0.50 V -v,=- 1.oov the buried oxide present. As a result, the holes flow to the 1E-5 floating body and forward bias the source-body junction. This junction is the emitter-base junction of the parasitic 1E-6 BJT. The GIDL current, thus, serves as the base current for 1E-7 - the lateral bipolar transistor as shown in Fig. 3. This GIDL h which is independent of the channel length, is amplified by 9 1E-8- - 0 the gain of the lateral BJT. The resultant current at the drain lE-9- is thus given as: 1E-10 1E-11 (3) where p is the gain of the lateral BJT 0.0 I 0.5 . I 1.0 - I 1.5 ' I 2.0 ' 1 2.5 . I 3.0 VJV, The current gain of the lateral BJT increases as the base width decreases. Therefore, for short channel devices, p is Fig. 5: GIDL current variation with Gate Voltage 0-7803-6675-1/01/$10.000 2001 IEEE. 255 Proceedings o 8"' IPFA 2001, Singapore f Authorized licensed use limited to: INDIAN INSTITUTE OF TECHNOLOGY BOMBAY. Downloaded on December 2, 2008 at 05:22 from IEEE Xplore. Restrictions apply. 5. Effect of variation of VGon GIDL 7. P'osults obtained for LAC SO1 MOSFET Fig 5 shows the variation of GIDL current with change in F,b. 7 shows the output characteristics of uniform SO1 applied gate voltage. As the applied gate voltage VG MOlSFET and LAC SO1 MOSFET. The kink effect in the increases, the vertical field in the gate-drain overlap region case of LAC SO1 MOSFET is exhibited at higher drain increases. This leads to an increase in the Band-to-Band voltages depicting a suppression of floating body effects in tunnelling current. Since the base current increases, the these devices. resultant off-state leakage current also increases. The results have been plotted for a Uniform SO1 MOSFET. Similar trends were noted for bulk and LAC SO1 MOSFET also. 6. Results Obtained for Uniform SO1 MOSFET GIDL experiments were performed to measure the lateral parasitic bipolar gain present in the Uniform SO1 MOSFET. The devices used had channel lengths 10 pm, .5 pm, 1 pm and 0.25 pm. The gate oxide thickness was 3.9 nm and the channel width was 20 pm. A GIDL bias of -1.0 Volt was applied and drain voltage was swept from 0 to 3 Volts. The drain currents measured for different channel lengths are shown in fig. 6. As the channel length decreases, the off- 0.0 0.5 1 .o 1.5 state leakage current increases. For devices of lengths 10 pm vDS (v) and 5 pm, currents are low due to an absence of lateral BJT gain p. As the channel length decreases, the base width of Fig. 7: Output Characteristics of LAC and the lateral parasitic bipolar transistor also decreases. Hence, Uniform SO1 MOSFETs the GIDL current is amplified and is higher than that for long-channel devices. This can be seen for devices of lengths In order to determine the efficacy of LAC SO1 in reducing the parasitic bipolar action, GIDL measurements were also 1 pm and 0.25 pm in which currents are high due to the presence of amplification factor. Comparing the devices of performed on them. The devices used had channel lengths 10 pm, 5 pm, 1 pm and 0.25 pm. GIDL bias of -1.0 Volt was lengths 10 pm and 0.25 pm, we see that for low VD, the appllied and drain voltage was swept from 0 to 3 Volts. Fig 8 currents are equal. This is because p is very small at very shows the off-state leakage current trends in LAC SOL low collector current levels. The current gain p increases Lateral parasitic bipolar gain was calculated using equation with increasing collector current level. The value of p is (3). The value of p for L= 0.25 pm device is 5.6 and for the obtained using equation (3), assuming that IGrDLis constant L=l pm device, it is equal to 2.0. This measured value of p with respect to channel length. This was proved in the earlier is llower than that of uniform SO1 MOSFET. As the length of section using the GIDL currents present in bulk MOSFETs. the device decreases, the effectiveness of lateral asymmetric For VD = 2.7.5 Volts, the value of p is 28.75 for L = 0.25 pm channel doping increases. It thus shows that the LAC SO1 device and for L= 1 pm device, p is 1.52. Thus, the value of MOSFET shows immense promise towards reduction of p of p increases with decrease in channel length and the resultant the lateral bipolar transistor and in minimisation of floating enhancement of off-state gate-induced-drain-leakage current body effects. becomes significant for short-channel SO1 MOSFETs. 4 1E-5 - L = 0.25 pm 4 - L = 1 pm 1E-5 1E-6 1 - L = 0.25pm 1E-7, --L=5pn -L= 10pm 1E-7 ; --L = 5pm 1E-81 -L= 10pm e . 1E-8 7 1E-9 - 9 -P 1E-9; 1E-107 1E-10, 1E-11 1E-11 1,-121 1E-12-4 I ' I ' I ' I ' I . 0.0 0.5 1.0 1.5 2.0 2.5 2 0.0 0.5 1.0 1.5 2.0 2.5 3.0 VJV) ,W V( Fip. 6: GIDL current enhancement in uniform Fig. 8: Suppression of GIDL enhancement i LAC n SO1 MOSFET for VG = - 1.O V SO1 MOSFET 0-7 803-6675-1/O 1/$10.00 0 2001 IEEE. 256 Proceedings of 8"' IPFA 2001, Singapore Authorized licensed use limited to: INDIAN INSTITUTE OF TECHNOLOGY BOMBAY. Downloaded on December 2, 2008 at 05:22 from IEEE Xplore. Restrictions apply. This can be attributed to lower electric field in the gate-drain Channel Profile and Ge Pre-amorphization Salicide overlap region as compared to Uniform SO1 MOSFET. Fig. Technology”, Proceedings of the IEEE SOI Conference, 9 shows the electric field variation along the channel for October 5-8, Stuart, Florida, USA, 1998 uniform and LAC SO1 MOSFETs. The peak transverse  B.Cheng, A.Inani, V.Ramgopa1 Rao, and J.C.S.Woo, electric field for LAC SO1 MOSFET is lower, indicating a “Channel Engineering for High Speed Sub-1.O V Power wider drain depletion region (due to the lower doping near Supply Deep Sub-Micron CMOS”, Technical Digest, the drain side of the channel). This results in reduced Band- 1999 Symposium on VLSI Technology, June 14-19, to-Band tunnelling and thus lower hole production. Since p Kyoto, Japan is a function of current and the current levels are lower in  B.Cheng, V. Ramgopal Rao, B.Ikegami, and J.C.S.Woo, LAC SOI, the value of p in LAC SO1 is less compared to “Realization of sub 100 nm asymmetric Channel uniform SOL At high drain voltages, where impact MOSFETs with Excellent Short-Channel Performance ionization comes into play, the asymmetric doping profile And Reliability“ Technical Digest, 28 th European offers lower field near drain in the case of LAC which thus Solid-State Device Research Conference (ESSDERC), leads to suppression of floating body effects in LAC SOI. Bordeaux, France, 1998  T. Y. Chan, J. Chen, P. K. KO, and C. Hu, “The impact of 2t gate-induced-drain-leakage on MOSFET scaling”, IEDMTech. Dig., Dec. 1987, p. 718. -LAC1: Tilt=lOO  S. M. Sze, “Physics of Semiconductor Devices“, 2nd ed., . E W 3 0 3 a, 1 CON n New York: Wiley, 1981.  T. Wang, T. Chang, L. Chiang, C. Wang, N. Zous, and C. Huang, “Investigation of Oxide Charge Trapping and Detrapping in a MOSFET by Using a GIDL Current Technique”, IEEE Trans. Electron Devices, vol. 45, pp. 1511-1517, 1998. [SI J. Chen, F. Assaderaghi, P. -K. KO, and C. Hu, “The enhancement of Gate-Induced-Drain-Leakage current in Y; short-channel SO1 MOSFET and its application in c? el measuring lateral bipolar current gain p”, IEEE Electron 0 Device Lett., vol. 13, pp. 572-574, 1992. -0.1 -0.05 0 0.05 0.1 Lateral Position (pm) Fig. 9: Electric field variation along the channel for Uniform and LAC SO1 MOSFETs 8. Conclusions The enhancement of off-state gate-induced drain leakage current is significant for short-channel SO1 MOSFETs. The parasitic bipolar current gain values for uniform and LAC SO1 MOSFETs have been experimentally evaluated using GIDL current technique. LAC SO1 MOSFETs have been shown to give rise to reduced floating body effects as a result of lower channel doping near the drain region. The extracted parasitic bipolar gain values are an order of magnitude lower for the LAC SO1 MOSFETs. Acknowledgements: Authors wish to acknowledge Baohong Cheng and Jason Woo of the University of California, Los Angeles for providing the samples used in these experiments. References [ 11 J. -Y. Choi, and J. G. Fossum, “Analysis and Control of Floating-body Bipolar Effects in Fully Depleted Submicrometer SO1 MOSFETs”, IEEE Trans. Electron Devices, vol. 38, pp. 1384-139‘1, 1991.  B. Cheng, V. Ramgopal Rao, and J. C. S. Woo, “Sub 0.18 um SO1 MOSFETs Using Lateral Asymmetric 0-7803-6675-1/01/$10.00 0 2001 IEEE. 257 Proceedings of 8” IPFA 2001, Singapore Authorized licensed use limited to: INDIAN INSTITUTE OF TECHNOLOGY BOMBAY. Downloaded on December 2, 2008 at 05:22 from IEEE Xplore. Restrictions apply.
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